net/nfp: support vNIC Rx/Tx BAR mappings

NFP vNICs use a subset of PCI device BARs. vNIC rx/tx bars point to
NFP hardware queues unit. Unlike vNIC config bar, the NFP address is
always the same so the NFP expansion bar configuration always uses
the same hardcoded physical address.

This patch adds a NSPU API function for getting vNIC rx/tx bars
mapped through a expansion bar using that specific physical address.

The PMD will use the PCI bar offset returned for mapping the vNIC
rx/tx bars.

Signed-off-by: Alejandro Lucero <alejandro.lucero@netronome.com>
This commit is contained in:
Alejandro Lucero 2017-09-01 15:12:12 +01:00 committed by Ferruh Yigit
parent 6b2e61ac36
commit d054146599
2 changed files with 21 additions and 1 deletions

View File

@ -22,7 +22,8 @@
#define NFP_NSP_TARGET 7
/* Expansion BARs for mapping PF vnic BARs */
#define NFP_NET_PF_CFG_EXP_BAR 6
#define NFP_NET_PF_CFG_EXP_BAR 6
#define NFP_NET_PF_HW_QUEUES_EXP_BAR 5
/*
* This is an NFP internal address used for configuring properly an NFP
@ -509,3 +510,21 @@ nfp_nsp_map_ctrl_bar(nspu_desc_t *desc, uint64_t *pcie_offset)
return 0;
}
/*
* This is a hardcoded fixed NFP internal CPP bus address for the hw queues unit
* inside the PCIE island.
*/
#define NFP_CPP_PCIE_QUEUES ((uint64_t)(1ULL << 39) | 0x80000 | \
((uint64_t)0x4 & 0x3f) << 32)
/* Configure a specific NFP expansion bar for accessing the vNIC rx/tx BARs */
void
nfp_nsp_map_queues_bar(nspu_desc_t *desc, uint64_t *pcie_offset)
{
nfp_nspu_mem_bar_cfg(desc, NFP_NET_PF_HW_QUEUES_EXP_BAR, 0,
NFP_CPP_PCIE_QUEUES, pcie_offset);
/* This is the pcie offset to use by the host */
*pcie_offset |= ((NFP_NET_PF_HW_QUEUES_EXP_BAR & 0x7) << (27 - 3));
}

View File

@ -74,3 +74,4 @@ int nfp_nspu_init(nspu_desc_t *desc, int nfp, int pcie_bar, size_t pcie_barsz,
int nfp_nsp_get_abi_version(nspu_desc_t *desc, int *major, int *minor);
int nfp_nsp_fw_setup(nspu_desc_t *desc, const char *sym, uint64_t *pcie_offset);
int nfp_nsp_map_ctrl_bar(nspu_desc_t *desc, uint64_t *pcie_offset);
void nfp_nsp_map_queues_bar(nspu_desc_t *desc, uint64_t *pcie_offset);