net/mlx5: fix LAG representor probing on PF1 PCI
In case of bonding, orchestrator wants to use same devargs for LAG and non-LAG scenario to probe representor on PF1 using PF1 PCI address like "<DBDF_PF1>,representor=pf1vf[0-3]". This patch changes PCI address check policy to allow PF1 PCI address for representors on PF1. Note: detaching PF0 device can't remove representors on PF1. It's recommended to use primary(PF0) PCI address to probe representors on both PFs. Fixes: f926cce3fa94 ("net/mlx5: refactor bonding representor probing") Cc: stable@dpdk.org Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
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@ -1879,11 +1879,14 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
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tmp_str);
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break;
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}
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/* Match PCI address. */
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/* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
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if (pci_dev->domain == pci_addr.domain &&
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pci_dev->bus == pci_addr.bus &&
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pci_dev->devid == pci_addr.devid &&
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pci_dev->function + owner == pci_addr.function)
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((pci_dev->function == 0 &&
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pci_dev->function + owner == pci_addr.function) ||
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(pci_dev->function == owner &&
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pci_addr.function == owner)))
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pf = info.port_name;
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/* Get ifindex. */
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snprintf(tmp_str, sizeof(tmp_str),
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