net/mlx5: fix LAG representor probing on PF1 PCI

In case of bonding, orchestrator wants to use same devargs for LAG and
non-LAG scenario to probe representor on PF1 using PF1 PCI address
like "<DBDF_PF1>,representor=pf1vf[0-3]".

This patch changes PCI address check policy to allow PF1 PCI address for
representors on PF1.

Note: detaching PF0 device can't remove representors on PF1. It's
recommended to use primary(PF0) PCI address to probe representors on
both PFs.

Fixes: f926cce3fa94 ("net/mlx5: refactor bonding representor probing")
Cc: stable@dpdk.org

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
This commit is contained in:
Xueming Li 2021-05-10 16:13:42 +03:00 committed by Thomas Monjalon
parent 69b44d6bce
commit d31a897190

View File

@ -1879,11 +1879,14 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
tmp_str);
break;
}
/* Match PCI address. */
/* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
if (pci_dev->domain == pci_addr.domain &&
pci_dev->bus == pci_addr.bus &&
pci_dev->devid == pci_addr.devid &&
pci_dev->function + owner == pci_addr.function)
((pci_dev->function == 0 &&
pci_dev->function + owner == pci_addr.function) ||
(pci_dev->function == owner &&
pci_addr.function == owner)))
pf = info.port_name;
/* Get ifindex. */
snprintf(tmp_str, sizeof(tmp_str),