diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst
index d24f816296..1e79bd916a 100644
--- a/doc/guides/eventdevs/octeontx2.rst
+++ b/doc/guides/eventdevs/octeontx2.rst
@@ -103,6 +103,17 @@ Runtime Config Options
 
     --dev "0002:0e:00.0,tim_disable_npa=1"
 
+- ``TIM modify chunk slots``
+
+  The ``tim_chnk_slots`` devargs can be used to modify number of chunk slots.
+  Chunks are used to store event timers, a chunk can be visualised as an array
+  where the last element points to the next chunk and rest of them are used to
+  store events. TIM traverses the list of chunks and enqueues the event timers
+  to SSO. The default value is 255 and the max value is 4095.
+  For example::
+
+    --dev "0002:0e:00.0,tim_chnk_slots=1023"
+
 Debugging Options
 ~~~~~~~~~~~~~~~~~
 
diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c
index 5517a6bc44..2c12fd2cb6 100644
--- a/drivers/event/octeontx2/otx2_tim_evdev.c
+++ b/drivers/event/octeontx2/otx2_tim_evdev.c
@@ -240,7 +240,7 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr)
 	tim_ring->tck_nsec = RTE_ALIGN_MUL_CEIL(rcfg->timer_tick_ns, 10);
 	tim_ring->max_tout = rcfg->max_tmo_ns;
 	tim_ring->nb_bkts = (tim_ring->max_tout / tim_ring->tck_nsec);
-	tim_ring->chunk_sz = OTX2_TIM_RING_DEF_CHUNK_SZ;
+	tim_ring->chunk_sz = dev->chunk_sz;
 	nb_timers = rcfg->nb_timers;
 	tim_ring->disable_npa = dev->disable_npa;
 
@@ -356,6 +356,7 @@ otx2_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,
 }
 
 #define OTX2_TIM_DISABLE_NPA	"tim_disable_npa"
+#define OTX2_TIM_CHNK_SLOTS	"tim_chnk_slots"
 
 static void
 tim_parse_devargs(struct rte_devargs *devargs, struct otx2_tim_evdev *dev)
@@ -371,6 +372,8 @@ tim_parse_devargs(struct rte_devargs *devargs, struct otx2_tim_evdev *dev)
 
 	rte_kvargs_process(kvlist, OTX2_TIM_DISABLE_NPA,
 			   &parse_kvargs_flag, &dev->disable_npa);
+	rte_kvargs_process(kvlist, OTX2_TIM_CHNK_SLOTS,
+			   &parse_kvargs_value, &dev->chunk_slots);
 }
 
 void
@@ -424,6 +427,15 @@ otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev *cmn_dev)
 		goto mz_free;
 	}
 
+	if (dev->chunk_slots &&
+	    dev->chunk_slots <= OTX2_TIM_MAX_CHUNK_SLOTS &&
+	    dev->chunk_slots >= OTX2_TIM_MIN_CHUNK_SLOTS) {
+		dev->chunk_sz = (dev->chunk_slots + 1) *
+			OTX2_TIM_CHUNK_ALIGNMENT;
+	} else {
+		dev->chunk_sz = OTX2_TIM_RING_DEF_CHUNK_SZ;
+	}
+
 	return;
 
 mz_free:
diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h
index 0a0a0b4d88..9636d84143 100644
--- a/drivers/event/octeontx2/otx2_tim_evdev.h
+++ b/drivers/event/octeontx2/otx2_tim_evdev.h
@@ -22,6 +22,8 @@
 #define OTX2_TIM_RING_DEF_CHUNK_SZ	(4096)
 #define OTX2_TIM_CHUNK_ALIGNMENT	(16)
 #define OTX2_TIM_NB_CHUNK_SLOTS(sz)	(((sz) / OTX2_TIM_CHUNK_ALIGNMENT) - 1)
+#define OTX2_TIM_MIN_CHUNK_SLOTS	(0x1)
+#define OTX2_TIM_MAX_CHUNK_SLOTS	(0x1FFE)
 #define OTX2_TIM_MIN_TMO_TKS		(256)
 
 enum otx2_tim_clk_src {
@@ -54,9 +56,11 @@ struct otx2_tim_evdev {
 	struct rte_eventdev *event_dev;
 	struct otx2_mbox *mbox;
 	uint16_t nb_rings;
+	uint32_t chunk_sz;
 	uintptr_t bar2;
 	/* Dev args */
 	uint8_t disable_npa;
+	uint16_t chunk_slots;
 };
 
 struct otx2_tim_ring {