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drivers: remove direct access to interrupt handle

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Removing direct access to interrupt handle structure fields,
rather use respective get set APIs for the same.
Making changes to all the drivers access the interrupt handle fields.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Tested-by: Raslan Darawsheh <rasland@nvidia.com>
This commit is contained in:
Harman Kalra 2021-10-23 02:19:32 +05:30 committed by David Marchand
parent c2bd9367e1
commit d61138d4f0
111 changed files with 1672 additions and 1182 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/baseband/acc100/rte_acc100_pmd.c
View File

@ -720,8 +720,8 @@ acc100_intr_enable(struct rte_bbdev *dev)
struct acc100_device *d = dev->data->dev_private;
/* Only MSI are currently supported */
if (dev->intr_handle->type == RTE_INTR_HANDLE_VFIO_MSI ||
dev->intr_handle->type == RTE_INTR_HANDLE_UIO) {
if (rte_intr_type_get(dev->intr_handle) == RTE_INTR_HANDLE_VFIO_MSI ||
rte_intr_type_get(dev->intr_handle) == RTE_INTR_HANDLE_UIO) {
ret = allocate_info_ring(dev);
if (ret < 0) {
@ -1098,8 +1098,8 @@ acc100_queue_intr_enable(struct rte_bbdev *dev, uint16_t queue_id)
{
struct acc100_queue *q = dev->data->queues[queue_id].queue_private;
if (dev->intr_handle->type != RTE_INTR_HANDLE_VFIO_MSI &&
dev->intr_handle->type != RTE_INTR_HANDLE_UIO)
if (rte_intr_type_get(dev->intr_handle) != RTE_INTR_HANDLE_VFIO_MSI &&
rte_intr_type_get(dev->intr_handle) != RTE_INTR_HANDLE_UIO)
return -ENOTSUP;
q->irq_enable = 1;
@ -1111,8 +1111,8 @@ acc100_queue_intr_disable(struct rte_bbdev *dev, uint16_t queue_id)
{
struct acc100_queue *q = dev->data->queues[queue_id].queue_private;
if (dev->intr_handle->type != RTE_INTR_HANDLE_VFIO_MSI &&
dev->intr_handle->type != RTE_INTR_HANDLE_UIO)
if (rte_intr_type_get(dev->intr_handle) != RTE_INTR_HANDLE_VFIO_MSI &&
rte_intr_type_get(dev->intr_handle) != RTE_INTR_HANDLE_UIO)
return -ENOTSUP;
q->irq_enable = 0;
@ -4185,7 +4185,7 @@ static int acc100_pci_probe(struct rte_pci_driver *pci_drv,
/* Fill HW specific part of device structure */
bbdev->device = &pci_dev->device;
bbdev->intr_handle = &pci_dev->intr_handle;
bbdev->intr_handle = pci_dev->intr_handle;
bbdev->data->socket_id = pci_dev->device.numa_node;
/* Invoke ACC100 device initialization function */

22
drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
View File

@ -743,17 +743,17 @@ fpga_intr_enable(struct rte_bbdev *dev)
* It ensures that callback function assigned to that descriptor will
* invoked when any FPGA queue issues interrupt.
*/
for (i = 0; i < FPGA_NUM_INTR_VEC; ++i)
dev->intr_handle->efds[i] = dev->intr_handle->fd;
for (i = 0; i < FPGA_NUM_INTR_VEC; ++i) {
if (rte_intr_efds_index_set(dev->intr_handle, i,
rte_intr_fd_get(dev->intr_handle)))
return -rte_errno;
}
if (!dev->intr_handle->intr_vec) {
dev->intr_handle->intr_vec = rte_zmalloc("intr_vec",
dev->data->num_queues * sizeof(int), 0);
if (!dev->intr_handle->intr_vec) {
rte_bbdev_log(ERR, "Failed to allocate %u vectors",
dev->data->num_queues);
return -ENOMEM;
}
if (rte_intr_vec_list_alloc(dev->intr_handle, "intr_vec",
dev->data->num_queues)) {
rte_bbdev_log(ERR, "Failed to allocate %u vectors",
dev->data->num_queues);
return -ENOMEM;
}
ret = rte_intr_enable(dev->intr_handle);
@ -1880,7 +1880,7 @@ fpga_5gnr_fec_probe(struct rte_pci_driver *pci_drv,
/* Fill HW specific part of device structure */
bbdev->device = &pci_dev->device;
bbdev->intr_handle = &pci_dev->intr_handle;
bbdev->intr_handle = pci_dev->intr_handle;
bbdev->data->socket_id = pci_dev->device.numa_node;
/* Invoke FEC FPGA device initialization function */

22
drivers/baseband/fpga_lte_fec/fpga_lte_fec.c
View File

@ -1014,17 +1014,17 @@ fpga_intr_enable(struct rte_bbdev *dev)
* It ensures that callback function assigned to that descriptor will
* invoked when any FPGA queue issues interrupt.
*/
for (i = 0; i < FPGA_NUM_INTR_VEC; ++i)
dev->intr_handle->efds[i] = dev->intr_handle->fd;
for (i = 0; i < FPGA_NUM_INTR_VEC; ++i) {
if (rte_intr_efds_index_set(dev->intr_handle, i,
rte_intr_fd_get(dev->intr_handle)))
return -rte_errno;
}
if (!dev->intr_handle->intr_vec) {
dev->intr_handle->intr_vec = rte_zmalloc("intr_vec",
dev->data->num_queues * sizeof(int), 0);
if (!dev->intr_handle->intr_vec) {
rte_bbdev_log(ERR, "Failed to allocate %u vectors",
dev->data->num_queues);
return -ENOMEM;
}
if (rte_intr_vec_list_alloc(dev->intr_handle, "intr_vec",
dev->data->num_queues)) {
rte_bbdev_log(ERR, "Failed to allocate %u vectors",
dev->data->num_queues);
return -ENOMEM;
}
ret = rte_intr_enable(dev->intr_handle);
@ -2370,7 +2370,7 @@ fpga_lte_fec_probe(struct rte_pci_driver *pci_drv,
/* Fill HW specific part of device structure */
bbdev->device = &pci_dev->device;
bbdev->intr_handle = &pci_dev->intr_handle;
bbdev->intr_handle = pci_dev->intr_handle;
bbdev->data->socket_id = pci_dev->device.numa_node;
/* Invoke FEC FPGA device initialization function */

17
drivers/bus/auxiliary/auxiliary_common.c
View File

@ -121,15 +121,27 @@ rte_auxiliary_probe_one_driver(struct rte_auxiliary_driver *drv,
return -EINVAL;
}
/* Allocate interrupt instance */
dev->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (dev->intr_handle == NULL) {
AUXILIARY_LOG(ERR, "Could not allocate interrupt instance for device %s",
dev->name);
return -ENOMEM;
}
dev->driver = drv;
AUXILIARY_LOG(INFO, "Probe auxiliary driver: %s device: %s (NUMA node %i)",
drv->driver.name, dev->name, dev->device.numa_node);
ret = drv->probe(drv, dev);
if (ret != 0)
if (ret != 0) {
dev->driver = NULL;
else
rte_intr_instance_free(dev->intr_handle);
dev->intr_handle = NULL;
} else {
dev->device.driver = &drv->driver;
}
return ret;
}
@ -320,6 +332,7 @@ auxiliary_unplug(struct rte_device *dev)
if (ret == 0) {
rte_auxiliary_remove_device(adev);
rte_devargs_remove(dev->devargs);
rte_intr_instance_free(adev->intr_handle);
free(adev);
}
return ret;

2
drivers/bus/auxiliary/rte_bus_auxiliary.h
View File

@ -115,7 +115,7 @@ struct rte_auxiliary_device {
RTE_TAILQ_ENTRY(rte_auxiliary_device) next; /**< Next probed device. */
struct rte_device device; /**< Inherit core device */
char name[RTE_DEV_NAME_MAX_LEN + 1]; /**< ASCII device name */
struct rte_intr_handle intr_handle; /**< Interrupt handle */
struct rte_intr_handle *intr_handle; /**< Interrupt handle */
struct rte_auxiliary_driver *driver; /**< Device driver */
};

28
drivers/bus/dpaa/dpaa_bus.c
View File

@ -172,6 +172,15 @@ dpaa_create_device_list(void)
dev->device.bus = &rte_dpaa_bus.bus;
/* Allocate interrupt handle instance */
dev->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (dev->intr_handle == NULL) {
DPAA_BUS_LOG(ERR, "Failed to allocate intr handle");
ret = -ENOMEM;
goto cleanup;
}
cfg = &dpaa_netcfg->port_cfg[i];
fman_intf = cfg->fman_if;
@ -214,6 +223,15 @@ dpaa_create_device_list(void)
goto cleanup;
}
/* Allocate interrupt handle instance */
dev->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (dev->intr_handle == NULL) {
DPAA_BUS_LOG(ERR, "Failed to allocate intr handle");
ret = -ENOMEM;
goto cleanup;
}
dev->device_type = FSL_DPAA_CRYPTO;
dev->id.dev_id = rte_dpaa_bus.device_count + i;
@ -247,6 +265,7 @@ dpaa_clean_device_list(void)
RTE_TAILQ_FOREACH_SAFE(dev, &rte_dpaa_bus.device_list, next, tdev) {
TAILQ_REMOVE(&rte_dpaa_bus.device_list, dev, next);
rte_intr_instance_free(dev->intr_handle);
free(dev);
dev = NULL;
}
@ -559,8 +578,11 @@ static int rte_dpaa_setup_intr(struct rte_intr_handle *intr_handle)
return errno;
}
intr_handle->fd = fd;
intr_handle->type = RTE_INTR_HANDLE_EXT;
if (rte_intr_fd_set(intr_handle, fd))
return rte_errno;
if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
return rte_errno;
return 0;
}
@ -612,7 +634,7 @@ rte_dpaa_bus_probe(void)
TAILQ_FOREACH(dev, &rte_dpaa_bus.device_list, next) {
if (dev->device_type == FSL_DPAA_ETH) {
ret = rte_dpaa_setup_intr(&dev->intr_handle);
ret = rte_dpaa_setup_intr(dev->intr_handle);
if (ret)
DPAA_BUS_ERR("Error setting up interrupt.\n");
}

2
drivers/bus/dpaa/rte_dpaa_bus.h
View File

@ -98,7 +98,7 @@ struct rte_dpaa_device {
};
struct rte_dpaa_driver *driver;
struct dpaa_device_id id;
struct rte_intr_handle intr_handle;
struct rte_intr_handle *intr_handle;
enum rte_dpaa_type device_type; /**< Ethernet or crypto type device */
char name[RTE_ETH_NAME_MAX_LEN];
};

14
drivers/bus/fslmc/fslmc_bus.c
View File

@ -47,6 +47,7 @@ cleanup_fslmc_device_list(void)
RTE_TAILQ_FOREACH_SAFE(dev, &rte_fslmc_bus.device_list, next, t_dev) {
TAILQ_REMOVE(&rte_fslmc_bus.device_list, dev, next);
rte_intr_instance_free(dev->intr_handle);
free(dev);
dev = NULL;
}
@ -160,6 +161,15 @@ scan_one_fslmc_device(char *dev_name)
dev->device.bus = &rte_fslmc_bus.bus;
/* Allocate interrupt instance */
dev->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (dev->intr_handle == NULL) {
DPAA2_BUS_ERR("Failed to allocate intr handle");
ret = -ENOMEM;
goto cleanup;
}
/* Parse the device name and ID */
t_ptr = strtok(dup_dev_name, ".");
if (!t_ptr) {
@ -220,8 +230,10 @@ scan_one_fslmc_device(char *dev_name)
cleanup:
if (dup_dev_name)
free(dup_dev_name);
if (dev)
if (dev) {
rte_intr_instance_free(dev->intr_handle);
free(dev);
}
return ret;
}

30
drivers/bus/fslmc/fslmc_vfio.c
View File

@ -599,7 +599,7 @@ int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index)
int len, ret;
char irq_set_buf[IRQ_SET_BUF_LEN];
struct vfio_irq_set *irq_set;
int *fd_ptr;
int *fd_ptr, vfio_dev_fd;
len = sizeof(irq_set_buf);
@ -611,12 +611,14 @@ int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index)
irq_set->index = index;
irq_set->start = 0;
fd_ptr = (int *)&irq_set->data;
*fd_ptr = intr_handle->fd;
*fd_ptr = rte_intr_fd_get(intr_handle);
ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
ret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
if (ret) {
DPAA2_BUS_ERR("Error:dpaa2 SET IRQs fd=%d, err = %d(%s)",
intr_handle->fd, errno, strerror(errno));
rte_intr_fd_get(intr_handle), errno,
strerror(errno));
return ret;
}
@ -627,7 +629,7 @@ int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index)
{
struct vfio_irq_set *irq_set;
char irq_set_buf[IRQ_SET_BUF_LEN];
int len, ret;
int len, ret, vfio_dev_fd;
len = sizeof(struct vfio_irq_set);
@ -638,11 +640,12 @@ int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index)
irq_set->start = 0;
irq_set->count = 0;
ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
ret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
if (ret)
DPAA2_BUS_ERR(
"Error disabling dpaa2 interrupts for fd %d",
intr_handle->fd);
rte_intr_fd_get(intr_handle));
return ret;
}
@ -684,9 +687,14 @@ rte_dpaa2_vfio_setup_intr(struct rte_intr_handle *intr_handle,
return -1;
}
intr_handle->fd = fd;
intr_handle->type = RTE_INTR_HANDLE_VFIO_MSI;
intr_handle->vfio_dev_fd = vfio_dev_fd;
if (rte_intr_fd_set(intr_handle, fd))
return -rte_errno;
if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_VFIO_MSI))
return -rte_errno;
if (rte_intr_dev_fd_set(intr_handle, vfio_dev_fd))
return -rte_errno;
return 0;
}
@ -711,7 +719,7 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)
switch (dev->dev_type) {
case DPAA2_ETH:
rte_dpaa2_vfio_setup_intr(&dev->intr_handle, dev_fd,
rte_dpaa2_vfio_setup_intr(dev->intr_handle, dev_fd,
device_info.num_irqs);
break;
case DPAA2_CON:

18
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
View File

@ -176,7 +176,7 @@ static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev *dpio_dev)
int threshold = 0x3, timeout = 0xFF;
dpio_epoll_fd = epoll_create(1);
ret = rte_dpaa2_intr_enable(&dpio_dev->intr_handle, 0);
ret = rte_dpaa2_intr_enable(dpio_dev->intr_handle, 0);
if (ret) {
DPAA2_BUS_ERR("Interrupt registeration failed");
return -1;
@ -195,7 +195,7 @@ static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev *dpio_dev)
qbman_swp_dqrr_thrshld_write(dpio_dev->sw_portal, threshold);
qbman_swp_intr_timeout_write(dpio_dev->sw_portal, timeout);
eventfd = dpio_dev->intr_handle.fd;
eventfd = rte_intr_fd_get(dpio_dev->intr_handle);
epoll_ev.events = EPOLLIN | EPOLLPRI | EPOLLET;
epoll_ev.data.fd = eventfd;
@ -213,7 +213,7 @@ static void dpaa2_dpio_intr_deinit(struct dpaa2_dpio_dev *dpio_dev)
{
int ret;
ret = rte_dpaa2_intr_disable(&dpio_dev->intr_handle, 0);
ret = rte_dpaa2_intr_disable(dpio_dev->intr_handle, 0);
if (ret)
DPAA2_BUS_ERR("DPIO interrupt disable failed");
@ -388,6 +388,14 @@ dpaa2_create_dpio_device(int vdev_fd,
/* Using single portal for all devices */
dpio_dev->mc_portal = dpaa2_get_mcp_ptr(MC_PORTAL_INDEX);
/* Allocate interrupt instance */
dpio_dev->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (!dpio_dev->intr_handle) {
DPAA2_BUS_ERR("Failed to allocate intr handle");
goto err;
}
dpio_dev->dpio = rte_zmalloc(NULL, sizeof(struct fsl_mc_io),
RTE_CACHE_LINE_SIZE);
if (!dpio_dev->dpio) {
@ -490,7 +498,7 @@ dpaa2_create_dpio_device(int vdev_fd,
io_space_count++;
dpio_dev->index = io_space_count;
if (rte_dpaa2_vfio_setup_intr(&dpio_dev->intr_handle, vdev_fd, 1)) {
if (rte_dpaa2_vfio_setup_intr(dpio_dev->intr_handle, vdev_fd, 1)) {
DPAA2_BUS_ERR("Fail to setup interrupt for %d",
dpio_dev->hw_id);
goto err;
@ -538,6 +546,7 @@ dpaa2_create_dpio_device(int vdev_fd,
rte_free(dpio_dev->dpio);
}
rte_intr_instance_free(dpio_dev->intr_handle);
rte_free(dpio_dev);
/* For each element in the list, cleanup */
@ -549,6 +558,7 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->token);
rte_free(dpio_dev->dpio);
}
rte_intr_instance_free(dpio_dev->intr_handle);
rte_free(dpio_dev);
}

2
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
View File

@ -116,7 +116,7 @@ struct dpaa2_dpio_dev {
uintptr_t qbman_portal_ci_paddr;
/**< Physical address of Cache Inhibit Area */
uintptr_t ci_size; /**< Size of the CI region */
struct rte_intr_handle intr_handle; /* Interrupt related info */
struct rte_intr_handle *intr_handle; /* Interrupt related info */
int32_t epoll_fd; /**< File descriptor created for interrupt polling */
int32_t hw_id; /**< An unique ID of this DPIO device instance */
struct dpaa2_portal_dqrr dpaa2_held_bufs;

2
drivers/bus/fslmc/rte_fslmc.h
View File

@ -122,7 +122,7 @@ struct rte_dpaa2_device {
};
enum rte_dpaa2_dev_type dev_type; /**< Device Type */
uint16_t object_id; /**< DPAA2 Object ID */
struct rte_intr_handle intr_handle; /**< Interrupt handle */
struct rte_intr_handle *intr_handle; /**< Interrupt handle */
struct rte_dpaa2_driver *driver; /**< Associated driver */
char name[FSLMC_OBJECT_MAX_LEN]; /**< DPAA2 Object name*/
};

13
drivers/bus/ifpga/ifpga_bus.c
View File

@ -161,6 +161,14 @@ ifpga_scan_one(struct rte_rawdev *rawdev,
afu_dev->id.uuid.uuid_high = 0;
afu_dev->id.port = afu_pr_conf.afu_id.port;
/* Allocate interrupt instance */
afu_dev->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (afu_dev->intr_handle == NULL) {
IFPGA_BUS_ERR("Failed to allocate intr handle");
goto end;
}
if (rawdev->dev_ops && rawdev->dev_ops->dev_info_get)
rawdev->dev_ops->dev_info_get(rawdev, afu_dev, sizeof(*afu_dev));
@ -189,8 +197,10 @@ ifpga_scan_one(struct rte_rawdev *rawdev,
rte_kvargs_free(kvlist);
if (path)
free(path);
if (afu_dev)
if (afu_dev) {
rte_intr_instance_free(afu_dev->intr_handle);
free(afu_dev);
}
return NULL;
}
@ -396,6 +406,7 @@ ifpga_unplug(struct rte_device *dev)
TAILQ_REMOVE(&ifpga_afu_dev_list, afu_dev, next);
rte_devargs_remove(dev->devargs);
rte_intr_instance_free(afu_dev->intr_handle);
free(afu_dev);
return 0;

2
drivers/bus/ifpga/rte_bus_ifpga.h
View File

@ -79,7 +79,7 @@ struct rte_afu_device {
struct rte_mem_resource mem_resource[PCI_MAX_RESOURCE];
/**< AFU Memory Resource */
struct rte_afu_shared shared;
struct rte_intr_handle intr_handle; /**< Interrupt handle */
struct rte_intr_handle *intr_handle; /**< Interrupt handle */
struct rte_afu_driver *driver; /**< Associated driver */
char path[IFPGA_BUS_BITSTREAM_PATH_MAX_LEN];
} __rte_packed;

20
drivers/bus/pci/bsd/pci.c
View File

@ -95,10 +95,10 @@ pci_uio_free_resource(struct rte_pci_device *dev,
{
rte_free(uio_res);
if (dev->intr_handle.fd) {
close(dev->intr_handle.fd);
dev->intr_handle.fd = -1;
dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
if (rte_intr_fd_get(dev->intr_handle)) {
close(rte_intr_fd_get(dev->intr_handle));
rte_intr_fd_set(dev->intr_handle, -1);
rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);
}
}
@ -121,13 +121,19 @@ pci_uio_alloc_resource(struct rte_pci_device *dev,
}
/* save fd if in primary process */
dev->intr_handle.fd = open(devname, O_RDWR);
if (dev->intr_handle.fd < 0) {
if (rte_intr_fd_set(dev->intr_handle, open(devname, O_RDWR))) {
RTE_LOG(WARNING, EAL, "Failed to save fd");
goto error;
}
if (rte_intr_fd_get(dev->intr_handle) < 0) {
RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
devname, strerror(errno));
goto error;
}
dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO))
goto error;
/* allocate the mapping details for secondary processes*/
*uio_res = rte_zmalloc("UIO_RES", sizeof(**uio_res), 0);

4
drivers/bus/pci/linux/pci.c
View File

@ -645,7 +645,7 @@ int rte_pci_read_config(const struct rte_pci_device *device,
void *buf, size_t len, off_t offset)
{
char devname[RTE_DEV_NAME_MAX_LEN] = "";
const struct rte_intr_handle *intr_handle = &device->intr_handle;
const struct rte_intr_handle *intr_handle = device->intr_handle;
switch (device->kdrv) {
case RTE_PCI_KDRV_IGB_UIO:
@ -669,7 +669,7 @@ int rte_pci_write_config(const struct rte_pci_device *device,
const void *buf, size_t len, off_t offset)
{
char devname[RTE_DEV_NAME_MAX_LEN] = "";
const struct rte_intr_handle *intr_handle = &device->intr_handle;
const struct rte_intr_handle *intr_handle = device->intr_handle;
switch (device->kdrv) {
case RTE_PCI_KDRV_IGB_UIO:

69
drivers/bus/pci/linux/pci_uio.c
View File

@ -35,14 +35,18 @@ int
pci_uio_read_config(const struct rte_intr_handle *intr_handle,
void *buf, size_t len, off_t offset)
{
return pread(intr_handle->uio_cfg_fd, buf, len, offset);
int uio_cfg_fd = rte_intr_dev_fd_get(intr_handle);
return pread(uio_cfg_fd, buf, len, offset);
}
int
pci_uio_write_config(const struct rte_intr_handle *intr_handle,
const void *buf, size_t len, off_t offset)
{
return pwrite(intr_handle->uio_cfg_fd, buf, len, offset);
int uio_cfg_fd = rte_intr_dev_fd_get(intr_handle);
return pwrite(uio_cfg_fd, buf, len, offset);
}
static int
@ -198,16 +202,19 @@ void
pci_uio_free_resource(struct rte_pci_device *dev,
struct mapped_pci_resource *uio_res)
{
int uio_cfg_fd = rte_intr_dev_fd_get(dev->intr_handle);
rte_free(uio_res);
if (dev->intr_handle.uio_cfg_fd >= 0) {
close(dev->intr_handle.uio_cfg_fd);
dev->intr_handle.uio_cfg_fd = -1;
if (uio_cfg_fd >= 0) {
close(uio_cfg_fd);
rte_intr_dev_fd_set(dev->intr_handle, -1);
}
if (dev->intr_handle.fd >= 0) {
close(dev->intr_handle.fd);
dev->intr_handle.fd = -1;
dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
if (rte_intr_fd_get(dev->intr_handle) >= 0) {
close(rte_intr_fd_get(dev->intr_handle));
rte_intr_fd_set(dev->intr_handle, -1);
rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);
}
}
@ -218,7 +225,7 @@ pci_uio_alloc_resource(struct rte_pci_device *dev,
char dirname[PATH_MAX];
char cfgname[PATH_MAX];
char devname[PATH_MAX]; /* contains the /dev/uioX */
int uio_num;
int uio_num, fd, uio_cfg_fd;
struct rte_pci_addr *loc;
loc = &dev->addr;
@ -233,29 +240,38 @@ pci_uio_alloc_resource(struct rte_pci_device *dev,
snprintf(devname, sizeof(devname), "/dev/uio%u", uio_num);
/* save fd if in primary process */
dev->intr_handle.fd = open(devname, O_RDWR);
if (dev->intr_handle.fd < 0) {
fd = open(devname, O_RDWR);
if (fd < 0) {
RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
devname, strerror(errno));
goto error;
}
if (rte_intr_fd_set(dev->intr_handle, fd))
goto error;
snprintf(cfgname, sizeof(cfgname),
"/sys/class/uio/uio%u/device/config", uio_num);
dev->intr_handle.uio_cfg_fd = open(cfgname, O_RDWR);
if (dev->intr_handle.uio_cfg_fd < 0) {
uio_cfg_fd = open(cfgname, O_RDWR);
if (uio_cfg_fd < 0) {
RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
cfgname, strerror(errno));
goto error;
}
if (dev->kdrv == RTE_PCI_KDRV_IGB_UIO)
dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
else {
dev->intr_handle.type = RTE_INTR_HANDLE_UIO_INTX;
if (rte_intr_dev_fd_set(dev->intr_handle, uio_cfg_fd))
goto error;
if (dev->kdrv == RTE_PCI_KDRV_IGB_UIO) {
if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO))
goto error;
} else {
if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO_INTX))
goto error;
/* set bus master that is not done by uio_pci_generic */
if (pci_uio_set_bus_master(dev->intr_handle.uio_cfg_fd)) {
if (pci_uio_set_bus_master(uio_cfg_fd)) {
RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n");
goto error;
}
@ -381,7 +397,7 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
char buf[BUFSIZ];
uint64_t phys_addr, end_addr, flags;
unsigned long base;
int i;
int i, fd;
/* open and read addresses of the corresponding resource in sysfs */
snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource",
@ -427,7 +443,8 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
}
/* FIXME only for primary process ? */
if (dev->intr_handle.type == RTE_INTR_HANDLE_UNKNOWN) {
if (rte_intr_type_get(dev->intr_handle) ==
RTE_INTR_HANDLE_UNKNOWN) {
int uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 0);
if (uio_num < 0) {
RTE_LOG(ERR, EAL, "cannot open %s: %s\n",
@ -436,13 +453,17 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
}
snprintf(filename, sizeof(filename), "/dev/uio%u", uio_num);
dev->intr_handle.fd = open(filename, O_RDWR);
if (dev->intr_handle.fd < 0) {
fd = open(filename, O_RDWR);
if (fd < 0) {
RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
filename, strerror(errno));
goto error;
}
dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
if (rte_intr_fd_set(dev->intr_handle, fd))
goto error;
if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO))
goto error;
}
RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%lx\n", base);

102
drivers/bus/pci/linux/pci_vfio.c
View File

@ -47,7 +47,9 @@ int
pci_vfio_read_config(const struct rte_intr_handle *intr_handle,
void *buf, size_t len, off_t offs)
{
return pread64(intr_handle->vfio_dev_fd, buf, len,
int vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
return pread64(vfio_dev_fd, buf, len,
VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
}
@ -55,7 +57,9 @@ int
pci_vfio_write_config(const struct rte_intr_handle *intr_handle,
const void *buf, size_t len, off_t offs)
{
return pwrite64(intr_handle->vfio_dev_fd, buf, len,
int vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
return pwrite64(vfio_dev_fd, buf, len,
VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
}
@ -281,21 +285,27 @@ pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
return -1;
}
dev->intr_handle.fd = fd;
dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
if (rte_intr_fd_set(dev->intr_handle, fd))
return -1;
if (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))
return -1;
switch (i) {
case VFIO_PCI_MSIX_IRQ_INDEX:
intr_mode = RTE_INTR_MODE_MSIX;
dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
rte_intr_type_set(dev->intr_handle,
RTE_INTR_HANDLE_VFIO_MSIX);
break;
case VFIO_PCI_MSI_IRQ_INDEX:
intr_mode = RTE_INTR_MODE_MSI;
dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSI;
rte_intr_type_set(dev->intr_handle,
RTE_INTR_HANDLE_VFIO_MSI);
break;
case VFIO_PCI_INTX_IRQ_INDEX:
intr_mode = RTE_INTR_MODE_LEGACY;
dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_LEGACY;
rte_intr_type_set(dev->intr_handle,
RTE_INTR_HANDLE_VFIO_LEGACY);
break;
default:
RTE_LOG(ERR, EAL, "Unknown interrupt type!\n");
@ -362,11 +372,16 @@ pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)
return -1;
}
dev->vfio_req_intr_handle.fd = fd;
dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_VFIO_REQ;
dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
if (rte_intr_fd_set(dev->vfio_req_intr_handle, fd))
return -1;
ret = rte_intr_callback_register(&dev->vfio_req_intr_handle,
if (rte_intr_type_set(dev->vfio_req_intr_handle, RTE_INTR_HANDLE_VFIO_REQ))
return -1;
if (rte_intr_dev_fd_set(dev->vfio_req_intr_handle, vfio_dev_fd))
return -1;
ret = rte_intr_callback_register(dev->vfio_req_intr_handle,
pci_vfio_req_handler,
(void *)&dev->device);
if (ret) {
@ -374,10 +389,10 @@ pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)
goto error;
}
ret = rte_intr_enable(&dev->vfio_req_intr_handle);
ret = rte_intr_enable(dev->vfio_req_intr_handle);
if (ret) {
RTE_LOG(ERR, EAL, "Fail to enable req notifier.\n");
ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
ret = rte_intr_callback_unregister(dev->vfio_req_intr_handle,
pci_vfio_req_handler,
(void *)&dev->device);
if (ret < 0)
@ -390,9 +405,9 @@ pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)
error:
close(fd);
dev->vfio_req_intr_handle.fd = -1;
dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
dev->vfio_req_intr_handle.vfio_dev_fd = -1;
rte_intr_fd_set(dev->vfio_req_intr_handle, -1);
rte_intr_type_set(dev->vfio_req_intr_handle, RTE_INTR_HANDLE_UNKNOWN);
rte_intr_dev_fd_set(dev->vfio_req_intr_handle, -1);
return -1;
}
@ -403,13 +418,13 @@ pci_vfio_disable_notifier(struct rte_pci_device *dev)
{
int ret;
ret = rte_intr_disable(&dev->vfio_req_intr_handle);
ret = rte_intr_disable(dev->vfio_req_intr_handle);
if (ret) {
RTE_LOG(ERR, EAL, "fail to disable req notifier.\n");
return -1;
}
ret = rte_intr_callback_unregister_sync(&dev->vfio_req_intr_handle,
ret = rte_intr_callback_unregister_sync(dev->vfio_req_intr_handle,
pci_vfio_req_handler,
(void *)&dev->device);
if (ret < 0) {
@ -418,11 +433,11 @@ pci_vfio_disable_notifier(struct rte_pci_device *dev)
return -1;
}
close(dev->vfio_req_intr_handle.fd);
close(rte_intr_fd_get(dev->vfio_req_intr_handle));
dev->vfio_req_intr_handle.fd = -1;
dev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
dev->vfio_req_intr_handle.vfio_dev_fd = -1;
rte_intr_fd_set(dev->vfio_req_intr_handle, -1);
rte_intr_type_set(dev->vfio_req_intr_handle, RTE_INTR_HANDLE_UNKNOWN);
rte_intr_dev_fd_set(dev->vfio_req_intr_handle, -1);
return 0;
}
@ -705,9 +720,12 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)
struct pci_map *maps;
dev->intr_handle.fd = -1;
if (rte_intr_fd_set(dev->intr_handle, -1))
return -1;
#ifdef HAVE_VFIO_DEV_REQ_INTERFACE
dev->vfio_req_intr_handle.fd = -1;
if (rte_intr_fd_set(dev->vfio_req_intr_handle, -1))
return -1;
#endif
/* store PCI address string */
@ -854,9 +872,11 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev)
struct pci_map *maps;
dev->intr_handle.fd = -1;
if (rte_intr_fd_set(dev->intr_handle, -1))
return -1;
#ifdef HAVE_VFIO_DEV_REQ_INTERFACE
dev->vfio_req_intr_handle.fd = -1;
if (rte_intr_fd_set(dev->vfio_req_intr_handle, -1))
return -1;
#endif
/* store PCI address string */
@ -897,9 +917,11 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev)
}
/* we need save vfio_dev_fd, so it can be used during release */
dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
if (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))
goto err_vfio_dev_fd;
#ifdef HAVE_VFIO_DEV_REQ_INTERFACE
dev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;
if (rte_intr_dev_fd_set(dev->vfio_req_intr_handle, vfio_dev_fd))
goto err_vfio_dev_fd;
#endif
return 0;
@ -968,7 +990,7 @@ pci_vfio_unmap_resource_primary(struct rte_pci_device *dev)
struct rte_pci_addr *loc = &dev->addr;
struct mapped_pci_resource *vfio_res = NULL;
struct mapped_pci_res_list *vfio_res_list;
int ret;
int ret, vfio_dev_fd;
/* store PCI address string */
snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
@ -982,20 +1004,21 @@ pci_vfio_unmap_resource_primary(struct rte_pci_device *dev)
}
#endif
if (close(dev->intr_handle.fd) < 0) {
if (close(rte_intr_fd_get(dev->intr_handle)) < 0) {
RTE_LOG(INFO, EAL, "Error when closing eventfd file descriptor for %s\n",
pci_addr);
return -1;
}
if (pci_vfio_set_bus_master(dev->intr_handle.vfio_dev_fd, false)) {
vfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);
if (pci_vfio_set_bus_master(vfio_dev_fd, false)) {
RTE_LOG(ERR, EAL, "%s cannot unset bus mastering for PCI device!\n",
pci_addr);
return -1;
}
ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
dev->intr_handle.vfio_dev_fd);
vfio_dev_fd);
if (ret < 0) {
RTE_LOG(ERR, EAL, "Cannot release VFIO device\n");
return ret;
@ -1024,14 +1047,15 @@ pci_vfio_unmap_resource_secondary(struct rte_pci_device *dev)
struct rte_pci_addr *loc = &dev->addr;
struct mapped_pci_resource *vfio_res = NULL;
struct mapped_pci_res_list *vfio_res_list;
int ret;
int ret, vfio_dev_fd;
/* store PCI address string */
snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
loc->domain, loc->bus, loc->devid, loc->function);
vfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);
ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
dev->intr_handle.vfio_dev_fd);
vfio_dev_fd);
if (ret < 0) {
RTE_LOG(ERR, EAL, "Cannot release VFIO device\n");
return ret;
@ -1079,9 +1103,10 @@ void
pci_vfio_ioport_read(struct rte_pci_ioport *p,
void *data, size_t len, off_t offset)
{
const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
const struct rte_intr_handle *intr_handle = p->dev->intr_handle;
int vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
if (pread64(intr_handle->vfio_dev_fd, data,
if (pread64(vfio_dev_fd, data,
len, p->base + offset) <= 0)
RTE_LOG(ERR, EAL,
"Can't read from PCI bar (%" PRIu64 ") : offset (%x)\n",
@ -1092,9 +1117,10 @@ void
pci_vfio_ioport_write(struct rte_pci_ioport *p,
const void *data, size_t len, off_t offset)
{
const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
const struct rte_intr_handle *intr_handle = p->dev->intr_handle;
int vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
if (pwrite64(intr_handle->vfio_dev_fd, data,
if (pwrite64(vfio_dev_fd, data,
len, p->base + offset) <= 0)
RTE_LOG(ERR, EAL,
"Can't write to PCI bar (%" PRIu64 ") : offset (%x)\n",

49
drivers/bus/pci/pci_common.c
View File

@ -226,16 +226,39 @@ rte_pci_probe_one_driver(struct rte_pci_driver *dr,
return -EINVAL;
}
dev->driver = dr;
}
if (!already_probed && (dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING)) {
/* map resources for devices that use igb_uio */
ret = rte_pci_map_device(dev);
if (ret != 0) {
dev->driver = NULL;
return ret;
/* Allocate interrupt instance for pci device */
dev->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (dev->intr_handle == NULL) {
RTE_LOG(ERR, EAL,
"Failed to create interrupt instance for %s\n",
dev->device.name);
return -ENOMEM;
}
dev->vfio_req_intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (dev->vfio_req_intr_handle == NULL) {
rte_intr_instance_free(dev->intr_handle);
dev->intr_handle = NULL;
RTE_LOG(ERR, EAL,
"Failed to create vfio req interrupt instance for %s\n",
dev->device.name);
return -ENOMEM;
}
if (dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING) {
ret = rte_pci_map_device(dev);
if (ret != 0) {
rte_intr_instance_free(dev->vfio_req_intr_handle);
dev->vfio_req_intr_handle = NULL;
rte_intr_instance_free(dev->intr_handle);
dev->intr_handle = NULL;
return ret;
}
}
dev->driver = dr;
}
RTE_LOG(INFO, EAL, "Probe PCI driver: %s (%x:%x) device: "PCI_PRI_FMT" (socket %i)\n",
@ -248,6 +271,10 @@ rte_pci_probe_one_driver(struct rte_pci_driver *dr,
return ret; /* no rollback if already succeeded earlier */
if (ret) {
dev->driver = NULL;
rte_intr_instance_free(dev->vfio_req_intr_handle);
dev->vfio_req_intr_handle = NULL;
rte_intr_instance_free(dev->intr_handle);
dev->intr_handle = NULL;
if ((dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING) &&
/* Don't unmap if device is unsupported and
* driver needs mapped resources.
@ -295,6 +322,10 @@ rte_pci_detach_dev(struct rte_pci_device *dev)
/* clear driver structure */
dev->driver = NULL;
dev->device.driver = NULL;
rte_intr_instance_free(dev->intr_handle);
dev->intr_handle = NULL;
rte_intr_instance_free(dev->vfio_req_intr_handle);
dev->vfio_req_intr_handle = NULL;
if (dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING)
/* unmap resources for devices that use igb_uio */

21
drivers/bus/pci/pci_common_uio.c
View File

@ -90,8 +90,11 @@ pci_uio_map_resource(struct rte_pci_device *dev)
struct mapped_pci_res_list *uio_res_list =
RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
dev->intr_handle.fd = -1;
dev->intr_handle.uio_cfg_fd = -1;
if (rte_intr_fd_set(dev->intr_handle, -1))
return -1;
if (rte_intr_dev_fd_set(dev->intr_handle, -1))
return -1;
/* secondary processes - use already recorded details */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@ -207,6 +210,7 @@ pci_uio_unmap_resource(struct rte_pci_device *dev)
struct mapped_pci_resource *uio_res;
struct mapped_pci_res_list *uio_res_list =
RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
int uio_cfg_fd;
if (dev == NULL)
return;
@ -229,12 +233,13 @@ pci_uio_unmap_resource(struct rte_pci_device *dev)
rte_free(uio_res);
/* close fd if in primary process */
close(dev->intr_handle.fd);
if (dev->intr_handle.uio_cfg_fd >= 0) {
close(dev->intr_handle.uio_cfg_fd);
dev->intr_handle.uio_cfg_fd = -1;
close(rte_intr_fd_get(dev->intr_handle));
uio_cfg_fd = rte_intr_dev_fd_get(dev->intr_handle);
if (uio_cfg_fd >= 0) {
close(uio_cfg_fd);
rte_intr_dev_fd_set(dev->intr_handle, -1);
}
dev->intr_handle.fd = -1;
dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
rte_intr_fd_set(dev->intr_handle, -1);
rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);
}

4
drivers/bus/pci/rte_bus_pci.h
View File

@ -69,12 +69,12 @@ struct rte_pci_device {
struct rte_pci_id id; /**< PCI ID. */
struct rte_mem_resource mem_resource[PCI_MAX_RESOURCE];
/**< PCI Memory Resource */
struct rte_intr_handle intr_handle; /**< Interrupt handle */
struct rte_intr_handle *intr_handle; /**< Interrupt handle */
struct rte_pci_driver *driver; /**< PCI driver used in probing */
uint16_t max_vfs; /**< sriov enable if not zero */
enum rte_pci_kernel_driver kdrv; /**< Kernel driver passthrough */
char name[PCI_PRI_STR_SIZE+1]; /**< PCI location (ASCII) */
struct rte_intr_handle vfio_req_intr_handle;
struct rte_intr_handle *vfio_req_intr_handle;
/**< Handler of VFIO request interrupt */
};

6
drivers/bus/vmbus/linux/vmbus_bus.c
View File

@ -299,6 +299,12 @@ vmbus_scan_one(const char *name)
dev->device.devargs = vmbus_devargs_lookup(dev);
/* Allocate interrupt handle instance */
dev->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (dev->intr_handle == NULL)
goto error;
/* device is valid, add in list (sorted) */
VMBUS_LOG(DEBUG, "Adding vmbus device %s", name);

35
drivers/bus/vmbus/linux/vmbus_uio.c
View File

@ -30,9 +30,11 @@ static void *vmbus_map_addr;
/* Control interrupts */
void vmbus_uio_irq_control(struct rte_vmbus_device *dev, int32_t onoff)
{
if (write(dev->intr_handle.fd, &onoff, sizeof(onoff)) < 0) {
if (write(rte_intr_fd_get(dev->intr_handle), &onoff,
sizeof(onoff)) < 0) {
VMBUS_LOG(ERR, "cannot write to %d:%s",
dev->intr_handle.fd, strerror(errno));
rte_intr_fd_get(dev->intr_handle),
strerror(errno));
}
}
@ -41,7 +43,8 @@ int vmbus_uio_irq_read(struct rte_vmbus_device *dev)
int32_t count;
int cc;
cc = read(dev->intr_handle.fd, &count, sizeof(count));
cc = read(rte_intr_fd_get(dev->intr_handle), &count,
sizeof(count));
if (cc < (int)sizeof(count)) {
if (cc < 0) {
VMBUS_LOG(ERR, "IRQ read failed %s",
@ -61,15 +64,15 @@ vmbus_uio_free_resource(struct rte_vmbus_device *dev,
{
rte_free(uio_res);
if (dev->intr_handle.uio_cfg_fd >= 0) {
close(dev->intr_handle.uio_cfg_fd);
dev->intr_handle.uio_cfg_fd = -1;
if (rte_intr_dev_fd_get(dev->intr_handle) >= 0) {
close(rte_intr_dev_fd_get(dev->intr_handle));
rte_intr_dev_fd_set(dev->intr_handle, -1);
}
if (dev->intr_handle.fd >= 0) {
close(dev->intr_handle.fd);
dev->intr_handle.fd = -1;
dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
if (rte_intr_fd_get(dev->intr_handle) >= 0) {
close(rte_intr_fd_get(dev->intr_handle));
rte_intr_fd_set(dev->intr_handle, -1);
rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);
}
}
@ -78,16 +81,22 @@ vmbus_uio_alloc_resource(struct rte_vmbus_device *dev,
struct mapped_vmbus_resource **uio_res)
{
char devname[PATH_MAX]; /* contains the /dev/uioX */
int fd;
/* save fd if in primary process */
snprintf(devname, sizeof(devname), "/dev/uio%u", dev->uio_num);
dev->intr_handle.fd = open(devname, O_RDWR);
if (dev->intr_handle.fd < 0) {
fd = open(devname, O_RDWR);
if (fd < 0) {
VMBUS_LOG(ERR, "Cannot open %s: %s",
devname, strerror(errno));
goto error;
}
dev->intr_handle.type = RTE_INTR_HANDLE_UIO_INTX;
if (rte_intr_fd_set(dev->intr_handle, fd))
goto error;
if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO_INTX))
goto error;
/* allocate the mapping details for secondary processes*/
*uio_res = rte_zmalloc("UIO_RES", sizeof(**uio_res), 0);

2
drivers/bus/vmbus/rte_bus_vmbus.h
View File

@ -73,7 +73,7 @@ struct rte_vmbus_device {
struct vmbus_channel *primary; /**< VMBUS primary channel */
struct vmbus_mon_page *monitor_page; /**< VMBUS monitor page */
struct rte_intr_handle intr_handle; /**< Interrupt handle */
struct rte_intr_handle *intr_handle; /**< Interrupt handle */
struct rte_mem_resource resource[VMBUS_MAX_RESOURCE];
};

23
drivers/bus/vmbus/vmbus_common_uio.c
View File

@ -171,9 +171,14 @@ vmbus_uio_map_resource(struct rte_vmbus_device *dev)
int ret;
/* TODO: handle rescind */
dev->intr_handle.fd = -1;
dev->intr_handle.uio_cfg_fd = -1;
dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
if (rte_intr_fd_set(dev->intr_handle, -1))
return -1;
if (rte_intr_dev_fd_set(dev->intr_handle, -1))
return -1;
if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN))
return -1;
/* secondary processes - use already recorded details */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@ -253,12 +258,12 @@ vmbus_uio_unmap_resource(struct rte_vmbus_device *dev)
rte_free(uio_res);
/* close fd if in primary process */
close(dev->intr_handle.fd);
if (dev->intr_handle.uio_cfg_fd >= 0) {
close(dev->intr_handle.uio_cfg_fd);
dev->intr_handle.uio_cfg_fd = -1;
close(rte_intr_fd_get(dev->intr_handle));
if (rte_intr_dev_fd_get(dev->intr_handle) >= 0) {
close(rte_intr_dev_fd_get(dev->intr_handle));
rte_intr_dev_fd_set(dev->intr_handle, -1);
}
dev->intr_handle.fd = -1;
dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
rte_intr_fd_set(dev->intr_handle, -1);
rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);
}

8
drivers/common/cnxk/roc_cpt.c
View File

@ -65,7 +65,7 @@ cpt_lf_register_misc_irq(struct roc_cpt_lf *lf)
struct plt_intr_handle *handle;
int rc, vec;
handle = &pci_dev->intr_handle;
handle = pci_dev->intr_handle;
vec = lf->msixoff + CPT_LF_INT_VEC_MISC;
/* Clear err interrupt */
@ -85,7 +85,7 @@ cpt_lf_unregister_misc_irq(struct roc_cpt_lf *lf)
struct plt_intr_handle *handle;
int vec;
handle = &pci_dev->intr_handle;
handle = pci_dev->intr_handle;
vec = lf->msixoff + CPT_LF_INT_VEC_MISC;
/* Clear err interrupt */
@ -129,7 +129,7 @@ cpt_lf_register_done_irq(struct roc_cpt_lf *lf)
struct plt_intr_handle *handle;
int rc, vec;
handle = &pci_dev->intr_handle;
handle = pci_dev->intr_handle;
vec = lf->msixoff + CPT_LF_INT_VEC_DONE;
@ -152,7 +152,7 @@ cpt_lf_unregister_done_irq(struct roc_cpt_lf *lf)
struct plt_intr_handle *handle;
int vec;
handle = &pci_dev->intr_handle;
handle = pci_dev->intr_handle;
vec = lf->msixoff + CPT_LF_INT_VEC_DONE;

14
drivers/common/cnxk/roc_dev.c
View File

@ -641,7 +641,7 @@ roc_af_pf_mbox_irq(void *param)
static int
mbox_register_pf_irq(struct plt_pci_device *pci_dev, struct dev *dev)
{
struct plt_intr_handle *intr_handle = &pci_dev->intr_handle;
struct plt_intr_handle *intr_handle = pci_dev->intr_handle;
int i, rc;
/* HW clear irq */
@ -691,7 +691,7 @@ mbox_register_pf_irq(struct plt_pci_device *pci_dev, struct dev *dev)
static int
mbox_register_vf_irq(struct plt_pci_device *pci_dev, struct dev *dev)
{
struct plt_intr_handle *intr_handle = &pci_dev->intr_handle;
struct plt_intr_handle *intr_handle = pci_dev->intr_handle;
int rc;
/* Clear irq */
@ -724,7 +724,7 @@ mbox_register_irq(struct plt_pci_device *pci_dev, struct dev *dev)
static void
mbox_unregister_pf_irq(struct plt_pci_device *pci_dev, struct dev *dev)
{
struct plt_intr_handle *intr_handle = &pci_dev->intr_handle;
struct plt_intr_handle *intr_handle = pci_dev->intr_handle;
int i;
/* HW clear irq */
@ -755,7 +755,7 @@ mbox_unregister_pf_irq(struct plt_pci_device *pci_dev, struct dev *dev)
static void
mbox_unregister_vf_irq(struct plt_pci_device *pci_dev, struct dev *dev)
{
struct plt_intr_handle *intr_handle = &pci_dev->intr_handle;
struct plt_intr_handle *intr_handle = pci_dev->intr_handle;
/* Clear irq */
plt_write64(~0ull, dev->bar2 + RVU_VF_INT_ENA_W1C);
@ -839,7 +839,7 @@ roc_pf_vf_flr_irq(void *param)
static int
vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev)
{
struct plt_intr_handle *intr_handle = &pci_dev->intr_handle;
struct plt_intr_handle *intr_handle = pci_dev->intr_handle;
int i;
plt_base_dbg("Unregister VF FLR interrupts for %s", pci_dev->name);
@ -860,7 +860,7 @@ vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev)
static int
vf_flr_register_irqs(struct plt_pci_device *pci_dev, struct dev *dev)
{
struct plt_intr_handle *handle = &pci_dev->intr_handle;
struct plt_intr_handle *handle = pci_dev->intr_handle;
int i, rc;
plt_base_dbg("Register VF FLR interrupts for %s", pci_dev->name);
@ -1211,7 +1211,7 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev)
int
dev_fini(struct dev *dev, struct plt_pci_device *pci_dev)
{
struct plt_intr_handle *intr_handle = &pci_dev->intr_handle;
struct plt_intr_handle *intr_handle = pci_dev->intr_handle;
struct mbox *mbox;
/* Check if this dev hosts npalf and has 1+ refs */

107
drivers/common/cnxk/roc_irq.c
View File

@ -20,11 +20,12 @@ static int
irq_get_info(struct plt_intr_handle *intr_handle)
{
struct vfio_irq_info irq = {.argsz = sizeof(irq)};
int rc;
int rc, vfio_dev_fd;
irq.index = VFIO_PCI_MSIX_IRQ_INDEX;
rc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
vfio_dev_fd = plt_intr_dev_fd_get(intr_handle);
rc = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
if (rc < 0) {
plt_err("Failed to get IRQ info rc=%d errno=%d", rc, errno);
return rc;
@ -36,9 +37,10 @@ irq_get_info(struct plt_intr_handle *intr_handle)
if (irq.count > PLT_MAX_RXTX_INTR_VEC_ID) {
plt_err("HW max=%d > PLT_MAX_RXTX_INTR_VEC_ID: %d", irq.count,
PLT_MAX_RXTX_INTR_VEC_ID);
intr_handle->max_intr = PLT_MAX_RXTX_INTR_VEC_ID;
plt_intr_max_intr_set(intr_handle, PLT_MAX_RXTX_INTR_VEC_ID);
} else {
intr_handle->max_intr = irq.count;
if (plt_intr_max_intr_set(intr_handle, irq.count))
return -1;
}
return 0;
@ -49,12 +51,12 @@ irq_config(struct plt_intr_handle *intr_handle, unsigned int vec)
{
char irq_set_buf[MSIX_IRQ_SET_BUF_LEN];
struct vfio_irq_set *irq_set;
int len, rc, vfio_dev_fd;
int32_t *fd_ptr;
int len, rc;
if (vec > intr_handle->max_intr) {
if (vec > (uint32_t)plt_intr_max_intr_get(intr_handle)) {
plt_err("vector=%d greater than max_intr=%d", vec,
intr_handle->max_intr);
plt_intr_max_intr_get(intr_handle));
return -EINVAL;
}
@ -71,9 +73,10 @@ irq_config(struct plt_intr_handle *intr_handle, unsigned int vec)
/* Use vec fd to set interrupt vectors */
fd_ptr = (int32_t *)&irq_set->data[0];
fd_ptr[0] = intr_handle->efds[vec];
fd_ptr[0] = plt_intr_efds_index_get(intr_handle, vec);
rc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
vfio_dev_fd = plt_intr_dev_fd_get(intr_handle);
rc = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
if (rc)
plt_err("Failed to set_irqs vector=0x%x rc=%d", vec, rc);
@ -85,23 +88,25 @@ irq_init(struct plt_intr_handle *intr_handle)
{
char irq_set_buf[MSIX_IRQ_SET_BUF_LEN];
struct vfio_irq_set *irq_set;
int len, rc, vfio_dev_fd;
int32_t *fd_ptr;
int len, rc;
uint32_t i;
if (intr_handle->max_intr > PLT_MAX_RXTX_INTR_VEC_ID) {
if (plt_intr_max_intr_get(intr_handle) >
PLT_MAX_RXTX_INTR_VEC_ID) {
plt_err("Max_intr=%d greater than PLT_MAX_RXTX_INTR_VEC_ID=%d",
intr_handle->max_intr, PLT_MAX_RXTX_INTR_VEC_ID);
plt_intr_max_intr_get(intr_handle),
PLT_MAX_RXTX_INTR_VEC_ID);
return -ERANGE;
}
len = sizeof(struct vfio_irq_set) +
sizeof(int32_t) * intr_handle->max_intr;
sizeof(int32_t) * plt_intr_max_intr_get(intr_handle);
irq_set = (struct vfio_irq_set *)irq_set_buf;
irq_set->argsz = len;
irq_set->start = 0;
irq_set->count = intr_handle->max_intr;
irq_set->count = plt_intr_max_intr_get(intr_handle);
irq_set->flags =
VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
@ -110,7 +115,8 @@ irq_init(struct plt_intr_handle *intr_handle)
for (i = 0; i < irq_set->count; i++)
fd_ptr[i] = -1;
rc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
vfio_dev_fd = plt_intr_dev_fd_get(intr_handle);
rc = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
if (rc)
plt_err("Failed to set irqs vector rc=%d", rc);
@ -121,7 +127,7 @@ int
dev_irqs_disable(struct plt_intr_handle *intr_handle)
{
/* Clear max_intr to indicate re-init next time */
intr_handle->max_intr = 0;
plt_intr_max_intr_set(intr_handle, 0);
return plt_intr_disable(intr_handle);
}
@ -129,43 +135,49 @@ int
dev_irq_register(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,
void *data, unsigned int vec)
{
struct plt_intr_handle tmp_handle;
int rc;
struct plt_intr_handle *tmp_handle;
uint32_t nb_efd, tmp_nb_efd;
int rc, fd;
/* If no max_intr read from VFIO */
if (intr_handle->max_intr == 0) {
if (plt_intr_max_intr_get(intr_handle) == 0) {
irq_get_info(intr_handle);
irq_init(intr_handle);
}
if (vec > intr_handle->max_intr || vec >= PLT_DIM(intr_handle->efds)) {
plt_err("Vector=%d greater than max_intr=%d or "
"max_efd=%" PRIu64,
vec, intr_handle->max_intr, PLT_DIM(intr_handle->efds));
if (vec > (uint32_t)plt_intr_max_intr_get(intr_handle)) {
plt_err("Vector=%d greater than max_intr=%d or ",
vec, plt_intr_max_intr_get(intr_handle));
return -EINVAL;
}
tmp_handle = *intr_handle;
tmp_handle = intr_handle;
/* Create new eventfd for interrupt vector */
tmp_handle.fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
if (tmp_handle.fd == -1)
fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
if (fd == -1)
return -ENODEV;
if (plt_intr_fd_set(tmp_handle, fd))
return -errno;
/* Register vector interrupt callback */
rc = plt_intr_callback_register(&tmp_handle, cb, data);
rc = plt_intr_callback_register(tmp_handle, cb, data);
if (rc) {
plt_err("Failed to register vector:0x%x irq callback.", vec);
return rc;
}
intr_handle->efds[vec] = tmp_handle.fd;
intr_handle->nb_efd =
(vec > intr_handle->nb_efd) ? vec : intr_handle->nb_efd;
if ((intr_handle->nb_efd + 1) > intr_handle->max_intr)
intr_handle->max_intr = intr_handle->nb_efd + 1;
plt_intr_efds_index_set(intr_handle, vec, fd);
nb_efd = (vec > (uint32_t)plt_intr_nb_efd_get(intr_handle)) ?
vec : (uint32_t)plt_intr_nb_efd_get(intr_handle);
plt_intr_nb_efd_set(intr_handle, nb_efd);
tmp_nb_efd = plt_intr_nb_efd_get(intr_handle) + 1;
if (tmp_nb_efd > (uint32_t)plt_intr_max_intr_get(intr_handle))
plt_intr_max_intr_set(intr_handle, tmp_nb_efd);
plt_base_dbg("Enable vector:0x%x for vfio (efds: %d, max:%d)", vec,
intr_handle->nb_efd, intr_handle->max_intr);
plt_intr_nb_efd_get(intr_handle),
plt_intr_max_intr_get(intr_handle));
/* Enable MSIX vectors to VFIO */
return irq_config(intr_handle, vec);
@ -175,24 +187,27 @@ void
dev_irq_unregister(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,
void *data, unsigned int vec)
{
struct plt_intr_handle tmp_handle;
struct plt_intr_handle *tmp_handle;
uint8_t retries = 5; /* 5 ms */
int rc;
int rc, fd;
if (vec > intr_handle->max_intr) {
if (vec > (uint32_t)plt_intr_max_intr_get(intr_handle)) {
plt_err("Error unregistering MSI-X interrupts vec:%d > %d", vec,
intr_handle->max_intr);
plt_intr_max_intr_get(intr_handle));
return;
}
tmp_handle = *intr_handle;
tmp_handle.fd = intr_handle->efds[vec];
if (tmp_handle.fd == -1)
tmp_handle = intr_handle;
fd = plt_intr_efds_index_get(intr_handle, vec);
if (fd == -1)
return;
if (plt_intr_fd_set(tmp_handle, fd))
return;
do {
/* Un-register callback func from platform lib */
rc = plt_intr_callback_unregister(&tmp_handle, cb, data);
rc = plt_intr_callback_unregister(tmp_handle, cb, data);
/* Retry only if -EAGAIN */
if (rc != -EAGAIN)
break;
@ -206,12 +221,14 @@ dev_irq_unregister(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,
}
plt_base_dbg("Disable vector:0x%x for vfio (efds: %d, max:%d)", vec,
intr_handle->nb_efd, intr_handle->max_intr);
plt_intr_nb_efd_get(intr_handle),
plt_intr_max_intr_get(intr_handle));
if (intr_handle->efds[vec] != -1)
close(intr_handle->efds[vec]);
if (plt_intr_efds_index_get(intr_handle, vec) != -1)
close(plt_intr_efds_index_get(intr_handle, vec));
/* Disable MSIX vectors from VFIO */
intr_handle->efds[vec] = -1;
plt_intr_efds_index_set(intr_handle, vec, -1);
irq_config(intr_handle, vec);
}

8
drivers/common/cnxk/roc_nix_inl_dev_irq.c
View File

@ -99,7 +99,7 @@ nix_inl_sso_hws_irq(void *param)
int
nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev)
{
struct plt_intr_handle *handle = &inl_dev->pci_dev->intr_handle;
struct plt_intr_handle *handle = inl_dev->pci_dev->intr_handle;
uintptr_t ssow_base = inl_dev->ssow_base;
uintptr_t sso_base = inl_dev->sso_base;
uint16_t sso_msixoff, ssow_msixoff;
@ -147,7 +147,7 @@ nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev)
void
nix_inl_sso_unregister_irqs(struct nix_inl_dev *inl_dev)
{
struct plt_intr_handle *handle = &inl_dev->pci_dev->intr_handle;
struct plt_intr_handle *handle = inl_dev->pci_dev->intr_handle;
uintptr_t ssow_base = inl_dev->ssow_base;
uintptr_t sso_base = inl_dev->sso_base;
uint16_t sso_msixoff, ssow_msixoff;
@ -282,7 +282,7 @@ nix_inl_nix_err_irq(void *param)
int
nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
{
struct plt_intr_handle *handle = &inl_dev->pci_dev->intr_handle;
struct plt_intr_handle *handle = inl_dev->pci_dev->intr_handle;
uintptr_t nix_base = inl_dev->nix_base;
uint16_t msixoff;
int rc;
@ -331,7 +331,7 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)
void
nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev)
{
struct plt_intr_handle *handle = &inl_dev->pci_dev->intr_handle;
struct plt_intr_handle *handle = inl_dev->pci_dev->intr_handle;
uintptr_t nix_base = inl_dev->nix_base;
uint16_t msixoff;

36
drivers/common/cnxk/roc_nix_irq.c
View File

@ -82,7 +82,7 @@ nix_lf_err_irq(void *param)
static int
nix_lf_register_err_irq(struct nix *nix)
{
struct plt_intr_handle *handle = &nix->pci_dev->intr_handle;
struct plt_intr_handle *handle = nix->pci_dev->intr_handle;
int rc, vec;
vec = nix->msixoff + NIX_LF_INT_VEC_ERR_INT;
@ -99,7 +99,7 @@ nix_lf_register_err_irq(struct nix *nix)
static void
nix_lf_unregister_err_irq(struct nix *nix)
{
struct plt_intr_handle *handle = &nix->pci_dev->intr_handle;
struct plt_intr_handle *handle = nix->pci_dev->intr_handle;
int vec;
vec = nix->msixoff + NIX_LF_INT_VEC_ERR_INT;
@ -131,7 +131,7 @@ nix_lf_ras_irq(void *param)
static int
nix_lf_register_ras_irq(struct nix *nix)
{
struct plt_intr_handle *handle = &nix->pci_dev->intr_handle;
struct plt_intr_handle *handle = nix->pci_dev->intr_handle;
int rc, vec;
vec = nix->msixoff + NIX_LF_INT_VEC_POISON;
@ -148,7 +148,7 @@ nix_lf_register_ras_irq(struct nix *nix)
static void
nix_lf_unregister_ras_irq(struct nix *nix)
{
struct plt_intr_handle *handle = &nix->pci_dev->intr_handle;
struct plt_intr_handle *handle = nix->pci_dev->intr_handle;
int vec;
vec = nix->msixoff + NIX_LF_INT_VEC_POISON;
@ -300,7 +300,7 @@ roc_nix_register_queue_irqs(struct roc_nix *roc_nix)
struct nix *nix;
nix = roc_nix_to_nix_priv(roc_nix);
handle = &nix->pci_dev->intr_handle;
handle = nix->pci_dev->intr_handle;
/* Figure out max qintx required */
rqs = PLT_MIN(nix->qints, nix->nb_rx_queues);
@ -352,7 +352,7 @@ roc_nix_unregister_queue_irqs(struct roc_nix *roc_nix)
int vec, q;
nix = roc_nix_to_nix_priv(roc_nix);
handle = &nix->pci_dev->intr_handle;
handle = nix->pci_dev->intr_handle;
for (q = 0; q < nix->configured_qints; q++) {
vec = nix->msixoff + NIX_LF_INT_VEC_QINT_START + q;
@ -382,7 +382,7 @@ roc_nix_register_cq_irqs(struct roc_nix *roc_nix)
struct nix *nix;
nix = roc_nix_to_nix_priv(roc_nix);
handle = &nix->pci_dev->intr_handle;
handle = nix->pci_dev->intr_handle;
nix->configured_cints = PLT_MIN(nix->cints, nix->nb_rx_queues);
@ -414,19 +414,19 @@ roc_nix_register_cq_irqs(struct roc_nix *roc_nix)
return rc;
}
if (!handle->intr_vec) {
handle->intr_vec = plt_zmalloc(
nix->configured_cints * sizeof(int), 0);
if (!handle->intr_vec) {
plt_err("Failed to allocate %d rx intr_vec",
nix->configured_cints);
return -ENOMEM;
}
rc = plt_intr_vec_list_alloc(handle, "cnxk",
nix->configured_cints);
if (rc) {
plt_err("Fail to allocate intr vec list, rc=%d",
rc);
return rc;
}
/* VFIO vector zero is resereved for misc interrupt so
* doing required adjustment. (b13bfab4cd)
*/
handle->intr_vec[q] = PLT_INTR_VEC_RXTX_OFFSET + vec;
if (plt_intr_vec_list_index_set(handle, q,
PLT_INTR_VEC_RXTX_OFFSET + vec))
return -1;
/* Configure CQE interrupt coalescing parameters */
plt_write64(((CQ_CQE_THRESH_DEFAULT) |
@ -450,7 +450,7 @@ roc_nix_unregister_cq_irqs(struct roc_nix *roc_nix)
int vec, q;
nix = roc_nix_to_nix_priv(roc_nix);
handle = &nix->pci_dev->intr_handle;
handle = nix->pci_dev->intr_handle;
for (q = 0; q < nix->configured_cints; q++) {
vec = nix->msixoff + NIX_LF_INT_VEC_CINT_START + q;
@ -465,6 +465,8 @@ roc_nix_unregister_cq_irqs(struct roc_nix *roc_nix)
dev_irq_unregister(handle, nix_lf_cq_irq, &nix->cints_mem[q],
vec);
}
plt_intr_vec_list_free(handle);
plt_free(nix->cints_mem);
}

2
drivers/common/cnxk/roc_npa.c
View File

@ -710,7 +710,7 @@ npa_lf_init(struct dev *dev, struct plt_pci_device *pci_dev)
lf->pf_func = dev->pf_func;
lf->npa_msixoff = npa_msixoff;
lf->intr_handle = &pci_dev->intr_handle;
lf->intr_handle = pci_dev->intr_handle;
lf->pci_dev = pci_dev;
idev->npa_pf_func = dev->pf_func;

48
drivers/common/cnxk/roc_platform.h
View File

@ -106,6 +106,32 @@
#define plt_thread_is_intr rte_thread_is_intr
#define plt_intr_callback_fn rte_intr_callback_fn
#define plt_intr_efd_counter_size_get rte_intr_efd_counter_size_get
#define plt_intr_efd_counter_size_set rte_intr_efd_counter_size_set
#define plt_intr_vec_list_index_get rte_intr_vec_list_index_get
#define plt_intr_vec_list_index_set rte_intr_vec_list_index_set
#define plt_intr_vec_list_alloc rte_intr_vec_list_alloc
#define plt_intr_vec_list_free rte_intr_vec_list_free
#define plt_intr_fd_set rte_intr_fd_set
#define plt_intr_fd_get rte_intr_fd_get
#define plt_intr_dev_fd_get rte_intr_dev_fd_get
#define plt_intr_dev_fd_set rte_intr_dev_fd_set
#define plt_intr_type_get rte_intr_type_get
#define plt_intr_type_set rte_intr_type_set
#define plt_intr_instance_alloc rte_intr_instance_alloc
#define plt_intr_instance_dup rte_intr_instance_dup
#define plt_intr_instance_free rte_intr_instance_free
#define plt_intr_max_intr_get rte_intr_max_intr_get
#define plt_intr_max_intr_set rte_intr_max_intr_set
#define plt_intr_nb_efd_get rte_intr_nb_efd_get
#define plt_intr_nb_efd_set rte_intr_nb_efd_set
#define plt_intr_nb_intr_get rte_intr_nb_intr_get
#define plt_intr_nb_intr_set rte_intr_nb_intr_set
#define plt_intr_efds_index_get rte_intr_efds_index_get
#define plt_intr_efds_index_set rte_intr_efds_index_set
#define plt_intr_elist_index_get rte_intr_elist_index_get
#define plt_intr_elist_index_set rte_intr_elist_index_set
#define plt_alarm_set rte_eal_alarm_set
#define plt_alarm_cancel rte_eal_alarm_cancel
@ -183,7 +209,7 @@ extern int cnxk_logtype_tm;
#define plt_dbg(subsystem, fmt, args...) \
rte_log(RTE_LOG_DEBUG, cnxk_logtype_##subsystem, \
"[%s] %s():%u " fmt "\n", #subsystem, __func__, __LINE__, \
##args)
##args)
#define plt_base_dbg(fmt, ...) plt_dbg(base, fmt, ##__VA_ARGS__)
#define plt_cpt_dbg(fmt, ...) plt_dbg(cpt, fmt, ##__VA_ARGS__)
@ -203,18 +229,18 @@ extern int cnxk_logtype_tm;
#ifdef __cplusplus
#define CNXK_PCI_ID(subsystem_dev, dev) \
{ \
RTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \
(subsystem_dev), \
}
{ \
RTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \
(subsystem_dev), \
}
#else
#define CNXK_PCI_ID(subsystem_dev, dev) \
{ \
.class_id = RTE_CLASS_ANY_ID, \
.vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev), \
.subsystem_vendor_id = RTE_PCI_ANY_ID, \
.subsystem_device_id = (subsystem_dev), \
}
{ \
.class_id = RTE_CLASS_ANY_ID, \
.vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev), \
.subsystem_vendor_id = RTE_PCI_ANY_ID, \
.subsystem_device_id = (subsystem_dev), \
}
#endif
__rte_internal

4
drivers/common/cnxk/roc_sso.c
View File

@ -505,7 +505,7 @@ roc_sso_rsrc_init(struct roc_sso *roc_sso, uint8_t nb_hws, uint16_t nb_hwgrp)
goto sso_msix_fail;
}
rc = sso_register_irqs_priv(roc_sso, &sso->pci_dev->intr_handle, nb_hws,
rc = sso_register_irqs_priv(roc_sso, sso->pci_dev->intr_handle, nb_hws,
nb_hwgrp);
if (rc < 0) {
plt_err("Failed to register SSO LF IRQs");
@ -535,7 +535,7 @@ roc_sso_rsrc_fini(struct roc_sso *roc_sso)
if (!roc_sso->nb_hws && !roc_sso->nb_hwgrp)
return;
sso_unregister_irqs_priv(roc_sso, &sso->pci_dev->intr_handle,
sso_unregister_irqs_priv(roc_sso, sso->pci_dev->intr_handle,
roc_sso->nb_hws, roc_sso->nb_hwgrp);
sso_lf_free(&sso->dev, SSO_LF_TYPE_HWS, roc_sso->nb_hws);
sso_lf_free(&sso->dev, SSO_LF_TYPE_HWGRP, roc_sso->nb_hwgrp);

4
drivers/common/cnxk/roc_tim.c
View File

@ -200,7 +200,7 @@ roc_tim_lf_alloc(struct roc_tim *roc_tim, uint8_t ring_id, uint64_t *clk)
if (clk)
*clk = rsp->tenns_clk;
rc = tim_register_irq_priv(roc_tim, &sso->pci_dev->intr_handle, ring_id,
rc = tim_register_irq_priv(roc_tim, sso->pci_dev->intr_handle, ring_id,
tim->tim_msix_offsets[ring_id]);
if (rc < 0) {
plt_tim_dbg("Failed to register Ring[%d] IRQ", ring_id);
@ -223,7 +223,7 @@ roc_tim_lf_free(struct roc_tim *roc_tim, uint8_t ring_id)
struct tim_ring_req *req;
int rc = -ENOSPC;
tim_unregister_irq_priv(roc_tim, &sso->pci_dev->intr_handle, ring_id,
tim_unregister_irq_priv(roc_tim, sso->pci_dev->intr_handle, ring_id,
tim->tim_msix_offsets[ring_id]);
req = mbox_alloc_msg_tim_lf_free(dev->mbox);

14
drivers/common/octeontx2/otx2_dev.c
View File

@ -643,7 +643,7 @@ otx2_af_pf_mbox_irq(void *param)
static int
mbox_register_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
{
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int i, rc;
/* HW clear irq */
@ -693,7 +693,7 @@ mbox_register_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
static int
mbox_register_vf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
{
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int rc;
/* Clear irq */
@ -726,7 +726,7 @@ mbox_register_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
static void
mbox_unregister_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
{
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int i;
/* HW clear irq */
@ -758,7 +758,7 @@ mbox_unregister_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
static void
mbox_unregister_vf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
{
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
/* Clear irq */
otx2_write64(~0ull, dev->bar2 + RVU_VF_INT_ENA_W1C);
@ -841,7 +841,7 @@ otx2_pf_vf_flr_irq(void *param)
static int
vf_flr_unregister_irqs(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
{
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int i;
otx2_base_dbg("Unregister VF FLR interrupts for %s", pci_dev->name);
@ -862,7 +862,7 @@ vf_flr_unregister_irqs(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
static int
vf_flr_register_irqs(struct rte_pci_device *pci_dev, struct otx2_dev *dev)
{
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
int i, rc;
otx2_base_dbg("Register VF FLR interrupts for %s", pci_dev->name);
@ -1039,7 +1039,7 @@ otx2_dev_priv_init(struct rte_pci_device *pci_dev, void *otx2_dev)
void
otx2_dev_fini(struct rte_pci_device *pci_dev, void *otx2_dev)
{
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct otx2_dev *dev = otx2_dev;
struct otx2_idev_cfg *idev;
struct otx2_mbox *mbox;

117
drivers/common/octeontx2/otx2_irq.c
View File

@ -26,11 +26,12 @@ static int
irq_get_info(struct rte_intr_handle *intr_handle)
{
struct vfio_irq_info irq = { .argsz = sizeof(irq) };
int rc;
int rc, vfio_dev_fd;
irq.index = VFIO_PCI_MSIX_IRQ_INDEX;
rc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
rc = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
if (rc < 0) {
otx2_err("Failed to get IRQ info rc=%d errno=%d", rc, errno);
return rc;
@ -41,10 +42,13 @@ irq_get_info(struct rte_intr_handle *intr_handle)
if (irq.count > MAX_INTR_VEC_ID) {
otx2_err("HW max=%d > MAX_INTR_VEC_ID: %d",
intr_handle->max_intr, MAX_INTR_VEC_ID);
intr_handle->max_intr = MAX_INTR_VEC_ID;
rte_intr_max_intr_get(intr_handle),
MAX_INTR_VEC_ID);
if (rte_intr_max_intr_set(intr_handle, MAX_INTR_VEC_ID))
return -1;
} else {
intr_handle->max_intr = irq.count;
if (rte_intr_max_intr_set(intr_handle, irq.count))
return -1;
}
return 0;
@ -55,12 +59,12 @@ irq_config(struct rte_intr_handle *intr_handle, unsigned int vec)
{
char irq_set_buf[MSIX_IRQ_SET_BUF_LEN];
struct vfio_irq_set *irq_set;
int len, rc, vfio_dev_fd;
int32_t *fd_ptr;
int len, rc;
if (vec > intr_handle->max_intr) {
if (vec > (uint32_t)rte_intr_max_intr_get(intr_handle)) {
otx2_err("vector=%d greater than max_intr=%d", vec,
intr_handle->max_intr);
rte_intr_max_intr_get(intr_handle));
return -EINVAL;
}
@ -77,9 +81,10 @@ irq_config(struct rte_intr_handle *intr_handle, unsigned int vec)
/* Use vec fd to set interrupt vectors */
fd_ptr = (int32_t *)&irq_set->data[0];
fd_ptr[0] = intr_handle->efds[vec];
fd_ptr[0] = rte_intr_efds_index_get(intr_handle, vec);
rc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
rc = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
if (rc)
otx2_err("Failed to set_irqs vector=0x%x rc=%d", vec, rc);
@ -91,23 +96,24 @@ irq_init(struct rte_intr_handle *intr_handle)
{
char irq_set_buf[MSIX_IRQ_SET_BUF_LEN];
struct vfio_irq_set *irq_set;
int len, rc, vfio_dev_fd;
int32_t *fd_ptr;
int len, rc;
uint32_t i;
if (intr_handle->max_intr > MAX_INTR_VEC_ID) {
if (rte_intr_max_intr_get(intr_handle) > MAX_INTR_VEC_ID) {
otx2_err("Max_intr=%d greater than MAX_INTR_VEC_ID=%d",
intr_handle->max_intr, MAX_INTR_VEC_ID);
rte_intr_max_intr_get(intr_handle),
MAX_INTR_VEC_ID);
return -ERANGE;
}
len = sizeof(struct vfio_irq_set) +
sizeof(int32_t) * intr_handle->max_intr;
sizeof(int32_t) * rte_intr_max_intr_get(intr_handle);
irq_set = (struct vfio_irq_set *)irq_set_buf;
irq_set->argsz = len;
irq_set->start = 0;
irq_set->count = intr_handle->max_intr;
irq_set->count = rte_intr_max_intr_get(intr_handle);
irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
VFIO_IRQ_SET_ACTION_TRIGGER;
irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
@ -116,7 +122,8 @@ irq_init(struct rte_intr_handle *intr_handle)
for (i = 0; i < irq_set->count; i++)
fd_ptr[i] = -1;
rc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
rc = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
if (rc)
otx2_err("Failed to set irqs vector rc=%d", rc);
@ -131,7 +138,8 @@ int
otx2_disable_irqs(struct rte_intr_handle *intr_handle)
{
/* Clear max_intr to indicate re-init next time */
intr_handle->max_intr = 0;
if (rte_intr_max_intr_set(intr_handle, 0))
return -1;
return rte_intr_disable(intr_handle);
}
@ -143,42 +151,50 @@ int
otx2_register_irq(struct rte_intr_handle *intr_handle,
rte_intr_callback_fn cb, void *data, unsigned int vec)
{
struct rte_intr_handle tmp_handle;
int rc;
struct rte_intr_handle *tmp_handle;
uint32_t nb_efd, tmp_nb_efd;
int rc, fd;
/* If no max_intr read from VFIO */
if (intr_handle->max_intr == 0) {
if (rte_intr_max_intr_get(intr_handle) == 0) {
irq_get_info(intr_handle);
irq_init(intr_handle);
}
if (vec > intr_handle->max_intr) {
if (vec > (uint32_t)rte_intr_max_intr_get(intr_handle)) {
otx2_err("Vector=%d greater than max_intr=%d", vec,
intr_handle->max_intr);
rte_intr_max_intr_get(intr_handle));
return -EINVAL;
}
tmp_handle = *intr_handle;
tmp_handle = intr_handle;
/* Create new eventfd for interrupt vector */
tmp_handle.fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
if (tmp_handle.fd == -1)
fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
if (fd == -1)
return -ENODEV;
if (rte_intr_fd_set(tmp_handle, fd))
return errno;
/* Register vector interrupt callback */
rc = rte_intr_callback_register(&tmp_handle, cb, data);
rc = rte_intr_callback_register(tmp_handle, cb, data);
if (rc) {
otx2_err("Failed to register vector:0x%x irq callback.", vec);
return rc;
}
intr_handle->efds[vec] = tmp_handle.fd;
intr_handle->nb_efd = (vec > intr_handle->nb_efd) ?
vec : intr_handle->nb_efd;
if ((intr_handle->nb_efd + 1) > intr_handle->max_intr)
intr_handle->max_intr = intr_handle->nb_efd + 1;
rte_intr_efds_index_set(intr_handle, vec, fd);
nb_efd = (vec > (uint32_t)rte_intr_nb_efd_get(intr_handle)) ?
vec : (uint32_t)rte_intr_nb_efd_get(intr_handle);
rte_intr_nb_efd_set(intr_handle, nb_efd);
otx2_base_dbg("Enable vector:0x%x for vfio (efds: %d, max:%d)",
vec, intr_handle->nb_efd, intr_handle->max_intr);
tmp_nb_efd = rte_intr_nb_efd_get(intr_handle) + 1;
if (tmp_nb_efd > (uint32_t)rte_intr_max_intr_get(intr_handle))
rte_intr_max_intr_set(intr_handle, tmp_nb_efd);
otx2_base_dbg("Enable vector:0x%x for vfio (efds: %d, max:%d)", vec,
rte_intr_nb_efd_get(intr_handle),
rte_intr_max_intr_get(intr_handle));
/* Enable MSIX vectors to VFIO */
return irq_config(intr_handle, vec);
@ -192,24 +208,27 @@ void
otx2_unregister_irq(struct rte_intr_handle *intr_handle,
rte_intr_callback_fn cb, void *data, unsigned int vec)
{
struct rte_intr_handle tmp_handle;
struct rte_intr_handle *tmp_handle;
uint8_t retries = 5; /* 5 ms */
int rc;
int rc, fd;
if (vec > intr_handle->max_intr) {
if (vec > (uint32_t)rte_intr_max_intr_get(intr_handle)) {
otx2_err("Error unregistering MSI-X interrupts vec:%d > %d",
vec, intr_handle->max_intr);
vec, rte_intr_max_intr_get(intr_handle));
return;
}
tmp_handle = *intr_handle;
tmp_handle.fd = intr_handle->efds[vec];
if (tmp_handle.fd == -1)
tmp_handle = intr_handle;
fd = rte_intr_efds_index_get(intr_handle, vec);
if (fd == -1)
return;
if (rte_intr_fd_set(tmp_handle, fd))
return;
do {
/* Un-register callback func from eal lib */
rc = rte_intr_callback_unregister(&tmp_handle, cb, data);
/* Un-register callback func from platform lib */
rc = rte_intr_callback_unregister(tmp_handle, cb, data);
/* Retry only if -EAGAIN */
if (rc != -EAGAIN)
break;
@ -218,18 +237,18 @@ otx2_unregister_irq(struct rte_intr_handle *intr_handle,
} while (retries);
if (rc < 0) {
otx2_err("Error unregistering MSI-X intr vec %d cb, rc=%d",
vec, rc);
otx2_err("Error unregistering MSI-X vec %d cb, rc=%d", vec, rc);
return;
}
otx2_base_dbg("Disable vector:0x%x for vfio (efds: %d, max:%d)",
vec, intr_handle->nb_efd, intr_handle->max_intr);
otx2_base_dbg("Disable vector:0x%x for vfio (efds: %d, max:%d)", vec,
rte_intr_nb_efd_get(intr_handle),
rte_intr_max_intr_get(intr_handle));
if (intr_handle->efds[vec] != -1)
close(intr_handle->efds[vec]);
if (rte_intr_efds_index_get(intr_handle, vec) != -1)
close(rte_intr_efds_index_get(intr_handle, vec));
/* Disable MSIX vectors from VFIO */
intr_handle->efds[vec] = -1;
rte_intr_efds_index_set(intr_handle, vec, -1);
irq_config(intr_handle, vec);
}

4
drivers/crypto/octeontx2/otx2_cryptodev_hw_access.c
View File

@ -36,7 +36,7 @@ otx2_cpt_lf_err_intr_unregister(const struct rte_cryptodev *dev,
uint16_t msix_off, uintptr_t base)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
/* Disable error interrupts */
otx2_write64(~0ull, base + OTX2_CPT_LF_MISC_INT_ENA_W1C);
@ -65,7 +65,7 @@ otx2_cpt_lf_err_intr_register(const struct rte_cryptodev *dev,
uint16_t msix_off, uintptr_t base)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
int ret;
/* Disable error interrupts */

12
drivers/event/octeontx2/otx2_evdev_irq.c
View File

@ -29,7 +29,7 @@ sso_lf_register_irq(const struct rte_eventdev *event_dev, uint16_t ggrp_msixoff,
uintptr_t base)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(event_dev->dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
int rc, vec;
vec = ggrp_msixoff + SSO_LF_INT_VEC_GRP;
@ -66,7 +66,7 @@ ssow_lf_register_irq(const struct rte_eventdev *event_dev, uint16_t gws_msixoff,
uintptr_t base)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(event_dev->dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
int rc, vec;
vec = gws_msixoff + SSOW_LF_INT_VEC_IOP;
@ -86,7 +86,7 @@ sso_lf_unregister_irq(const struct rte_eventdev *event_dev,
uint16_t ggrp_msixoff, uintptr_t base)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(event_dev->dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
int vec;
vec = ggrp_msixoff + SSO_LF_INT_VEC_GRP;
@ -101,7 +101,7 @@ ssow_lf_unregister_irq(const struct rte_eventdev *event_dev,
uint16_t gws_msixoff, uintptr_t base)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(event_dev->dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
int vec;
vec = gws_msixoff + SSOW_LF_INT_VEC_IOP;
@ -198,7 +198,7 @@ static int
tim_lf_register_irq(struct rte_pci_device *pci_dev, uint16_t tim_msixoff,
uintptr_t base)
{
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
int rc, vec;
vec = tim_msixoff + TIM_LF_INT_VEC_NRSPERR_INT;
@ -226,7 +226,7 @@ static void
tim_lf_unregister_irq(struct rte_pci_device *pci_dev, uint16_t tim_msixoff,
uintptr_t base)
{
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
int vec;
vec = tim_msixoff + TIM_LF_INT_VEC_NRSPERR_INT;

2
drivers/mempool/octeontx2/otx2_mempool.c
View File

@ -301,7 +301,7 @@ otx2_npa_lf_init(struct rte_pci_device *pci_dev, void *otx2_dev)
lf->pf_func = dev->pf_func;
lf->npa_msixoff = npa_msixoff;
lf->intr_handle = &pci_dev->intr_handle;
lf->intr_handle = pci_dev->intr_handle;
lf->pci_dev = pci_dev;
idev->npa_pf_func = dev->pf_func;

20
drivers/net/atlantic/atl_ethdev.c
View File

@ -359,7 +359,7 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev)
{
struct atl_adapter *adapter = eth_dev->data->dev_private;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
int err = 0;
@ -478,7 +478,7 @@ atl_dev_start(struct rte_eth_dev *dev)
{
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t intr_vector = 0;
int status;
int err;
@ -524,10 +524,9 @@ atl_dev_start(struct rte_eth_dev *dev)
}
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec = rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
@ -607,7 +606,7 @@ atl_dev_stop(struct rte_eth_dev *dev)
struct aq_hw_s *hw =
ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
PMD_INIT_FUNC_TRACE();
dev->data->dev_started = 0;
@ -637,10 +636,7 @@ atl_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
return 0;
}
@ -691,7 +687,7 @@ static int
atl_dev_close(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct aq_hw_s *hw;
int ret;

8
drivers/net/avp/avp_ethdev.c
View File

@ -711,7 +711,7 @@ avp_dev_interrupt_handler(void *data)
status);
/* re-enable UIO interrupt handling */
ret = rte_intr_ack(&pci_dev->intr_handle);
ret = rte_intr_ack(pci_dev->intr_handle);
if (ret < 0) {
PMD_DRV_LOG(ERR, "Failed to re-enable UIO interrupts, ret=%d\n",
ret);
@ -730,7 +730,7 @@ avp_dev_enable_interrupts(struct rte_eth_dev *eth_dev)
return -EINVAL;
/* enable UIO interrupt handling */
ret = rte_intr_enable(&pci_dev->intr_handle);
ret = rte_intr_enable(pci_dev->intr_handle);
if (ret < 0) {
PMD_DRV_LOG(ERR, "Failed to enable UIO interrupts, ret=%d\n",
ret);
@ -759,7 +759,7 @@ avp_dev_disable_interrupts(struct rte_eth_dev *eth_dev)
RTE_PTR_ADD(registers, RTE_AVP_INTERRUPT_MASK_OFFSET));
/* enable UIO interrupt handling */
ret = rte_intr_disable(&pci_dev->intr_handle);
ret = rte_intr_disable(pci_dev->intr_handle);
if (ret < 0) {
PMD_DRV_LOG(ERR, "Failed to disable UIO interrupts, ret=%d\n",
ret);
@ -776,7 +776,7 @@ avp_dev_setup_interrupts(struct rte_eth_dev *eth_dev)
int ret;
/* register a callback handler with UIO for interrupt notifications */
ret = rte_intr_callback_register(&pci_dev->intr_handle,
ret = rte_intr_callback_register(pci_dev->intr_handle,
avp_dev_interrupt_handler,
(void *)eth_dev);
if (ret < 0) {

12
drivers/net/axgbe/axgbe_ethdev.c
View File

@ -313,7 +313,7 @@ axgbe_dev_interrupt_handler(void *param)
}
}
/* Unmask interrupts since disabled after generation */
rte_intr_ack(&pdata->pci_dev->intr_handle);
rte_intr_ack(pdata->pci_dev->intr_handle);
}
/*
@ -374,7 +374,7 @@ axgbe_dev_start(struct rte_eth_dev *dev)
}
/* enable uio/vfio intr/eventfd mapping */
rte_intr_enable(&pdata->pci_dev->intr_handle);
rte_intr_enable(pdata->pci_dev->intr_handle);
/* phy start*/
pdata->phy_if.phy_start(pdata);
@ -406,7 +406,7 @@ axgbe_dev_stop(struct rte_eth_dev *dev)
PMD_INIT_FUNC_TRACE();
rte_intr_disable(&pdata->pci_dev->intr_handle);
rte_intr_disable(pdata->pci_dev->intr_handle);
if (rte_bit_relaxed_get32(AXGBE_STOPPED, &pdata->dev_state))
return 0;
@ -2311,7 +2311,7 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
return ret;
}
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
axgbe_dev_interrupt_handler,
(void *)eth_dev);
PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x",
@ -2335,8 +2335,8 @@ axgbe_dev_close(struct rte_eth_dev *eth_dev)
axgbe_dev_clear_queues(eth_dev);
/* disable uio intr before callback unregister */
rte_intr_disable(&pci_dev->intr_handle);
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_disable(pci_dev->intr_handle);
rte_intr_callback_unregister(pci_dev->intr_handle,
axgbe_dev_interrupt_handler,
(void *)eth_dev);

6
drivers/net/axgbe/axgbe_mdio.c
View File

@ -933,7 +933,7 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)
}
/* Disable auto-negotiation interrupt */
rte_intr_disable(&pdata->pci_dev->intr_handle);
rte_intr_disable(pdata->pci_dev->intr_handle);
/* Start auto-negotiation in a supported mode */
if (axgbe_use_mode(pdata, AXGBE_MODE_KR)) {
@ -951,7 +951,7 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)
} else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_100)) {
axgbe_set_mode(pdata, AXGBE_MODE_SGMII_100);
} else {
rte_intr_enable(&pdata->pci_dev->intr_handle);
rte_intr_enable(pdata->pci_dev->intr_handle);
return -EINVAL;
}
@ -964,7 +964,7 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)
pdata->kx_state = AXGBE_RX_BPA;
/* Re-enable auto-negotiation interrupt */
rte_intr_enable(&pdata->pci_dev->intr_handle);
rte_intr_enable(pdata->pci_dev->intr_handle);
axgbe_an37_enable_interrupts(pdata);
axgbe_an_init(pdata);

10
drivers/net/bnx2x/bnx2x_ethdev.c
View File

@ -134,7 +134,7 @@ bnx2x_interrupt_handler(void *param)
PMD_DEBUG_PERIODIC_LOG(INFO, sc, "Interrupt handled");
bnx2x_interrupt_action(dev, 1);
rte_intr_ack(&sc->pci_dev->intr_handle);
rte_intr_ack(sc->pci_dev->intr_handle);
}
static void bnx2x_periodic_start(void *param)
@ -230,10 +230,10 @@ bnx2x_dev_start(struct rte_eth_dev *dev)
}
if (IS_PF(sc)) {
rte_intr_callback_register(&sc->pci_dev->intr_handle,
rte_intr_callback_register(sc->pci_dev->intr_handle,
bnx2x_interrupt_handler, (void *)dev);
if (rte_intr_enable(&sc->pci_dev->intr_handle))
if (rte_intr_enable(sc->pci_dev->intr_handle))
PMD_DRV_LOG(ERR, sc, "rte_intr_enable failed");
}
@ -258,8 +258,8 @@ bnx2x_dev_stop(struct rte_eth_dev *dev)
bnx2x_dev_rxtx_init_dummy(dev);
if (IS_PF(sc)) {
rte_intr_disable(&sc->pci_dev->intr_handle);
rte_intr_callback_unregister(&sc->pci_dev->intr_handle,
rte_intr_disable(sc->pci_dev->intr_handle);
rte_intr_callback_unregister(sc->pci_dev->intr_handle,
bnx2x_interrupt_handler, (void *)dev);
/* stop the periodic callout */

33
drivers/net/bnxt/bnxt_ethdev.c
View File

@ -729,7 +729,7 @@ static int bnxt_alloc_prev_ring_stats(struct bnxt *bp)
static int bnxt_start_nic(struct bnxt *bp)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t intr_vector = 0;
uint32_t queue_id, base = BNXT_MISC_VEC_ID;
uint32_t vec = BNXT_MISC_VEC_ID;
@ -846,26 +846,24 @@ static int bnxt_start_nic(struct bnxt *bp)
return rc;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
bp->eth_dev->data->nb_rx_queues *
sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
bp->eth_dev->data->nb_rx_queues)) {
PMD_DRV_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", bp->eth_dev->data->nb_rx_queues);
rc = -ENOMEM;
goto err_out;
}
PMD_DRV_LOG(DEBUG, "intr_handle->intr_vec = %p "
"intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
intr_handle->intr_vec, intr_handle->nb_efd,
intr_handle->max_intr);
PMD_DRV_LOG(DEBUG, "intr_handle->nb_efd = %d "
"intr_handle->max_intr = %d\n",
rte_intr_nb_efd_get(intr_handle),
rte_intr_max_intr_get(intr_handle));
for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
queue_id++) {
intr_handle->intr_vec[queue_id] =
vec + BNXT_RX_VEC_START;
if (vec < base + intr_handle->nb_efd - 1)
rte_intr_vec_list_index_set(intr_handle,
queue_id, vec + BNXT_RX_VEC_START);
if (vec < base + rte_intr_nb_efd_get(intr_handle)
- 1)
vec++;
}
}
@ -1473,7 +1471,7 @@ static int bnxt_dev_stop(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct rte_eth_link link;
int ret;
@ -1515,10 +1513,7 @@ static int bnxt_dev_stop(struct rte_eth_dev *eth_dev)
/* Clean queue intr-vector mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
bnxt_hwrm_port_clr_stats(bp);
bnxt_free_tx_mbufs(bp);

4
drivers/net/bnxt/bnxt_irq.c
View File

@ -67,7 +67,7 @@ void bnxt_int_handler(void *param)
int bnxt_free_int(struct bnxt *bp)
{
struct rte_intr_handle *intr_handle = &bp->pdev->intr_handle;
struct rte_intr_handle *intr_handle = bp->pdev->intr_handle;
struct bnxt_irq *irq = bp->irq_tbl;
int rc = 0;
@ -170,7 +170,7 @@ int bnxt_setup_int(struct bnxt *bp)
int bnxt_request_int(struct bnxt *bp)
{
struct rte_intr_handle *intr_handle = &bp->pdev->intr_handle;
struct rte_intr_handle *intr_handle = bp->pdev->intr_handle;
struct bnxt_irq *irq = bp->irq_tbl;
int rc = 0;

48
drivers/net/dpaa/dpaa_ethdev.c
View File

@ -208,7 +208,7 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev)
PMD_INIT_FUNC_TRACE();
dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
intr_handle = &dpaa_dev->intr_handle;
intr_handle = dpaa_dev->intr_handle;
__fif = container_of(fif, struct __fman_if, __if);
/* Rx offloads which are enabled by default */
@ -255,13 +255,14 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev)
}
/* if the interrupts were configured on this devices*/
if (intr_handle && intr_handle->fd) {
if (intr_handle && rte_intr_fd_get(intr_handle)) {
if (dev->data->dev_conf.intr_conf.lsc != 0)
rte_intr_callback_register(intr_handle,
dpaa_interrupt_handler,
(void *)dev);
ret = dpaa_intr_enable(__fif->node_name, intr_handle->fd);
ret = dpaa_intr_enable(__fif->node_name,
rte_intr_fd_get(intr_handle));
if (ret) {
if (dev->data->dev_conf.intr_conf.lsc != 0) {
rte_intr_callback_unregister(intr_handle,
@ -368,9 +369,10 @@ static void dpaa_interrupt_handler(void *param)
int bytes_read;
dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
intr_handle = &dpaa_dev->intr_handle;
intr_handle = dpaa_dev->intr_handle;
bytes_read = read(intr_handle->fd, &buf, sizeof(uint64_t));
bytes_read = read(rte_intr_fd_get(intr_handle), &buf,
sizeof(uint64_t));
if (bytes_read < 0)
DPAA_PMD_ERR("Error reading eventfd\n");
dpaa_eth_link_update(dev, 0);
@ -440,7 +442,7 @@ static int dpaa_eth_dev_close(struct rte_eth_dev *dev)
}
dpaa_dev = container_of(rdev, struct rte_dpaa_device, device);
intr_handle = &dpaa_dev->intr_handle;
intr_handle = dpaa_dev->intr_handle;
__fif = container_of(fif, struct __fman_if, __if);
ret = dpaa_eth_dev_stop(dev);
@ -449,7 +451,7 @@ static int dpaa_eth_dev_close(struct rte_eth_dev *dev)
if (link->link_status && !link->link_autoneg)
dpaa_restart_link_autoneg(__fif->node_name);
if (intr_handle && intr_handle->fd &&
if (intr_handle && rte_intr_fd_get(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc != 0) {
dpaa_intr_disable(__fif->node_name);
rte_intr_callback_unregister(intr_handle,
@ -1072,26 +1074,38 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
rxq->qp = qp;
/* Set up the device interrupt handler */
if (!dev->intr_handle) {
if (dev->intr_handle == NULL) {
struct rte_dpaa_device *dpaa_dev;
struct rte_device *rdev = dev->device;
dpaa_dev = container_of(rdev, struct rte_dpaa_device,
device);
dev->intr_handle = &dpaa_dev->intr_handle;
dev->intr_handle->intr_vec = rte_zmalloc(NULL,
dpaa_push_mode_max_queue, 0);
if (!dev->intr_handle->intr_vec) {
dev->intr_handle = dpaa_dev->intr_handle;
if (rte_intr_vec_list_alloc(dev->intr_handle,
NULL, dpaa_push_mode_max_queue)) {
DPAA_PMD_ERR("intr_vec alloc failed");
return -ENOMEM;
}
dev->intr_handle->nb_efd = dpaa_push_mode_max_queue;
dev->intr_handle->max_intr = dpaa_push_mode_max_queue;
if (rte_intr_nb_efd_set(dev->intr_handle,
dpaa_push_mode_max_queue))
return -rte_errno;
if (rte_intr_max_intr_set(dev->intr_handle,
dpaa_push_mode_max_queue))
return -rte_errno;
}
dev->intr_handle->type = RTE_INTR_HANDLE_EXT;
dev->intr_handle->intr_vec[queue_idx] = queue_idx + 1;
dev->intr_handle->efds[queue_idx] = q_fd;
if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_EXT))
return -rte_errno;
if (rte_intr_vec_list_index_set(dev->intr_handle,
queue_idx, queue_idx + 1))
return -rte_errno;
if (rte_intr_efds_index_set(dev->intr_handle, queue_idx,
q_fd))
return -rte_errno;
rxq->q_fd = q_fd;
}
rxq->bp_array = rte_dpaa_bpid_info;

10
drivers/net/dpaa2/dpaa2_ethdev.c
View File

@ -1145,7 +1145,7 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
struct rte_intr_handle *intr_handle;
dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
intr_handle = &dpaa2_dev->intr_handle;
intr_handle = dpaa2_dev->intr_handle;
PMD_INIT_FUNC_TRACE();
@ -1216,8 +1216,8 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
}
/* if the interrupts were configured on this devices*/
if (intr_handle && (intr_handle->fd) &&
(dev->data->dev_conf.intr_conf.lsc != 0)) {
if (intr_handle && rte_intr_fd_get(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc != 0) {
/* Registering LSC interrupt handler */
rte_intr_callback_register(intr_handle,
dpaa2_interrupt_handler,
@ -1256,8 +1256,8 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
PMD_INIT_FUNC_TRACE();
/* reset interrupt callback */
if (intr_handle && (intr_handle->fd) &&
(dev->data->dev_conf.intr_conf.lsc != 0)) {
if (intr_handle && rte_intr_fd_get(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc != 0) {
/*disable dpni irqs */
dpaa2_eth_setup_irqs(dev, 0);

23
drivers/net/e1000/em_ethdev.c
View File

@ -237,7 +237,7 @@ static int
eth_em_dev_init(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct e1000_adapter *adapter =
E1000_DEV_PRIVATE(eth_dev->data->dev_private);
struct e1000_hw *hw =
@ -523,7 +523,7 @@ eth_em_start(struct rte_eth_dev *dev)
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int ret, mask;
uint32_t intr_vector = 0;
uint32_t *speeds;
@ -573,12 +573,10 @@ eth_em_start(struct rte_eth_dev *dev)
}
if (rte_intr_dp_is_en(intr_handle)) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
}
@ -716,7 +714,7 @@ eth_em_stop(struct rte_eth_dev *dev)
struct rte_eth_link link;
struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
dev->data->dev_started = 0;
@ -750,10 +748,7 @@ eth_em_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
return 0;
}
@ -765,7 +760,7 @@ eth_em_close(struct rte_eth_dev *dev)
struct e1000_adapter *adapter =
E1000_DEV_PRIVATE(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int ret;
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@ -1006,7 +1001,7 @@ eth_em_rx_queue_intr_enable(struct rte_eth_dev *dev, __rte_unused uint16_t queue
{
struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
em_rxq_intr_enable(hw);
rte_intr_ack(intr_handle);

79
drivers/net/e1000/igb_ethdev.c
View File

@ -515,7 +515,7 @@ igb_intr_enable(struct rte_eth_dev *dev)
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (rte_intr_allow_others(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc != 0) {
@ -532,7 +532,7 @@ igb_intr_disable(struct rte_eth_dev *dev)
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (rte_intr_allow_others(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc != 0) {
@ -851,12 +851,12 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->data->port_id, pci_dev->id.vendor_id,
pci_dev->id.device_id);
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
eth_igb_interrupt_handler,
(void *)eth_dev);
/* enable uio/vfio intr/eventfd mapping */
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
/* enable support intr */
igb_intr_enable(eth_dev);
@ -992,7 +992,7 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->data->port_id, pci_dev->id.vendor_id,
pci_dev->id.device_id, "igb_mac_82576_vf");
intr_handle = &pci_dev->intr_handle;
intr_handle = pci_dev->intr_handle;
rte_intr_callback_register(intr_handle,
eth_igbvf_interrupt_handler, eth_dev);
@ -1196,7 +1196,7 @@ eth_igb_start(struct rte_eth_dev *dev)
struct e1000_adapter *adapter =
E1000_DEV_PRIVATE(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int ret, mask;
uint32_t intr_vector = 0;
uint32_t ctrl_ext;
@ -1255,11 +1255,10 @@ eth_igb_start(struct rte_eth_dev *dev)
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
/* Allocate the vector list */
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
@ -1418,7 +1417,7 @@ eth_igb_stop(struct rte_eth_dev *dev)
struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_eth_link link;
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct e1000_adapter *adapter =
E1000_DEV_PRIVATE(dev->data->dev_private);
@ -1462,10 +1461,7 @@ eth_igb_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
adapter->stopped = true;
dev->data->dev_started = 0;
@ -1505,7 +1501,7 @@ eth_igb_close(struct rte_eth_dev *dev)
struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_eth_link link;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct e1000_filter_info *filter_info =
E1000_DEV_PRIVATE_TO_FILTER_INFO(dev->data->dev_private);
int ret;
@ -1531,10 +1527,8 @@ eth_igb_close(struct rte_eth_dev *dev)
igb_dev_free_queues(dev);
if (intr_handle->intr_vec) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
/* Cleanup vector list */
rte_intr_vec_list_free(intr_handle);
memset(&link, 0, sizeof(link));
rte_eth_linkstatus_set(dev, &link);
@ -2771,7 +2765,7 @@ static int eth_igb_rxq_interrupt_setup(struct rte_eth_dev *dev)
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int misc_shift = rte_intr_allow_others(intr_handle) ? 1 : 0;
struct rte_eth_dev_info dev_info;
@ -3288,7 +3282,7 @@ igbvf_dev_start(struct rte_eth_dev *dev)
struct e1000_adapter *adapter =
E1000_DEV_PRIVATE(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int ret;
uint32_t intr_vector = 0;
@ -3319,11 +3313,10 @@ igbvf_dev_start(struct rte_eth_dev *dev)
return ret;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (!intr_handle->intr_vec) {
/* Allocate the vector list */
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
@ -3345,7 +3338,7 @@ static int
igbvf_dev_stop(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct e1000_adapter *adapter =
E1000_DEV_PRIVATE(dev->data->dev_private);
@ -3369,10 +3362,9 @@ igbvf_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
/* Clean vector list */
rte_intr_vec_list_free(intr_handle);
adapter->stopped = true;
dev->data->dev_started = 0;
@ -3410,7 +3402,7 @@ igbvf_dev_close(struct rte_eth_dev *dev)
memset(&addr, 0, sizeof(addr));
igbvf_default_mac_addr_set(dev, &addr);
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_callback_unregister(pci_dev->intr_handle,
eth_igbvf_interrupt_handler,
(void *)dev);
@ -5112,7 +5104,7 @@ eth_igb_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t vec = E1000_MISC_VEC_ID;
if (rte_intr_allow_others(intr_handle))
@ -5132,7 +5124,7 @@ eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t vec = E1000_MISC_VEC_ID;
if (rte_intr_allow_others(intr_handle))
@ -5210,7 +5202,7 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
uint32_t base = E1000_MISC_VEC_ID;
uint32_t misc_shift = 0;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
/* won't configure msix register if no mapping is done
* between intr vector and event fd
@ -5251,8 +5243,9 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
E1000_GPIE_PBA | E1000_GPIE_EIAME |
E1000_GPIE_NSICR);
intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<
misc_shift;
intr_mask =
RTE_LEN2MASK(rte_intr_nb_efd_get(intr_handle),
uint32_t) << misc_shift;
if (dev->data->dev_conf.intr_conf.lsc != 0)
intr_mask |= (1 << IGB_MSIX_OTHER_INTR_VEC);
@ -5270,8 +5263,8 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
/* use EIAM to auto-mask when MSI-X interrupt
* is asserted, this saves a register write for every interrupt
*/
intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<
misc_shift;
intr_mask = RTE_LEN2MASK(rte_intr_nb_efd_get(intr_handle),
uint32_t) << misc_shift;
if (dev->data->dev_conf.intr_conf.lsc != 0)
intr_mask |= (1 << IGB_MSIX_OTHER_INTR_VEC);
@ -5281,8 +5274,8 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
for (queue_id = 0; queue_id < dev->data->nb_rx_queues; queue_id++) {
eth_igb_assign_msix_vector(hw, 0, queue_id, vec);
intr_handle->intr_vec[queue_id] = vec;
if (vec < base + intr_handle->nb_efd - 1)
rte_intr_vec_list_index_set(intr_handle, queue_id, vec);
if (vec < base + rte_intr_nb_efd_get(intr_handle) - 1)
vec++;
}

35
drivers/net/ena/ena_ethdev.c
View File

@ -494,7 +494,7 @@ static void ena_config_debug_area(struct ena_adapter *adapter)
static int ena_close(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ena_adapter *adapter = dev->data->dev_private;
int ret = 0;
@ -954,7 +954,7 @@ static int ena_stop(struct rte_eth_dev *dev)
struct ena_adapter *adapter = dev->data->dev_private;
struct ena_com_dev *ena_dev = &adapter->ena_dev;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int rc;
/* Cannot free memory in secondary process */
@ -976,10 +976,9 @@ static int ena_stop(struct rte_eth_dev *dev)
rte_intr_disable(intr_handle);
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
/* Cleanup vector list */
rte_intr_vec_list_free(intr_handle);
rte_intr_enable(intr_handle);
@ -995,7 +994,7 @@ static int ena_create_io_queue(struct rte_eth_dev *dev, struct ena_ring *ring)
struct ena_adapter *adapter = ring->adapter;
struct ena_com_dev *ena_dev = &adapter->ena_dev;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ena_com_create_io_ctx ctx =
/* policy set to _HOST just to satisfy icc compiler */
{ ENA_ADMIN_PLACEMENT_POLICY_HOST,
@ -1015,7 +1014,10 @@ static int ena_create_io_queue(struct rte_eth_dev *dev, struct ena_ring *ring)
ena_qid = ENA_IO_RXQ_IDX(ring->id);
ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
if (rte_intr_dp_is_en(intr_handle))
ctx.msix_vector = intr_handle->intr_vec[ring->id];
ctx.msix_vector =
rte_intr_vec_list_index_get(intr_handle,
ring->id);
for (i = 0; i < ring->ring_size; i++)
ring->empty_rx_reqs[i] = i;
}
@ -1824,7 +1826,7 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)
pci_dev->addr.devid,
pci_dev->addr.function);
intr_handle = &pci_dev->intr_handle;
intr_handle = pci_dev->intr_handle;
adapter->regs = pci_dev->mem_resource[ENA_REGS_BAR].addr;
adapter->dev_mem_base = pci_dev->mem_resource[ENA_MEM_BAR].addr;
@ -3112,7 +3114,7 @@ static int ena_parse_devargs(struct ena_adapter *adapter,
static int ena_setup_rx_intr(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int rc;
uint16_t vectors_nb, i;
bool rx_intr_requested = dev->data->dev_conf.intr_conf.rxq;
@ -3139,9 +3141,9 @@ static int ena_setup_rx_intr(struct rte_eth_dev *dev)
goto enable_intr;
}
intr_handle->intr_vec = rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(*intr_handle->intr_vec), 0);
if (intr_handle->intr_vec == NULL) {
/* Allocate the vector list */
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_DRV_LOG(ERR,
"Failed to allocate interrupt vector for %d queues\n",
dev->data->nb_rx_queues);
@ -3160,7 +3162,9 @@ static int ena_setup_rx_intr(struct rte_eth_dev *dev)
}
for (i = 0; i < vectors_nb; ++i)
intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + i;
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + i))
goto disable_intr_efd;
rte_intr_enable(intr_handle);
return 0;
@ -3168,8 +3172,7 @@ static int ena_setup_rx_intr(struct rte_eth_dev *dev)
disable_intr_efd:
rte_intr_efd_disable(intr_handle);
free_intr_vec:
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
rte_intr_vec_list_free(intr_handle);
enable_intr:
rte_intr_enable(intr_handle);
return rc;

26
drivers/net/enic/enic_main.c
View File

@ -448,7 +448,7 @@ enic_intr_handler(void *arg)
rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
enic_log_q_error(enic);
/* Re-enable irq in case of INTx */
rte_intr_ack(&enic->pdev->intr_handle);
rte_intr_ack(enic->pdev->intr_handle);
}
static int enic_rxq_intr_init(struct enic *enic)
@ -477,14 +477,16 @@ static int enic_rxq_intr_init(struct enic *enic)
" interrupts\n");
return err;
}
intr_handle->intr_vec = rte_zmalloc("enic_intr_vec",
rxq_intr_count * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_vec_list_alloc(intr_handle, "enic_intr_vec",
rxq_intr_count)) {
dev_err(enic, "Failed to allocate intr_vec\n");
return -ENOMEM;
}
for (i = 0; i < rxq_intr_count; i++)
intr_handle->intr_vec[i] = i + ENICPMD_RXQ_INTR_OFFSET;
if (rte_intr_vec_list_index_set(intr_handle, i,
i + ENICPMD_RXQ_INTR_OFFSET))
return -rte_errno;
return 0;
}
@ -494,10 +496,8 @@ static void enic_rxq_intr_deinit(struct enic *enic)
intr_handle = enic->rte_dev->intr_handle;
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
}
static void enic_prep_wq_for_simple_tx(struct enic *enic, uint16_t queue_idx)
@ -667,10 +667,10 @@ int enic_enable(struct enic *enic)
vnic_dev_enable_wait(enic->vdev);
/* Register and enable error interrupt */
rte_intr_callback_register(&(enic->pdev->intr_handle),
rte_intr_callback_register(enic->pdev->intr_handle,
enic_intr_handler, (void *)enic->rte_dev);
rte_intr_enable(&(enic->pdev->intr_handle));
rte_intr_enable(enic->pdev->intr_handle);
/* Unmask LSC interrupt */
vnic_intr_unmask(&enic->intr[ENICPMD_LSC_INTR_OFFSET]);
@ -1111,8 +1111,8 @@ int enic_disable(struct enic *enic)
(void)vnic_intr_masked(&enic->intr[i]); /* flush write */
}
enic_rxq_intr_deinit(enic);
rte_intr_disable(&enic->pdev->intr_handle);
rte_intr_callback_unregister(&enic->pdev->intr_handle,
rte_intr_disable(enic->pdev->intr_handle);
rte_intr_callback_unregister(enic->pdev->intr_handle,
enic_intr_handler,
(void *)enic->rte_dev);

21
drivers/net/failsafe/failsafe.c
View File

@ -264,11 +264,23 @@ fs_eth_dev_create(struct rte_vdev_device *vdev)
RTE_ETHER_ADDR_BYTES(mac));
dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC |
RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
PRIV(dev)->intr_handle = (struct rte_intr_handle){
.fd = -1,
.type = RTE_INTR_HANDLE_EXT,
};
/* Allocate interrupt instance */
PRIV(dev)->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (PRIV(dev)->intr_handle == NULL) {
ERROR("Failed to allocate intr handle");
goto cancel_alarm;
}
if (rte_intr_fd_set(PRIV(dev)->intr_handle, -1))
goto cancel_alarm;
if (rte_intr_type_set(PRIV(dev)->intr_handle, RTE_INTR_HANDLE_EXT))
goto cancel_alarm;
rte_eth_dev_probing_finish(dev);
return 0;
cancel_alarm:
failsafe_hotplug_alarm_cancel(dev);
@ -297,6 +309,7 @@ fs_rte_eth_free(const char *name)
return 0; /* port already released */
ret = failsafe_eth_dev_close(dev);
rte_eth_dev_release_port(dev);
rte_intr_instance_free(PRIV(dev)->intr_handle);
return ret;
}

43
drivers/net/failsafe/failsafe_intr.c
View File

@ -410,12 +410,10 @@ fs_rx_intr_vec_uninstall(struct fs_priv *priv)
{
struct rte_intr_handle *intr_handle;
intr_handle = &priv->intr_handle;
if (intr_handle->intr_vec != NULL) {
free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
intr_handle->nb_efd = 0;
intr_handle = priv->intr_handle;
rte_intr_vec_list_free(intr_handle);
rte_intr_nb_efd_set(intr_handle, 0);
}
/**
@ -439,11 +437,9 @@ fs_rx_intr_vec_install(struct fs_priv *priv)
rxqs_n = priv->data->nb_rx_queues;
n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
count = 0;
intr_handle = &priv->intr_handle;
RTE_ASSERT(intr_handle->intr_vec == NULL);
intr_handle = priv->intr_handle;
/* Allocate the interrupt vector of the failsafe Rx proxy interrupts */
intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
if (intr_handle->intr_vec == NULL) {
if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
fs_rx_intr_vec_uninstall(priv);
rte_errno = ENOMEM;
ERROR("Failed to allocate memory for interrupt vector,"
@ -456,9 +452,9 @@ fs_rx_intr_vec_install(struct fs_priv *priv)
/* Skip queues that cannot request interrupts. */
if (rxq == NULL || rxq->event_fd < 0) {
/* Use invalid intr_vec[] index to disable entry. */
intr_handle->intr_vec[i] =
RTE_INTR_VEC_RXTX_OFFSET +
RTE_MAX_RXTX_INTR_VEC_ID;
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
return -rte_errno;
continue;
}
if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
@ -469,15 +465,24 @@ fs_rx_intr_vec_install(struct fs_priv *priv)
fs_rx_intr_vec_uninstall(priv);
return -rte_errno;
}
intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
intr_handle->efds[count] = rxq->event_fd;
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + count))
return -rte_errno;
if (rte_intr_efds_index_set(intr_handle, count,
rxq->event_fd))
return -rte_errno;
count++;
}
if (count == 0) {
fs_rx_intr_vec_uninstall(priv);
} else {
intr_handle->nb_efd = count;
intr_handle->efd_counter_size = sizeof(uint64_t);
if (rte_intr_nb_efd_set(intr_handle, count))
return -rte_errno;
if (rte_intr_efd_counter_size_set(intr_handle,
sizeof(uint64_t)))
return -rte_errno;
}
return 0;
}
@ -499,7 +504,7 @@ failsafe_rx_intr_uninstall(struct rte_eth_dev *dev)
struct rte_intr_handle *intr_handle;
priv = PRIV(dev);
intr_handle = &priv->intr_handle;
intr_handle = priv->intr_handle;
rte_intr_free_epoll_fd(intr_handle);
fs_rx_event_proxy_uninstall(priv);
fs_rx_intr_vec_uninstall(priv);
@ -530,6 +535,6 @@ failsafe_rx_intr_install(struct rte_eth_dev *dev)
fs_rx_intr_vec_uninstall(priv);
return -rte_errno;
}
dev->intr_handle = &priv->intr_handle;
dev->intr_handle = priv->intr_handle;
return 0;
}

19
drivers/net/failsafe/failsafe_ops.c
View File

@ -393,15 +393,22 @@ fs_rx_queue_setup(struct rte_eth_dev *dev,
* For the time being, fake as if we are using MSIX interrupts,
* this will cause rte_intr_efd_enable to allocate an eventfd for us.
*/
struct rte_intr_handle intr_handle = {
.type = RTE_INTR_HANDLE_VFIO_MSIX,
.efds = { -1, },
};
struct rte_intr_handle *intr_handle;
struct sub_device *sdev;
struct rxq *rxq;
uint8_t i;
int ret;
intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (intr_handle == NULL)
return -ENOMEM;
if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_VFIO_MSIX))
return -rte_errno;
if (rte_intr_efds_index_set(intr_handle, 0, -1))
return -rte_errno;
fs_lock(dev, 0);
if (rx_conf->rx_deferred_start) {
FOREACH_SUBDEV_STATE(sdev, i, dev, DEV_PROBED) {
@ -435,12 +442,12 @@ fs_rx_queue_setup(struct rte_eth_dev *dev,
rxq->info.nb_desc = nb_rx_desc;
rxq->priv = PRIV(dev);
rxq->sdev = PRIV(dev)->subs;
ret = rte_intr_efd_enable(&intr_handle, 1);
ret = rte_intr_efd_enable(intr_handle, 1);
if (ret < 0) {
fs_unlock(dev, 0);
return ret;
}
rxq->event_fd = intr_handle.efds[0];
rxq->event_fd = rte_intr_efds_index_get(intr_handle, 0);
dev->data->rx_queues[rx_queue_id] = rxq;
FOREACH_SUBDEV_STATE(sdev, i, dev, DEV_ACTIVE) {
ret = rte_eth_rx_queue_setup(PORT_ID(sdev),

2
drivers/net/failsafe/failsafe_private.h
View File

@ -166,7 +166,7 @@ struct fs_priv {
struct rte_ether_addr *mcast_addrs;
/* current capabilities */
struct rte_eth_dev_owner my_owner; /* Unique owner. */
struct rte_intr_handle intr_handle; /* Port interrupt handle. */
struct rte_intr_handle *intr_handle; /* Port interrupt handle. */
/*
* Fail-safe state machine.
* This level will be tracking state of the EAL and eth

32
drivers/net/fm10k/fm10k_ethdev.c
View File

@ -32,7 +32,8 @@
#define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1)
/* default 1:1 map from queue ID to interrupt vector ID */
#define Q2V(pci_dev, queue_id) ((pci_dev)->intr_handle.intr_vec[queue_id])
#define Q2V(pci_dev, queue_id) \
(rte_intr_vec_list_index_get((pci_dev)->intr_handle, queue_id))
/* First 64 Logical ports for PF/VMDQ, second 64 for Flow director */
#define MAX_LPORT_NUM 128
@ -690,7 +691,7 @@ fm10k_dev_rx_init(struct rte_eth_dev *dev)
struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct fm10k_macvlan_filter_info *macvlan;
struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pdev->intr_handle;
struct rte_intr_handle *intr_handle = pdev->intr_handle;
int i, ret;
struct fm10k_rx_queue *rxq;
uint64_t base_addr;
@ -1158,7 +1159,7 @@ fm10k_dev_stop(struct rte_eth_dev *dev)
{
struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pdev->intr_handle;
struct rte_intr_handle *intr_handle = pdev->intr_handle;
int i;
PMD_INIT_FUNC_TRACE();
@ -1187,8 +1188,7 @@ fm10k_dev_stop(struct rte_eth_dev *dev)
}
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
rte_intr_vec_list_free(intr_handle);
return 0;
}
@ -2367,7 +2367,7 @@ fm10k_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
else
FM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(pdev, queue_id)),
FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR);
rte_intr_ack(&pdev->intr_handle);
rte_intr_ack(pdev->intr_handle);
return 0;
}
@ -2392,7 +2392,7 @@ fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)
{
struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pdev->intr_handle;
struct rte_intr_handle *intr_handle = pdev->intr_handle;
uint32_t intr_vector, vec;
uint16_t queue_id;
int result = 0;
@ -2420,15 +2420,17 @@ fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)
}
if (rte_intr_dp_is_en(intr_handle) && !result) {
intr_handle->intr_vec = rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec) {
if (!rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
for (queue_id = 0, vec = FM10K_RX_VEC_START;
queue_id < dev->data->nb_rx_queues;
queue_id++) {
intr_handle->intr_vec[queue_id] = vec;
if (vec < intr_handle->nb_efd - 1
+ FM10K_RX_VEC_START)
rte_intr_vec_list_index_set(intr_handle,
queue_id, vec);
int nb_efd =
rte_intr_nb_efd_get(intr_handle);
if (vec < (uint32_t)nb_efd - 1 +
FM10K_RX_VEC_START)
vec++;
}
} else {
@ -2787,7 +2789,7 @@ fm10k_dev_close(struct rte_eth_dev *dev)
{
struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pdev->intr_handle;
struct rte_intr_handle *intr_handle = pdev->intr_handle;
int ret;
PMD_INIT_FUNC_TRACE();
@ -3053,7 +3055,7 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)
{
struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pdev->intr_handle;
struct rte_intr_handle *intr_handle = pdev->intr_handle;
int diag, i;
struct fm10k_macvlan_filter_info *macvlan;

10
drivers/net/hinic/hinic_pmd_ethdev.c
View File

@ -1228,13 +1228,13 @@ static void hinic_disable_interrupt(struct rte_eth_dev *dev)
hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
/* disable rte interrupt */
ret = rte_intr_disable(&pci_dev->intr_handle);
ret = rte_intr_disable(pci_dev->intr_handle);
if (ret)
PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
do {
ret =
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_callback_unregister(pci_dev->intr_handle,
hinic_dev_interrupt_handler, dev);
if (ret >= 0) {
break;
@ -3118,7 +3118,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
}
/* register callback func to eal lib */
rc = rte_intr_callback_register(&pci_dev->intr_handle,
rc = rte_intr_callback_register(pci_dev->intr_handle,
hinic_dev_interrupt_handler,
(void *)eth_dev);
if (rc) {
@ -3128,7 +3128,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
}
/* enable uio/vfio intr/eventfd mapping */
rc = rte_intr_enable(&pci_dev->intr_handle);
rc = rte_intr_enable(pci_dev->intr_handle);
if (rc) {
PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
eth_dev->data->name);
@ -3158,7 +3158,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
return 0;
enable_intr_fail:
(void)rte_intr_callback_unregister(&pci_dev->intr_handle,
(void)rte_intr_callback_unregister(pci_dev->intr_handle,
hinic_dev_interrupt_handler,
(void *)eth_dev);

57
drivers/net/hns3/hns3_ethdev.c
View File

@ -5224,7 +5224,7 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)
hns3_config_all_msix_error(hw, true);
ret = rte_intr_callback_register(&pci_dev->intr_handle,
ret = rte_intr_callback_register(pci_dev->intr_handle,
hns3_interrupt_handler,
eth_dev);
if (ret) {
@ -5237,7 +5237,7 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)
goto err_get_config;
/* Enable interrupt */
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
hns3_pf_enable_irq0(hw);
/* Get configuration */
@ -5296,8 +5296,8 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)
hns3_tqp_stats_uninit(hw);
err_get_config:
hns3_pf_disable_irq0(hw);
rte_intr_disable(&pci_dev->intr_handle);
hns3_intr_unregister(&pci_dev->intr_handle, hns3_interrupt_handler,
rte_intr_disable(pci_dev->intr_handle);
hns3_intr_unregister(pci_dev->intr_handle, hns3_interrupt_handler,
eth_dev);
err_intr_callback_register:
err_cmd_init:
@ -5330,8 +5330,8 @@ hns3_uninit_pf(struct rte_eth_dev *eth_dev)
hns3_tqp_stats_uninit(hw);
hns3_config_mac_tnl_int(hw, false);
hns3_pf_disable_irq0(hw);
rte_intr_disable(&pci_dev->intr_handle);
hns3_intr_unregister(&pci_dev->intr_handle, hns3_interrupt_handler,
rte_intr_disable(pci_dev->intr_handle);
hns3_intr_unregister(pci_dev->intr_handle, hns3_interrupt_handler,
eth_dev);
hns3_config_all_msix_error(hw, false);
hns3_cmd_uninit(hw);
@ -5665,7 +5665,7 @@ static int
hns3_map_rx_interrupt(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint16_t base = RTE_INTR_VEC_ZERO_OFFSET;
uint16_t vec = RTE_INTR_VEC_ZERO_OFFSET;
@ -5688,16 +5688,13 @@ hns3_map_rx_interrupt(struct rte_eth_dev *dev)
if (rte_intr_efd_enable(intr_handle, intr_vector))
return -EINVAL;
if (intr_handle->intr_vec == NULL) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
hw->used_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
hns3_err(hw, "failed to allocate %u rx_queues intr_vec",
hw->used_rx_queues);
ret = -ENOMEM;
goto alloc_intr_vec_error;
}
/* Allocate vector list */
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
hw->used_rx_queues)) {
hns3_err(hw, "failed to allocate %u rx_queues intr_vec",
hw->used_rx_queues);
ret = -ENOMEM;
goto alloc_intr_vec_error;
}
if (rte_intr_allow_others(intr_handle)) {
@ -5710,20 +5707,21 @@ hns3_map_rx_interrupt(struct rte_eth_dev *dev)
HNS3_RING_TYPE_RX, q_id);
if (ret)
goto bind_vector_error;
intr_handle->intr_vec[q_id] = vec;
if (rte_intr_vec_list_index_set(intr_handle, q_id, vec))
goto bind_vector_error;
/*
* If there are not enough efds (e.g. not enough interrupt),
* remaining queues will be bond to the last interrupt.
*/
if (vec < base + intr_handle->nb_efd - 1)
if (vec < base + rte_intr_nb_efd_get(intr_handle) - 1)
vec++;
}
rte_intr_enable(intr_handle);
return 0;
bind_vector_error:
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
rte_intr_vec_list_free(intr_handle);
alloc_intr_vec_error:
rte_intr_efd_disable(intr_handle);
return ret;
@ -5734,7 +5732,7 @@ hns3_restore_rx_interrupt(struct hns3_hw *hw)
{
struct rte_eth_dev *dev = &rte_eth_devices[hw->data->port_id];
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint16_t q_id;
int ret;
@ -5744,8 +5742,9 @@ hns3_restore_rx_interrupt(struct hns3_hw *hw)
if (rte_intr_dp_is_en(intr_handle)) {
for (q_id = 0; q_id < hw->used_rx_queues; q_id++) {
ret = hns3_bind_ring_with_vector(hw,
intr_handle->intr_vec[q_id], true,
HNS3_RING_TYPE_RX, q_id);
rte_intr_vec_list_index_get(intr_handle,
q_id),
true, HNS3_RING_TYPE_RX, q_id);
if (ret)
return ret;
}
@ -5888,7 +5887,7 @@ static void
hns3_unmap_rx_interrupt(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct hns3_adapter *hns = dev->data->dev_private;
struct hns3_hw *hw = &hns->hw;
uint8_t base = RTE_INTR_VEC_ZERO_OFFSET;
@ -5908,16 +5907,14 @@ hns3_unmap_rx_interrupt(struct rte_eth_dev *dev)
(void)hns3_bind_ring_with_vector(hw, vec, false,
HNS3_RING_TYPE_RX,
q_id);
if (vec < base + intr_handle->nb_efd - 1)
if (vec < base + rte_intr_nb_efd_get(intr_handle)
- 1)
vec++;
}
}
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
}
static int

64
drivers/net/hns3/hns3_ethdev_vf.c
View File

@ -1956,7 +1956,7 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)
hns3vf_clear_event_cause(hw, 0);
ret = rte_intr_callback_register(&pci_dev->intr_handle,
ret = rte_intr_callback_register(pci_dev->intr_handle,
hns3vf_interrupt_handler, eth_dev);
if (ret) {
PMD_INIT_LOG(ERR, "Failed to register intr: %d", ret);
@ -1964,7 +1964,7 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)
}
/* Enable interrupt */
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
hns3vf_enable_irq0(hw);
/* Get configuration from PF */
@ -2016,8 +2016,8 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)
err_get_config:
hns3vf_disable_irq0(hw);
rte_intr_disable(&pci_dev->intr_handle);
hns3_intr_unregister(&pci_dev->intr_handle, hns3vf_interrupt_handler,
rte_intr_disable(pci_dev->intr_handle);
hns3_intr_unregister(pci_dev->intr_handle, hns3vf_interrupt_handler,
eth_dev);
err_intr_callback_register:
err_cmd_init:
@ -2045,8 +2045,8 @@ hns3vf_uninit_vf(struct rte_eth_dev *eth_dev)
hns3_flow_uninit(eth_dev);
hns3_tqp_stats_uninit(hw);
hns3vf_disable_irq0(hw);
rte_intr_disable(&pci_dev->intr_handle);
hns3_intr_unregister(&pci_dev->intr_handle, hns3vf_interrupt_handler,
rte_intr_disable(pci_dev->intr_handle);
hns3_intr_unregister(pci_dev->intr_handle, hns3vf_interrupt_handler,
eth_dev);
hns3_cmd_uninit(hw);
hns3_cmd_destroy_queue(hw);
@ -2089,7 +2089,7 @@ hns3vf_unmap_rx_interrupt(struct rte_eth_dev *dev)
{
struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint8_t base = RTE_INTR_VEC_ZERO_OFFSET;
uint8_t vec = RTE_INTR_VEC_ZERO_OFFSET;
uint16_t q_id;
@ -2107,16 +2107,16 @@ hns3vf_unmap_rx_interrupt(struct rte_eth_dev *dev)
(void)hns3vf_bind_ring_with_vector(hw, vec, false,
HNS3_RING_TYPE_RX,
q_id);
if (vec < base + intr_handle->nb_efd - 1)
if (vec < base + rte_intr_nb_efd_get(intr_handle)
- 1)
vec++;
}
}
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
/* Cleanup vector list */
rte_intr_vec_list_free(intr_handle);
}
static int
@ -2272,7 +2272,7 @@ static int
hns3vf_map_rx_interrupt(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint8_t base = RTE_INTR_VEC_ZERO_OFFSET;
uint8_t vec = RTE_INTR_VEC_ZERO_OFFSET;
@ -2295,16 +2295,13 @@ hns3vf_map_rx_interrupt(struct rte_eth_dev *dev)
if (rte_intr_efd_enable(intr_handle, intr_vector))
return -EINVAL;
if (intr_handle->intr_vec == NULL) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
hw->used_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
hns3_err(hw, "Failed to allocate %u rx_queues"
" intr_vec", hw->used_rx_queues);
ret = -ENOMEM;
goto vf_alloc_intr_vec_error;
}
/* Allocate vector list */
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
hw->used_rx_queues)) {
hns3_err(hw, "Failed to allocate %u rx_queues"
" intr_vec", hw->used_rx_queues);
ret = -ENOMEM;
goto vf_alloc_intr_vec_error;
}
if (rte_intr_allow_others(intr_handle)) {
@ -2317,20 +2314,22 @@ hns3vf_map_rx_interrupt(struct rte_eth_dev *dev)
HNS3_RING_TYPE_RX, q_id);
if (ret)
goto vf_bind_vector_error;
intr_handle->intr_vec[q_id] = vec;
if (rte_intr_vec_list_index_set(intr_handle, q_id, vec))
goto vf_bind_vector_error;
/*
* If there are not enough efds (e.g. not enough interrupt),
* remaining queues will be bond to the last interrupt.
*/
if (vec < base + intr_handle->nb_efd - 1)
if (vec < base + rte_intr_nb_efd_get(intr_handle) - 1)
vec++;
}
rte_intr_enable(intr_handle);
return 0;
vf_bind_vector_error:
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
rte_intr_vec_list_free(intr_handle);
vf_alloc_intr_vec_error:
rte_intr_efd_disable(intr_handle);
return ret;
@ -2341,7 +2340,7 @@ hns3vf_restore_rx_interrupt(struct hns3_hw *hw)
{
struct rte_eth_dev *dev = &rte_eth_devices[hw->data->port_id];
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint16_t q_id;
int ret;
@ -2351,8 +2350,9 @@ hns3vf_restore_rx_interrupt(struct hns3_hw *hw)
if (rte_intr_dp_is_en(intr_handle)) {
for (q_id = 0; q_id < hw->used_rx_queues; q_id++) {
ret = hns3vf_bind_ring_with_vector(hw,
intr_handle->intr_vec[q_id], true,
HNS3_RING_TYPE_RX, q_id);
rte_intr_vec_list_index_get(intr_handle,
q_id),
true, HNS3_RING_TYPE_RX, q_id);
if (ret)
return ret;
}
@ -2816,7 +2816,7 @@ hns3vf_reinit_dev(struct hns3_adapter *hns)
int ret;
if (hw->reset.level == HNS3_VF_FULL_RESET) {
rte_intr_disable(&pci_dev->intr_handle);
rte_intr_disable(pci_dev->intr_handle);
ret = hns3vf_set_bus_master(pci_dev, true);
if (ret < 0) {
hns3_err(hw, "failed to set pci bus, ret = %d", ret);
@ -2842,7 +2842,7 @@ hns3vf_reinit_dev(struct hns3_adapter *hns)
hns3_err(hw, "Failed to enable msix");
}
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
}
ret = hns3_reset_all_tqps(hns);

2
drivers/net/hns3/hns3_rxtx.c
View File

@ -1050,7 +1050,7 @@ int
hns3_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
if (dev->data->dev_conf.intr_conf.rxq == 0)

53
drivers/net/i40e/i40e_ethdev.c
View File

@ -1440,7 +1440,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused)
}
i40e_set_default_ptype_table(dev);
pci_dev = RTE_ETH_DEV_TO_PCI(dev);
intr_handle = &pci_dev->intr_handle;
intr_handle = pci_dev->intr_handle;
rte_eth_copy_pci_info(dev, pci_dev);
@ -1972,7 +1972,7 @@ i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)
{
struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
uint16_t msix_vect = vsi->msix_intr;
uint16_t i;
@ -2088,10 +2088,11 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t itr_idx)
{
struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
uint16_t msix_vect = vsi->msix_intr;
uint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);
uint16_t nb_msix = RTE_MIN(vsi->nb_msix,
rte_intr_nb_efd_get(intr_handle));
uint16_t queue_idx = 0;
int record = 0;
int i;
@ -2141,8 +2142,8 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t itr_idx)
vsi->nb_used_qps - i,
itr_idx);
for (; !!record && i < vsi->nb_used_qps; i++)
intr_handle->intr_vec[queue_idx + i] =
msix_vect;
rte_intr_vec_list_index_set(intr_handle,
queue_idx + i, msix_vect);
break;
}
/* 1:1 queue/msix_vect mapping */
@ -2150,7 +2151,9 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t itr_idx)
vsi->base_queue + i, 1,
itr_idx);
if (!!record)
intr_handle->intr_vec[queue_idx + i] = msix_vect;
if (rte_intr_vec_list_index_set(intr_handle,
queue_idx + i, msix_vect))
return -rte_errno;
msix_vect++;
nb_msix--;
@ -2164,7 +2167,7 @@ i40e_vsi_enable_queues_intr(struct i40e_vsi *vsi)
{
struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
struct i40e_pf *pf = I40E_VSI_TO_PF(vsi);
uint16_t msix_intr, i;
@ -2191,7 +2194,7 @@ i40e_vsi_disable_queues_intr(struct i40e_vsi *vsi)
{
struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
struct i40e_pf *pf = I40E_VSI_TO_PF(vsi);
uint16_t msix_intr, i;
@ -2357,7 +2360,7 @@ i40e_dev_start(struct rte_eth_dev *dev)
struct i40e_vsi *main_vsi = pf->main_vsi;
int ret, i;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t intr_vector = 0;
struct i40e_vsi *vsi;
uint16_t nb_rxq, nb_txq;
@ -2375,12 +2378,9 @@ i40e_dev_start(struct rte_eth_dev *dev)
return ret;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int),
0);
if (!intr_handle->intr_vec) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR,
"Failed to allocate %d rx_queues intr_vec",
dev->data->nb_rx_queues);
@ -2521,7 +2521,7 @@ i40e_dev_stop(struct rte_eth_dev *dev)
struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct i40e_vsi *main_vsi = pf->main_vsi;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int i;
if (hw->adapter_stopped == 1)
@ -2562,10 +2562,9 @@ i40e_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
/* Cleanup vector list */
rte_intr_vec_list_free(intr_handle);
/* reset hierarchy commit */
pf->tm_conf.committed = false;
@ -2584,7 +2583,7 @@ i40e_dev_close(struct rte_eth_dev *dev)
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct i40e_filter_control_settings settings;
struct rte_flow *p_flow;
uint32_t reg;
@ -11068,11 +11067,11 @@ static int
i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint16_t msix_intr;
msix_intr = intr_handle->intr_vec[queue_id];
msix_intr = rte_intr_vec_list_index_get(intr_handle, queue_id);
if (msix_intr == I40E_MISC_VEC_ID)
I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,
I40E_PFINT_DYN_CTL0_INTENA_MASK |
@ -11087,7 +11086,7 @@ i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
I40E_WRITE_FLUSH(hw);
rte_intr_ack(&pci_dev->intr_handle);
rte_intr_ack(pci_dev->intr_handle);
return 0;
}
@ -11096,11 +11095,11 @@ static int
i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint16_t msix_intr;
msix_intr = intr_handle->intr_vec[queue_id];
msix_intr = rte_intr_vec_list_index_get(intr_handle, queue_id);
if (msix_intr == I40E_MISC_VEC_ID)
I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,
I40E_PFINT_DYN_CTL0_ITR_INDX_MASK);

42
drivers/net/iavf/iavf_ethdev.c
View File

@ -646,17 +646,16 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (!intr_handle->intr_vec) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec",
dev->data->nb_rx_queues);
return -1;
}
}
qv_map = rte_zmalloc("qv_map",
dev->data->nb_rx_queues * sizeof(struct iavf_qv_map), 0);
if (!qv_map) {
@ -716,7 +715,8 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,
for (i = 0; i < dev->data->nb_rx_queues; i++) {
qv_map[i].queue_id = i;
qv_map[i].vector_id = vf->msix_base;
intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID;
rte_intr_vec_list_index_set(intr_handle,
i, IAVF_MISC_VEC_ID);
}
vf->qv_map = qv_map;
PMD_DRV_LOG(DEBUG,
@ -726,14 +726,16 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,
/* If Rx interrupt is reuquired, and we can use
* multi interrupts, then the vec is from 1
*/
vf->nb_msix = RTE_MIN(intr_handle->nb_efd,
(uint16_t)(vf->vf_res->max_vectors - 1));
vf->nb_msix =
RTE_MIN(rte_intr_nb_efd_get(intr_handle),
(uint16_t)(vf->vf_res->max_vectors - 1));
vf->msix_base = IAVF_RX_VEC_START;
vec = IAVF_RX_VEC_START;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
qv_map[i].queue_id = i;
qv_map[i].vector_id = vec;
intr_handle->intr_vec[i] = vec++;
rte_intr_vec_list_index_set(intr_handle,
i, vec++);
if (vec >= vf->nb_msix + IAVF_RX_VEC_START)
vec = IAVF_RX_VEC_START;
}
@ -775,8 +777,7 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,
vf->qv_map = NULL;
qv_map_alloc_err:
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
rte_intr_vec_list_free(intr_handle);
return -1;
}
@ -912,10 +913,7 @@ iavf_dev_stop(struct rte_eth_dev *dev)
/* Disable the interrupt for Rx */
rte_intr_efd_disable(intr_handle);
/* Rx interrupt vector mapping free */
if (intr_handle->intr_vec) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
/* remove all mac addrs */
iavf_add_del_all_mac_addr(adapter, false);
@ -1639,7 +1637,8 @@ iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);
uint16_t msix_intr;
msix_intr = pci_dev->intr_handle.intr_vec[queue_id];
msix_intr = rte_intr_vec_list_index_get(pci_dev->intr_handle,
queue_id);
if (msix_intr == IAVF_MISC_VEC_ID) {
PMD_DRV_LOG(INFO, "MISC is also enabled for control");
IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01,
@ -1658,7 +1657,7 @@ iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
IAVF_WRITE_FLUSH(hw);
if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
rte_intr_ack(&pci_dev->intr_handle);
rte_intr_ack(pci_dev->intr_handle);
return 0;
}
@ -1670,7 +1669,8 @@ iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint16_t msix_intr;
msix_intr = pci_dev->intr_handle.intr_vec[queue_id];
msix_intr = rte_intr_vec_list_index_get(pci_dev->intr_handle,
queue_id);
if (msix_intr == IAVF_MISC_VEC_ID) {
PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it");
return -EIO;
@ -2355,12 +2355,12 @@ iavf_dev_init(struct rte_eth_dev *eth_dev)
if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) {
/* register callback func to eal lib */
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
iavf_dev_interrupt_handler,
(void *)eth_dev);
/* enable uio intr after callback register */
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
} else {
rte_eal_alarm_set(IAVF_ALARM_INTERVAL,
iavf_dev_alarm_handler, eth_dev);
@ -2394,7 +2394,7 @@ iavf_dev_close(struct rte_eth_dev *dev)
{
struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct iavf_adapter *adapter =
IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);

4
drivers/net/iavf/iavf_vchnl.c
View File

@ -1685,9 +1685,9 @@ iavf_request_queues(struct rte_eth_dev *dev, uint16_t num)
/* disable interrupt to avoid the admin queue message to be read
* before iavf_read_msg_from_pf.
*/
rte_intr_disable(&pci_dev->intr_handle);
rte_intr_disable(pci_dev->intr_handle);
err = iavf_execute_vf_cmd(adapter, &args);
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
} else {
rte_eal_alarm_cancel(iavf_dev_alarm_handler, dev);
err = iavf_execute_vf_cmd(adapter, &args);

10
drivers/net/ice/ice_dcf.c
View File

@ -539,7 +539,7 @@ ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw)
rte_spinlock_lock(&hw->vc_cmd_send_lock);
rte_intr_disable(&pci_dev->intr_handle);
rte_intr_disable(pci_dev->intr_handle);
ice_dcf_disable_irq0(hw);
for (;;) {
@ -555,7 +555,7 @@ ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw)
rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
}
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
ice_dcf_enable_irq0(hw);
rte_spinlock_unlock(&hw->vc_cmd_send_lock);
@ -694,9 +694,9 @@ ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
}
hw->eth_dev = eth_dev;
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
ice_dcf_dev_interrupt_handler, hw);
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
ice_dcf_enable_irq0(hw);
return 0;
@ -718,7 +718,7 @@ void
ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)
if (hw->tm_conf.committed) {

21
drivers/net/ice/ice_dcf_ethdev.c
View File

@ -144,11 +144,9 @@ ice_dcf_config_rx_queues_irqs(struct rte_eth_dev *dev,
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (!intr_handle->intr_vec) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec",
dev->data->nb_rx_queues);
return -1;
@ -198,7 +196,8 @@ ice_dcf_config_rx_queues_irqs(struct rte_eth_dev *dev,
hw->msix_base = IAVF_MISC_VEC_ID;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
hw->rxq_map[hw->msix_base] |= 1 << i;
intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID;
rte_intr_vec_list_index_set(intr_handle,
i, IAVF_MISC_VEC_ID);
}
PMD_DRV_LOG(DEBUG,
"vector %u are mapping to all Rx queues",
@ -208,12 +207,13 @@ ice_dcf_config_rx_queues_irqs(struct rte_eth_dev *dev,
* multi interrupts, then the vec is from 1
*/
hw->nb_msix = RTE_MIN(hw->vf_res->max_vectors,
intr_handle->nb_efd);
rte_intr_nb_efd_get(intr_handle));
hw->msix_base = IAVF_MISC_VEC_ID;
vec = IAVF_MISC_VEC_ID;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
hw->rxq_map[vec] |= 1 << i;
intr_handle->intr_vec[i] = vec++;
rte_intr_vec_list_index_set(intr_handle,
i, vec++);
if (vec >= hw->nb_msix)
vec = IAVF_RX_VEC_START;
}
@ -623,10 +623,7 @@ ice_dcf_dev_stop(struct rte_eth_dev *dev)
ice_dcf_stop_queues(dev);
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
ice_dcf_add_del_all_mac_addr(&dcf_ad->real_hw, false);
dev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;

49
drivers/net/ice/ice_ethdev.c
View File

@ -2178,7 +2178,7 @@ ice_dev_init(struct rte_eth_dev *dev)
ice_set_default_ptype_table(dev);
pci_dev = RTE_DEV_TO_PCI(dev->device);
intr_handle = &pci_dev->intr_handle;
intr_handle = pci_dev->intr_handle;
pf->adapter = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
pf->dev_data = dev->data;
@ -2375,7 +2375,7 @@ ice_vsi_disable_queues_intr(struct ice_vsi *vsi)
{
struct rte_eth_dev *dev = &rte_eth_devices[vsi->adapter->pf.dev_data->port_id];
struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
uint16_t msix_intr, i;
@ -2405,7 +2405,7 @@ ice_dev_stop(struct rte_eth_dev *dev)
struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct ice_vsi *main_vsi = pf->main_vsi;
struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint16_t i;
/* avoid stopping again */
@ -2430,10 +2430,7 @@ ice_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
pf->adapter_stopped = true;
dev->data->dev_started = 0;
@ -2447,7 +2444,7 @@ ice_dev_close(struct rte_eth_dev *dev)
struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ice_adapter *ad =
ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
int ret;
@ -3345,10 +3342,11 @@ ice_vsi_queues_bind_intr(struct ice_vsi *vsi)
{
struct rte_eth_dev *dev = &rte_eth_devices[vsi->adapter->pf.dev_data->port_id];
struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
uint16_t msix_vect = vsi->msix_intr;
uint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);
uint16_t nb_msix = RTE_MIN(vsi->nb_msix,
rte_intr_nb_efd_get(intr_handle));
uint16_t queue_idx = 0;
int record = 0;
int i;
@ -3376,8 +3374,9 @@ ice_vsi_queues_bind_intr(struct ice_vsi *vsi)
vsi->nb_used_qps - i);
for (; !!record && i < vsi->nb_used_qps; i++)
intr_handle->intr_vec[queue_idx + i] =
msix_vect;
rte_intr_vec_list_index_set(intr_handle,
queue_idx + i, msix_vect);
break;
}
@ -3386,7 +3385,9 @@ ice_vsi_queues_bind_intr(struct ice_vsi *vsi)
vsi->base_queue + i, 1);
if (!!record)
intr_handle->intr_vec[queue_idx + i] = msix_vect;
rte_intr_vec_list_index_set(intr_handle,
queue_idx + i,
msix_vect);
msix_vect++;
nb_msix--;
@ -3398,7 +3399,7 @@ ice_vsi_enable_queues_intr(struct ice_vsi *vsi)
{
struct rte_eth_dev *dev = &rte_eth_devices[vsi->adapter->pf.dev_data->port_id];
struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
uint16_t msix_intr, i;
@ -3424,7 +3425,7 @@ ice_rxq_intr_setup(struct rte_eth_dev *dev)
{
struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ice_vsi *vsi = pf->main_vsi;
uint32_t intr_vector = 0;
@ -3444,11 +3445,9 @@ ice_rxq_intr_setup(struct rte_eth_dev *dev)
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc(NULL, dev->data->nb_rx_queues * sizeof(int),
0);
if (!intr_handle->intr_vec) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, NULL,
dev->data->nb_rx_queues)) {
PMD_DRV_LOG(ERR,
"Failed to allocate %d rx_queues intr_vec",
dev->data->nb_rx_queues);
@ -4755,19 +4754,19 @@ static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
uint16_t queue_id)
{
struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint32_t val;
uint16_t msix_intr;
msix_intr = intr_handle->intr_vec[queue_id];
msix_intr = rte_intr_vec_list_index_get(intr_handle, queue_id);
val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
GLINT_DYN_CTL_ITR_INDX_M;
val &= ~GLINT_DYN_CTL_WB_ON_ITR_M;
ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val);
rte_intr_ack(&pci_dev->intr_handle);
rte_intr_ack(pci_dev->intr_handle);
return 0;
}
@ -4776,11 +4775,11 @@ static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
uint16_t queue_id)
{
struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint16_t msix_intr;
msix_intr = intr_handle->intr_vec[queue_id];
msix_intr = rte_intr_vec_list_index_get(intr_handle, queue_id);
ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), GLINT_DYN_CTL_WB_ON_ITR_M);

45
drivers/net/igc/igc_ethdev.c
View File

@ -377,7 +377,7 @@ igc_intr_other_disable(struct rte_eth_dev *dev)
{
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (rte_intr_allow_others(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc) {
@ -397,7 +397,7 @@ igc_intr_other_enable(struct rte_eth_dev *dev)
struct igc_interrupt *intr = IGC_DEV_PRIVATE_INTR(dev);
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (rte_intr_allow_others(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc) {
@ -609,7 +609,7 @@ eth_igc_stop(struct rte_eth_dev *dev)
struct igc_adapter *adapter = IGC_DEV_PRIVATE(dev);
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct rte_eth_link link;
dev->data->dev_started = 0;
@ -661,10 +661,7 @@ eth_igc_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
return 0;
}
@ -724,7 +721,7 @@ igc_configure_msix_intr(struct rte_eth_dev *dev)
{
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t intr_mask;
uint32_t vec = IGC_MISC_VEC_ID;
@ -748,8 +745,8 @@ igc_configure_msix_intr(struct rte_eth_dev *dev)
IGC_WRITE_REG(hw, IGC_GPIE, IGC_GPIE_MSIX_MODE |
IGC_GPIE_PBA | IGC_GPIE_EIAME |
IGC_GPIE_NSICR);
intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<
misc_shift;
intr_mask = RTE_LEN2MASK(rte_intr_nb_efd_get(intr_handle),
uint32_t) << misc_shift;
if (dev->data->dev_conf.intr_conf.lsc)
intr_mask |= (1u << IGC_MSIX_OTHER_INTR_VEC);
@ -766,8 +763,8 @@ igc_configure_msix_intr(struct rte_eth_dev *dev)
for (i = 0; i < dev->data->nb_rx_queues; i++) {
igc_write_ivar(hw, i, 0, vec);
intr_handle->intr_vec[i] = vec;
if (vec < base + intr_handle->nb_efd - 1)
rte_intr_vec_list_index_set(intr_handle, i, vec);
if (vec < base + rte_intr_nb_efd_get(intr_handle) - 1)
vec++;
}
@ -803,7 +800,7 @@ igc_rxq_interrupt_setup(struct rte_eth_dev *dev)
uint32_t mask;
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int misc_shift = rte_intr_allow_others(intr_handle) ? 1 : 0;
/* won't configure msix register if no mapping is done
@ -812,7 +809,8 @@ igc_rxq_interrupt_setup(struct rte_eth_dev *dev)
if (!rte_intr_dp_is_en(intr_handle))
return;
mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) << misc_shift;
mask = RTE_LEN2MASK(rte_intr_nb_efd_get(intr_handle), uint32_t)
<< misc_shift;
IGC_WRITE_REG(hw, IGC_EIMS, mask);
}
@ -906,7 +904,7 @@ eth_igc_start(struct rte_eth_dev *dev)
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct igc_adapter *adapter = IGC_DEV_PRIVATE(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t *speeds;
int ret;
@ -944,10 +942,9 @@ eth_igc_start(struct rte_eth_dev *dev)
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec = rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_DRV_LOG(ERR,
"Failed to allocate %d rx_queues intr_vec",
dev->data->nb_rx_queues);
@ -1162,7 +1159,7 @@ static int
eth_igc_close(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct igc_adapter *adapter = IGC_DEV_PRIVATE(dev);
int retry = 0;
@ -1331,11 +1328,11 @@ eth_igc_dev_init(struct rte_eth_dev *dev)
dev->data->port_id, pci_dev->id.vendor_id,
pci_dev->id.device_id);
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
eth_igc_interrupt_handler, (void *)dev);
/* enable uio/vfio intr/eventfd mapping */
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_enable(pci_dev->intr_handle);
/* enable support intr */
igc_intr_other_enable(dev);
@ -2076,7 +2073,7 @@ eth_igc_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t vec = IGC_MISC_VEC_ID;
if (rte_intr_allow_others(intr_handle))
@ -2095,7 +2092,7 @@ eth_igc_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t vec = IGC_MISC_VEC_ID;
if (rte_intr_allow_others(intr_handle))

17
drivers/net/ionic/ionic_ethdev.c
View File

@ -1060,7 +1060,7 @@ static int
ionic_configure_intr(struct ionic_adapter *adapter)
{
struct rte_pci_device *pci_dev = adapter->pci_dev;
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int err;
IONIC_PRINT(DEBUG, "Configuring %u intrs", adapter->nintrs);
@ -1074,15 +1074,10 @@ ionic_configure_intr(struct ionic_adapter *adapter)
IONIC_PRINT(DEBUG,
"Packet I/O interrupt on datapath is enabled");
if (!intr_handle->intr_vec) {
intr_handle->intr_vec = rte_zmalloc("intr_vec",
adapter->nintrs * sizeof(int), 0);
if (!intr_handle->intr_vec) {
IONIC_PRINT(ERR, "Failed to allocate %u vectors",
adapter->nintrs);
return -ENOMEM;
}
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec", adapter->nintrs)) {
IONIC_PRINT(ERR, "Failed to allocate %u vectors",
adapter->nintrs);
return -ENOMEM;
}
err = rte_intr_callback_register(intr_handle,
@ -1111,7 +1106,7 @@ static void
ionic_unconfigure_intr(struct ionic_adapter *adapter)
{
struct rte_pci_device *pci_dev = adapter->pci_dev;
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
rte_intr_disable(intr_handle);

66
drivers/net/ixgbe/ixgbe_ethdev.c
View File

@ -1027,7 +1027,7 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
{
struct ixgbe_adapter *ad = eth_dev->data->dev_private;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
struct ixgbe_vfta *shadow_vfta =
@ -1525,7 +1525,7 @@ eth_ixgbevf_dev_init(struct rte_eth_dev *eth_dev)
uint32_t tc, tcs;
struct ixgbe_adapter *ad = eth_dev->data->dev_private;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
struct ixgbe_vfta *shadow_vfta =
@ -2539,7 +2539,7 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
struct ixgbe_vf_info *vfinfo =
*IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t intr_vector = 0;
int err;
bool link_up = false, negotiate = 0;
@ -2594,11 +2594,9 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
@ -2834,7 +2832,7 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
struct ixgbe_vf_info *vfinfo =
*IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int vf;
struct ixgbe_tm_conf *tm_conf =
IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
@ -2885,10 +2883,7 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
/* reset hierarchy commit */
tm_conf->committed = false;
@ -2972,7 +2967,7 @@ ixgbe_dev_close(struct rte_eth_dev *dev)
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int retries = 0;
int ret;
@ -4618,7 +4613,7 @@ ixgbe_dev_interrupt_delayed_handler(void *param)
{
struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ixgbe_interrupt *intr =
IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
struct ixgbe_hw *hw =
@ -5290,7 +5285,7 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint32_t intr_vector = 0;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int err, mask = 0;
@ -5353,11 +5348,9 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)
}
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
ixgbe_dev_clear_queues(dev);
@ -5397,7 +5390,7 @@ ixgbevf_dev_stop(struct rte_eth_dev *dev)
struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct ixgbe_adapter *adapter = dev->data->dev_private;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (hw->adapter_stopped)
return 0;
@ -5425,10 +5418,7 @@ ixgbevf_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
adapter->rss_reta_updated = 0;
@ -5440,7 +5430,7 @@ ixgbevf_dev_close(struct rte_eth_dev *dev)
{
struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int ret;
PMD_INIT_FUNC_TRACE();
@ -5738,7 +5728,7 @@ static int
ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ixgbe_interrupt *intr =
IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
struct ixgbe_hw *hw =
@ -5764,7 +5754,7 @@ ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t vec = IXGBE_MISC_VEC_ID;
if (rte_intr_allow_others(intr_handle))
@ -5780,7 +5770,7 @@ static int
ixgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t mask;
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
@ -5907,7 +5897,7 @@ static void
ixgbevf_configure_msix(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint32_t q_idx;
@ -5934,8 +5924,10 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev)
* as IXGBE_VF_MAXMSIVECOTR = 1
*/
ixgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);
intr_handle->intr_vec[q_idx] = vector_idx;
if (vector_idx < base + intr_handle->nb_efd - 1)
rte_intr_vec_list_index_set(intr_handle, q_idx,
vector_idx);
if (vector_idx < base + rte_intr_nb_efd_get(intr_handle)
- 1)
vector_idx++;
}
@ -5956,7 +5948,7 @@ static void
ixgbe_configure_msix(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint32_t queue_id, base = IXGBE_MISC_VEC_ID;
@ -6000,8 +5992,10 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
queue_id++) {
/* by default, 1:1 mapping */
ixgbe_set_ivar_map(hw, 0, queue_id, vec);
intr_handle->intr_vec[queue_id] = vec;
if (vec < base + intr_handle->nb_efd - 1)
rte_intr_vec_list_index_set(intr_handle,
queue_id, vec);
if (vec < base + rte_intr_nb_efd_get(intr_handle)
- 1)
vec++;
}

108
drivers/net/memif/memif_socket.c
View File

@ -65,7 +65,8 @@ memif_msg_send_from_queue(struct memif_control_channel *cc)
if (e == NULL)
return 0;
size = memif_msg_send(cc->intr_handle.fd, &e->msg, e->fd);
size = memif_msg_send(rte_intr_fd_get(cc->intr_handle), &e->msg,
e->fd);
if (size != sizeof(memif_msg_t)) {
MIF_LOG(ERR, "sendmsg fail: %s.", strerror(errno));
ret = -1;
@ -317,7 +318,9 @@ memif_msg_receive_add_ring(struct rte_eth_dev *dev, memif_msg_t *msg, int fd)
mq = (ar->flags & MEMIF_MSG_ADD_RING_FLAG_C2S) ?
dev->data->rx_queues[ar->index] : dev->data->tx_queues[ar->index];
mq->intr_handle.fd = fd;
if (rte_intr_fd_set(mq->intr_handle, fd))
return -1;
mq->log2_ring_size = ar->log2_ring_size;
mq->region = ar->region;
mq->ring_offset = ar->offset;
@ -453,7 +456,7 @@ memif_msg_enq_add_ring(struct rte_eth_dev *dev, uint8_t idx,
dev->data->rx_queues[idx];
e->msg.type = MEMIF_MSG_TYPE_ADD_RING;
e->fd = mq->intr_handle.fd;
e->fd = rte_intr_fd_get(mq->intr_handle);
ar->index = idx;
ar->offset = mq->ring_offset;
ar->region = mq->region;
@ -505,12 +508,13 @@ memif_intr_unregister_handler(struct rte_intr_handle *intr_handle, void *arg)
struct memif_control_channel *cc = arg;
/* close control channel fd */
close(intr_handle->fd);
close(rte_intr_fd_get(intr_handle));
/* clear message queue */
while ((elt = TAILQ_FIRST(&cc->msg_queue)) != NULL) {
TAILQ_REMOVE(&cc->msg_queue, elt, next);
rte_free(elt);
}
rte_intr_instance_free(cc->intr_handle);
/* free control channel */
rte_free(cc);
}
@ -548,8 +552,8 @@ memif_disconnect(struct rte_eth_dev *dev)
"Unexpected message(s) in message queue.");
}
ih = &pmd->cc->intr_handle;
if (ih->fd > 0) {
ih = pmd->cc->intr_handle;
if (rte_intr_fd_get(ih) > 0) {
ret = rte_intr_callback_unregister(ih,
memif_intr_handler,
pmd->cc);
@ -563,7 +567,8 @@ memif_disconnect(struct rte_eth_dev *dev)
pmd->cc,
memif_intr_unregister_handler);
} else if (ret > 0) {
close(ih->fd);
close(rte_intr_fd_get(ih));
rte_intr_instance_free(ih);
rte_free(pmd->cc);
}
pmd->cc = NULL;
@ -587,9 +592,10 @@ memif_disconnect(struct rte_eth_dev *dev)
else
continue;
}
if (mq->intr_handle.fd > 0) {
close(mq->intr_handle.fd);
mq->intr_handle.fd = -1;
if (rte_intr_fd_get(mq->intr_handle) > 0) {
close(rte_intr_fd_get(mq->intr_handle));
rte_intr_fd_set(mq->intr_handle, -1);
}
}
for (i = 0; i < pmd->cfg.num_s2c_rings; i++) {
@ -604,9 +610,10 @@ memif_disconnect(struct rte_eth_dev *dev)
else
continue;
}
if (mq->intr_handle.fd > 0) {
close(mq->intr_handle.fd);
mq->intr_handle.fd = -1;
if (rte_intr_fd_get(mq->intr_handle) > 0) {
close(rte_intr_fd_get(mq->intr_handle));
rte_intr_fd_set(mq->intr_handle, -1);
}
}
@ -644,7 +651,7 @@ memif_msg_receive(struct memif_control_channel *cc)
mh.msg_control = ctl;
mh.msg_controllen = sizeof(ctl);
size = recvmsg(cc->intr_handle.fd, &mh, 0);
size = recvmsg(rte_intr_fd_get(cc->intr_handle), &mh, 0);
if (size != sizeof(memif_msg_t)) {
MIF_LOG(DEBUG, "Invalid message size = %zd", size);
if (size > 0)
@ -774,7 +781,7 @@ memif_intr_handler(void *arg)
/* if driver failed to assign device */
if (cc->dev == NULL) {
memif_msg_send_from_queue(cc);
ret = rte_intr_callback_unregister_pending(&cc->intr_handle,
ret = rte_intr_callback_unregister_pending(cc->intr_handle,
memif_intr_handler,
cc,
memif_intr_unregister_handler);
@ -812,12 +819,12 @@ memif_listener_handler(void *arg)
int ret;
addr_len = sizeof(client);
sockfd = accept(socket->intr_handle.fd, (struct sockaddr *)&client,
(socklen_t *)&addr_len);
sockfd = accept(rte_intr_fd_get(socket->intr_handle),
(struct sockaddr *)&client, (socklen_t *)&addr_len);
if (sockfd < 0) {
MIF_LOG(ERR,
"Failed to accept connection request on socket fd %d",
socket->intr_handle.fd);
rte_intr_fd_get(socket->intr_handle));
return;
}
@ -829,13 +836,25 @@ memif_listener_handler(void *arg)
goto error;
}
cc->intr_handle.fd = sockfd;
cc->intr_handle.type = RTE_INTR_HANDLE_EXT;
/* Allocate interrupt instance */
cc->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (cc->intr_handle == NULL) {
MIF_LOG(ERR, "Failed to allocate intr handle");
goto error;
}
if (rte_intr_fd_set(cc->intr_handle, sockfd))
goto error;
if (rte_intr_type_set(cc->intr_handle, RTE_INTR_HANDLE_EXT))
goto error;
cc->socket = socket;
cc->dev = NULL;
TAILQ_INIT(&cc->msg_queue);
ret = rte_intr_callback_register(&cc->intr_handle, memif_intr_handler, cc);
ret = rte_intr_callback_register(cc->intr_handle, memif_intr_handler,
cc);
if (ret < 0) {
MIF_LOG(ERR, "Failed to register control channel callback.");
goto error;
@ -857,8 +876,10 @@ memif_listener_handler(void *arg)
close(sockfd);
sockfd = -1;
}
if (cc != NULL)
if (cc != NULL) {
rte_intr_instance_free(cc->intr_handle);
rte_free(cc);
}
}
static struct memif_socket *
@ -914,9 +935,21 @@ memif_socket_create(char *key, uint8_t listener, bool is_abstract)
MIF_LOG(DEBUG, "Memif listener socket %s created.", sock->filename);
sock->intr_handle.fd = sockfd;
sock->intr_handle.type = RTE_INTR_HANDLE_EXT;
ret = rte_intr_callback_register(&sock->intr_handle,
/* Allocate interrupt instance */
sock->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (sock->intr_handle == NULL) {
MIF_LOG(ERR, "Failed to allocate intr handle");
goto error;
}
if (rte_intr_fd_set(sock->intr_handle, sockfd))
goto error;
if (rte_intr_type_set(sock->intr_handle, RTE_INTR_HANDLE_EXT))
goto error;
ret = rte_intr_callback_register(sock->intr_handle,
memif_listener_handler, sock);
if (ret < 0) {
MIF_LOG(ERR, "Failed to register interrupt "
@ -929,8 +962,10 @@ memif_socket_create(char *key, uint8_t listener, bool is_abstract)
error:
MIF_LOG(ERR, "Failed to setup socket %s: %s", key, strerror(errno));
if (sock != NULL)
if (sock != NULL) {
rte_intr_instance_free(sock->intr_handle);
rte_free(sock);
}
if (sockfd >= 0)
close(sockfd);
return NULL;
@ -1047,6 +1082,8 @@ memif_socket_remove_device(struct rte_eth_dev *dev)
MIF_LOG(ERR, "Failed to remove socket file: %s",
socket->filename);
}
if (pmd->role != MEMIF_ROLE_CLIENT)
rte_intr_instance_free(socket->intr_handle);
rte_free(socket);
}
}
@ -1109,13 +1146,25 @@ memif_connect_client(struct rte_eth_dev *dev)
goto error;
}
pmd->cc->intr_handle.fd = sockfd;
pmd->cc->intr_handle.type = RTE_INTR_HANDLE_EXT;
/* Allocate interrupt instance */
pmd->cc->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (pmd->cc->intr_handle == NULL) {
MIF_LOG(ERR, "Failed to allocate intr handle");
goto error;
}
if (rte_intr_fd_set(pmd->cc->intr_handle, sockfd))
goto error;
if (rte_intr_type_set(pmd->cc->intr_handle, RTE_INTR_HANDLE_EXT))
goto error;
pmd->cc->socket = NULL;
pmd->cc->dev = dev;
TAILQ_INIT(&pmd->cc->msg_queue);
ret = rte_intr_callback_register(&pmd->cc->intr_handle,
ret = rte_intr_callback_register(pmd->cc->intr_handle,
memif_intr_handler, pmd->cc);
if (ret < 0) {
MIF_LOG(ERR, "Failed to register interrupt callback for control fd");
@ -1130,6 +1179,7 @@ memif_connect_client(struct rte_eth_dev *dev)
sockfd = -1;
}
if (pmd->cc != NULL) {
rte_intr_instance_free(pmd->cc->intr_handle);
rte_free(pmd->cc);
pmd->cc = NULL;
}

4
drivers/net/memif/memif_socket.h
View File

@ -85,7 +85,7 @@ struct memif_socket_dev_list_elt {
(sizeof(struct sockaddr_un) - offsetof(struct sockaddr_un, sun_path))
struct memif_socket {
struct rte_intr_handle intr_handle; /**< interrupt handle */
struct rte_intr_handle *intr_handle; /**< interrupt handle */
char filename[MEMIF_SOCKET_UN_SIZE]; /**< socket filename */
TAILQ_HEAD(, memif_socket_dev_list_elt) dev_queue;
@ -101,7 +101,7 @@ struct memif_msg_queue_elt {
};
struct memif_control_channel {
struct rte_intr_handle intr_handle; /**< interrupt handle */
struct rte_intr_handle *intr_handle; /**< interrupt handle */
TAILQ_HEAD(, memif_msg_queue_elt) msg_queue; /**< control message queue */
struct memif_socket *socket; /**< pointer to socket */
struct rte_eth_dev *dev; /**< pointer to device */

56
drivers/net/memif/rte_eth_memif.c
View File

@ -326,7 +326,8 @@ eth_memif_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
/* consume interrupt */
if ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0)
size = read(mq->intr_handle.fd, &b, sizeof(b));
size = read(rte_intr_fd_get(mq->intr_handle), &b,
sizeof(b));
ring_size = 1 << mq->log2_ring_size;
mask = ring_size - 1;
@ -462,7 +463,8 @@ eth_memif_rx_zc(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
if ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) {
uint64_t b;
ssize_t size __rte_unused;
size = read(mq->intr_handle.fd, &b, sizeof(b));
size = read(rte_intr_fd_get(mq->intr_handle), &b,
sizeof(b));
}
ring_size = 1 << mq->log2_ring_size;
@ -680,7 +682,8 @@ eth_memif_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
if ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) {
a = 1;
size = write(mq->intr_handle.fd, &a, sizeof(a));
size = write(rte_intr_fd_get(mq->intr_handle), &a,
sizeof(a));
if (unlikely(size < 0)) {
MIF_LOG(WARNING,
"Failed to send interrupt. %s", strerror(errno));
@ -832,7 +835,8 @@ eth_memif_tx_zc(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
/* Send interrupt, if enabled. */
if ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) {
uint64_t a = 1;
ssize_t size = write(mq->intr_handle.fd, &a, sizeof(a));
ssize_t size = write(rte_intr_fd_get(mq->intr_handle),
&a, sizeof(a));
if (unlikely(size < 0)) {
MIF_LOG(WARNING,
"Failed to send interrupt. %s", strerror(errno));
@ -1092,8 +1096,10 @@ memif_init_queues(struct rte_eth_dev *dev)
mq->ring_offset = memif_get_ring_offset(dev, mq, MEMIF_RING_C2S, i);
mq->last_head = 0;
mq->last_tail = 0;
mq->intr_handle.fd = eventfd(0, EFD_NONBLOCK);
if (mq->intr_handle.fd < 0) {
if (rte_intr_fd_set(mq->intr_handle, eventfd(0, EFD_NONBLOCK)))
return -rte_errno;
if (rte_intr_fd_get(mq->intr_handle) < 0) {
MIF_LOG(WARNING,
"Failed to create eventfd for tx queue %d: %s.", i,
strerror(errno));
@ -1115,8 +1121,9 @@ memif_init_queues(struct rte_eth_dev *dev)
mq->ring_offset = memif_get_ring_offset(dev, mq, MEMIF_RING_S2C, i);
mq->last_head = 0;
mq->last_tail = 0;
mq->intr_handle.fd = eventfd(0, EFD_NONBLOCK);
if (mq->intr_handle.fd < 0) {
if (rte_intr_fd_set(mq->intr_handle, eventfd(0, EFD_NONBLOCK)))
return -rte_errno;
if (rte_intr_fd_get(mq->intr_handle) < 0) {
MIF_LOG(WARNING,
"Failed to create eventfd for rx queue %d: %s.", i,
strerror(errno));
@ -1310,12 +1317,24 @@ memif_tx_queue_setup(struct rte_eth_dev *dev,
return -ENOMEM;
}
/* Allocate interrupt instance */
mq->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (mq->intr_handle == NULL) {
MIF_LOG(ERR, "Failed to allocate intr handle");
return -ENOMEM;
}
mq->type =
(pmd->role == MEMIF_ROLE_CLIENT) ? MEMIF_RING_C2S : MEMIF_RING_S2C;
mq->n_pkts = 0;
mq->n_bytes = 0;
mq->intr_handle.fd = -1;
mq->intr_handle.type = RTE_INTR_HANDLE_EXT;
if (rte_intr_fd_set(mq->intr_handle, -1))
return -rte_errno;
if (rte_intr_type_set(mq->intr_handle, RTE_INTR_HANDLE_EXT))
return -rte_errno;
mq->in_port = dev->data->port_id;
dev->data->tx_queues[qid] = mq;
@ -1339,11 +1358,23 @@ memif_rx_queue_setup(struct rte_eth_dev *dev,
return -ENOMEM;
}
/* Allocate interrupt instance */
mq->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (mq->intr_handle == NULL) {
MIF_LOG(ERR, "Failed to allocate intr handle");
return -ENOMEM;
}
mq->type = (pmd->role == MEMIF_ROLE_CLIENT) ? MEMIF_RING_S2C : MEMIF_RING_C2S;
mq->n_pkts = 0;
mq->n_bytes = 0;
mq->intr_handle.fd = -1;
mq->intr_handle.type = RTE_INTR_HANDLE_EXT;
if (rte_intr_fd_set(mq->intr_handle, -1))
return -rte_errno;
if (rte_intr_type_set(mq->intr_handle, RTE_INTR_HANDLE_EXT))
return -rte_errno;
mq->mempool = mb_pool;
mq->in_port = dev->data->port_id;
dev->data->rx_queues[qid] = mq;
@ -1359,6 +1390,7 @@ memif_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
if (!mq)
return;
rte_intr_instance_free(mq->intr_handle);
rte_free(mq);
}

2
drivers/net/memif/rte_eth_memif.h
View File

@ -68,7 +68,7 @@ struct memif_queue {
uint64_t n_pkts; /**< number of rx/tx packets */
uint64_t n_bytes; /**< number of rx/tx bytes */
struct rte_intr_handle intr_handle; /**< interrupt handle */
struct rte_intr_handle *intr_handle; /**< interrupt handle */
memif_log2_ring_size_t log2_ring_size; /**< log2 of ring size */
};

19
drivers/net/mlx4/mlx4.c
View File

@ -1042,9 +1042,19 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
rte_eth_copy_pci_info(eth_dev, pci_dev);
eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
/* Initialize local interrupt handle for current port. */
memset(&priv->intr_handle, 0, sizeof(struct rte_intr_handle));
priv->intr_handle.fd = -1;
priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
priv->intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (priv->intr_handle == NULL) {
RTE_LOG(ERR, EAL, "Fail to allocate intr_handle\n");
goto port_error;
}
if (rte_intr_fd_set(priv->intr_handle, -1))
goto port_error;
if (rte_intr_type_set(priv->intr_handle, RTE_INTR_HANDLE_EXT))
goto port_error;
/*
* Override ethdev interrupt handle pointer with private
* handle instead of that of the parent PCI device used by
@ -1057,7 +1067,7 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
* besides setting up eth_dev->intr_handle, the rest is
* handled by rte_intr_rx_ctl().
*/
eth_dev->intr_handle = &priv->intr_handle;
eth_dev->intr_handle = priv->intr_handle;
priv->dev_data = eth_dev->data;
eth_dev->dev_ops = &mlx4_dev_ops;
#ifdef HAVE_IBV_MLX4_BUF_ALLOCATORS
@ -1102,6 +1112,7 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
prev_dev = eth_dev;
continue;
port_error:
rte_intr_instance_free(priv->intr_handle);
rte_free(priv);
if (eth_dev != NULL)
eth_dev->data->dev_private = NULL;

2
drivers/net/mlx4/mlx4.h
View File

@ -176,7 +176,7 @@ struct mlx4_priv {
uint32_t tso_max_payload_sz; /**< Max supported TSO payload size. */
uint32_t hw_rss_max_qps; /**< Max Rx Queues supported by RSS. */
uint64_t hw_rss_sup; /**< Supported RSS hash fields (Verbs format). */
struct rte_intr_handle intr_handle; /**< Port interrupt handle. */
struct rte_intr_handle *intr_handle; /**< Port interrupt handle. */
struct mlx4_drop *drop; /**< Shared resources for drop flow rules. */
struct {
uint32_t dev_gen; /* Generation number to flush local caches. */

47
drivers/net/mlx4/mlx4_intr.c
View File

@ -43,12 +43,12 @@ static int mlx4_link_status_check(struct mlx4_priv *priv);
static void
mlx4_rx_intr_vec_disable(struct mlx4_priv *priv)
{
struct rte_intr_handle *intr_handle = &priv->intr_handle;
struct rte_intr_handle *intr_handle = priv->intr_handle;
rte_intr_free_epoll_fd(intr_handle);
free(intr_handle->intr_vec);
intr_handle->nb_efd = 0;
intr_handle->intr_vec = NULL;
rte_intr_vec_list_free(intr_handle);
rte_intr_nb_efd_set(intr_handle, 0);
}
/**
@ -67,11 +67,10 @@ mlx4_rx_intr_vec_enable(struct mlx4_priv *priv)
unsigned int rxqs_n = ETH_DEV(priv)->data->nb_rx_queues;
unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
unsigned int count = 0;
struct rte_intr_handle *intr_handle = &priv->intr_handle;
struct rte_intr_handle *intr_handle = priv->intr_handle;
mlx4_rx_intr_vec_disable(priv);
intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
if (intr_handle->intr_vec == NULL) {
if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
rte_errno = ENOMEM;
ERROR("failed to allocate memory for interrupt vector,"
" Rx interrupts will not be supported");
@ -83,9 +82,9 @@ mlx4_rx_intr_vec_enable(struct mlx4_priv *priv)
/* Skip queues that cannot request interrupts. */
if (!rxq || !rxq->channel) {
/* Use invalid intr_vec[] index to disable entry. */
intr_handle->intr_vec[i] =
RTE_INTR_VEC_RXTX_OFFSET +
RTE_MAX_RXTX_INTR_VEC_ID;
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
return -rte_errno;
continue;
}
if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
@ -96,14 +95,21 @@ mlx4_rx_intr_vec_enable(struct mlx4_priv *priv)
mlx4_rx_intr_vec_disable(priv);
return -rte_errno;
}
intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
intr_handle->efds[count] = rxq->channel->fd;
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + count))
return -rte_errno;
if (rte_intr_efds_index_set(intr_handle, i,
rxq->channel->fd))
return -rte_errno;
count++;
}
if (!count)
mlx4_rx_intr_vec_disable(priv);
else
intr_handle->nb_efd = count;
else if (rte_intr_nb_efd_set(intr_handle, count))
return -rte_errno;
return 0;
}
@ -254,12 +260,13 @@ mlx4_intr_uninstall(struct mlx4_priv *priv)
{
int err = rte_errno; /* Make sure rte_errno remains unchanged. */
if (priv->intr_handle.fd != -1) {
rte_intr_callback_unregister(&priv->intr_handle,
if (rte_intr_fd_get(priv->intr_handle) != -1) {
rte_intr_callback_unregister(priv->intr_handle,
(void (*)(void *))
mlx4_interrupt_handler,
priv);
priv->intr_handle.fd = -1;
if (rte_intr_fd_set(priv->intr_handle, -1))
return -rte_errno;
}
rte_eal_alarm_cancel((void (*)(void *))mlx4_link_status_alarm, priv);
priv->intr_alarm = 0;
@ -286,8 +293,10 @@ mlx4_intr_install(struct mlx4_priv *priv)
mlx4_intr_uninstall(priv);
if (intr_conf->lsc | intr_conf->rmv) {
priv->intr_handle.fd = priv->ctx->async_fd;
rc = rte_intr_callback_register(&priv->intr_handle,
if (rte_intr_fd_set(priv->intr_handle, priv->ctx->async_fd))
return -rte_errno;
rc = rte_intr_callback_register(priv->intr_handle,
(void (*)(void *))
mlx4_interrupt_handler,
priv);

55
drivers/net/mlx5/linux/mlx5_os.c
View File

@ -2458,11 +2458,9 @@ mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
* Representor interrupts handle is released in mlx5_dev_stop().
*/
if (list[i].info.representor) {
struct rte_intr_handle *intr_handle;
intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
sizeof(*intr_handle), 0,
SOCKET_ID_ANY);
if (!intr_handle) {
struct rte_intr_handle *intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (intr_handle == NULL) {
DRV_LOG(ERR,
"port %u failed to allocate memory for interrupt handler "
"Rx interrupts will not be supported",
@ -2626,7 +2624,7 @@ mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
if (eth_dev == NULL)
return -rte_errno;
/* Post create. */
eth_dev->intr_handle = &adev->intr_handle;
eth_dev->intr_handle = adev->intr_handle;
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
@ -2690,24 +2688,38 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
int flags;
struct ibv_context *ctx = sh->cdev->ctx;
sh->intr_handle.fd = -1;
sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (sh->intr_handle == NULL) {
DRV_LOG(ERR, "Fail to allocate intr_handle");
rte_errno = ENOMEM;
return;
}
rte_intr_fd_set(sh->intr_handle, -1);
flags = fcntl(ctx->async_fd, F_GETFL);
ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
if (ret) {
DRV_LOG(INFO, "failed to change file descriptor async event"
" queue");
} else {
sh->intr_handle.fd = ctx->async_fd;
sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
if (rte_intr_callback_register(&sh->intr_handle,
rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
if (rte_intr_callback_register(sh->intr_handle,
mlx5_dev_interrupt_handler, sh)) {
DRV_LOG(INFO, "Fail to install the shared interrupt.");
sh->intr_handle.fd = -1;
rte_intr_fd_set(sh->intr_handle, -1);
}
}
if (sh->devx) {
#ifdef HAVE_IBV_DEVX_ASYNC
sh->intr_handle_devx.fd = -1;
sh->intr_handle_devx =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (!sh->intr_handle_devx) {
DRV_LOG(ERR, "Fail to allocate intr_handle");
rte_errno = ENOMEM;
return;
}
rte_intr_fd_set(sh->intr_handle_devx, -1);
sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
if (!devx_comp) {
@ -2721,13 +2733,14 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
" devx comp");
return;
}
sh->intr_handle_devx.fd = devx_comp->fd;
sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
if (rte_intr_callback_register(&sh->intr_handle_devx,
rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
rte_intr_type_set(sh->intr_handle_devx,
RTE_INTR_HANDLE_EXT);
if (rte_intr_callback_register(sh->intr_handle_devx,
mlx5_dev_interrupt_handler_devx, sh)) {
DRV_LOG(INFO, "Fail to install the devx shared"
" interrupt.");
sh->intr_handle_devx.fd = -1;
rte_intr_fd_set(sh->intr_handle_devx, -1);
}
#endif /* HAVE_IBV_DEVX_ASYNC */
}
@ -2744,13 +2757,15 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
void
mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
{
if (sh->intr_handle.fd >= 0)
mlx5_intr_callback_unregister(&sh->intr_handle,
if (rte_intr_fd_get(sh->intr_handle) >= 0)
mlx5_intr_callback_unregister(sh->intr_handle,
mlx5_dev_interrupt_handler, sh);
rte_intr_instance_free(sh->intr_handle);
#ifdef HAVE_IBV_DEVX_ASYNC
if (sh->intr_handle_devx.fd >= 0)
rte_intr_callback_unregister(&sh->intr_handle_devx,
if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
rte_intr_callback_unregister(sh->intr_handle_devx,
mlx5_dev_interrupt_handler_devx, sh);
rte_intr_instance_free(sh->intr_handle_devx);
if (sh->devx_comp)
mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
#endif

25
drivers/net/mlx5/linux/mlx5_socket.c
View File

@ -23,7 +23,7 @@
#define MLX5_SOCKET_PATH "/var/tmp/dpdk_net_mlx5_%d"
int server_socket; /* Unix socket for primary process. */
struct rte_intr_handle server_intr_handle; /* Interrupt handler. */
struct rte_intr_handle *server_intr_handle; /* Interrupt handler. */
/**
* Handle server pmd socket interrupts.
@ -145,9 +145,19 @@ static int
mlx5_pmd_interrupt_handler_install(void)
{
MLX5_ASSERT(server_socket);
server_intr_handle.fd = server_socket;
server_intr_handle.type = RTE_INTR_HANDLE_EXT;
return rte_intr_callback_register(&server_intr_handle,
server_intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (server_intr_handle == NULL) {
DRV_LOG(ERR, "Fail to allocate intr_handle");
return -ENOMEM;
}
if (rte_intr_fd_set(server_intr_handle, server_socket))
return -rte_errno;
if (rte_intr_type_set(server_intr_handle, RTE_INTR_HANDLE_EXT))
return -rte_errno;
return rte_intr_callback_register(server_intr_handle,
mlx5_pmd_socket_handle, NULL);
}
@ -158,12 +168,13 @@ static void
mlx5_pmd_interrupt_handler_uninstall(void)
{
if (server_socket) {
mlx5_intr_callback_unregister(&server_intr_handle,
mlx5_intr_callback_unregister(server_intr_handle,
mlx5_pmd_socket_handle,
NULL);
}
server_intr_handle.fd = 0;
server_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
rte_intr_fd_set(server_intr_handle, 0);
rte_intr_type_set(server_intr_handle, RTE_INTR_HANDLE_UNKNOWN);
rte_intr_instance_free(server_intr_handle);
}
/**

6
drivers/net/mlx5/mlx5.h
View File

@ -996,7 +996,7 @@ struct mlx5_dev_txpp {
uint32_t tick; /* Completion tick duration in nanoseconds. */
uint32_t test; /* Packet pacing test mode. */
int32_t skew; /* Scheduling skew. */
struct rte_intr_handle intr_handle; /* Periodic interrupt. */
struct rte_intr_handle *intr_handle; /* Periodic interrupt. */
void *echan; /* Event Channel. */
struct mlx5_txpp_wq clock_queue; /* Clock Queue. */
struct mlx5_txpp_wq rearm_queue; /* Clock Queue. */
@ -1160,8 +1160,8 @@ struct mlx5_dev_ctx_shared {
struct mlx5_indexed_pool *ipool[MLX5_IPOOL_MAX];
struct mlx5_indexed_pool *mdh_ipools[MLX5_MAX_MODIFY_NUM];
/* Shared interrupt handler section. */
struct rte_intr_handle intr_handle; /* Interrupt handler for device. */
struct rte_intr_handle intr_handle_devx; /* DEVX interrupt handler. */
struct rte_intr_handle *intr_handle; /* Interrupt handler for device. */
struct rte_intr_handle *intr_handle_devx; /* DEVX interrupt handler. */
void *devx_comp; /* DEVX async comp obj. */
struct mlx5_devx_obj *tis[16]; /* TIS object. */
struct mlx5_devx_obj *td; /* Transport domain. */

43
drivers/net/mlx5/mlx5_rxq.c
View File

@ -834,10 +834,7 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
if (!dev->data->dev_conf.intr_conf.rxq)
return 0;
mlx5_rx_intr_vec_disable(dev);
intr_handle->intr_vec = mlx5_malloc(0,
n * sizeof(intr_handle->intr_vec[0]),
0, SOCKET_ID_ANY);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
DRV_LOG(ERR,
"port %u failed to allocate memory for interrupt"
" vector, Rx interrupts will not be supported",
@ -845,7 +842,10 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
rte_errno = ENOMEM;
return -rte_errno;
}
intr_handle->type = RTE_INTR_HANDLE_EXT;
if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
return -rte_errno;
for (i = 0; i != n; ++i) {
/* This rxq obj must not be released in this function. */
struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
@ -856,9 +856,9 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
if (!rxq_obj || (!rxq_obj->ibv_channel &&
!rxq_obj->devx_channel)) {
/* Use invalid intr_vec[] index to disable entry. */
intr_handle->intr_vec[i] =
RTE_INTR_VEC_RXTX_OFFSET +
RTE_MAX_RXTX_INTR_VEC_ID;
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
return -rte_errno;
/* Decrease the rxq_ctrl's refcnt */
if (rxq_ctrl)
mlx5_rxq_release(dev, i);
@ -885,14 +885,19 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
mlx5_rx_intr_vec_disable(dev);
return -rte_errno;
}
intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
intr_handle->efds[count] = rxq_obj->fd;
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + count))
return -rte_errno;
if (rte_intr_efds_index_set(intr_handle, count,
rxq_obj->fd))
return -rte_errno;
count++;
}
if (!count)
mlx5_rx_intr_vec_disable(dev);
else
intr_handle->nb_efd = count;
else if (rte_intr_nb_efd_set(intr_handle, count))
return -rte_errno;
return 0;
}
@ -913,11 +918,11 @@ mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
if (!dev->data->dev_conf.intr_conf.rxq)
return;
if (!intr_handle->intr_vec)
if (rte_intr_vec_list_index_get(intr_handle, 0) < 0)
goto free;
for (i = 0; i != n; ++i) {
if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
RTE_MAX_RXTX_INTR_VEC_ID)
if (rte_intr_vec_list_index_get(intr_handle, i) ==
RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)
continue;
/**
* Need to access directly the queue to release the reference
@ -927,10 +932,10 @@ mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
}
free:
rte_intr_free_epoll_fd(intr_handle);
if (intr_handle->intr_vec)
mlx5_free(intr_handle->intr_vec);
intr_handle->nb_efd = 0;
intr_handle->intr_vec = NULL;
rte_intr_vec_list_free(intr_handle);
rte_intr_nb_efd_set(intr_handle, 0);
}
/**

4
drivers/net/mlx5/mlx5_trigger.c
View File

@ -1183,7 +1183,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)
dev->rx_pkt_burst = mlx5_select_rx_function(dev);
/* Enable datapath on secondary process. */
mlx5_mp_os_req_start_rxtx(dev);
if (priv->sh->intr_handle.fd >= 0) {
if (rte_intr_fd_get(priv->sh->intr_handle) >= 0) {
priv->sh->port[priv->dev_port - 1].ih_port_id =
(uint32_t)dev->data->port_id;
} else {
@ -1192,7 +1192,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)
dev->data->dev_conf.intr_conf.lsc = 0;
dev->data->dev_conf.intr_conf.rmv = 0;
}
if (priv->sh->intr_handle_devx.fd >= 0)
if (rte_intr_fd_get(priv->sh->intr_handle_devx) >= 0)
priv->sh->port[priv->dev_port - 1].devx_ih_port_id =
(uint32_t)dev->data->port_id;
return 0;

25
drivers/net/mlx5/mlx5_txpp.c
View File

@ -759,11 +759,11 @@ mlx5_txpp_interrupt_handler(void *cb_arg)
static void
mlx5_txpp_stop_service(struct mlx5_dev_ctx_shared *sh)
{
if (!sh->txpp.intr_handle.fd)
if (!rte_intr_fd_get(sh->txpp.intr_handle))
return;
mlx5_intr_callback_unregister(&sh->txpp.intr_handle,
mlx5_intr_callback_unregister(sh->txpp.intr_handle,
mlx5_txpp_interrupt_handler, sh);
sh->txpp.intr_handle.fd = 0;
rte_intr_instance_free(sh->txpp.intr_handle);
}
/* Attach interrupt handler and fires first request to Rearm Queue. */
@ -787,13 +787,22 @@ mlx5_txpp_start_service(struct mlx5_dev_ctx_shared *sh)
rte_errno = errno;
return -rte_errno;
}
memset(&sh->txpp.intr_handle, 0, sizeof(sh->txpp.intr_handle));
sh->txpp.intr_handle =
rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (sh->txpp.intr_handle == NULL) {
DRV_LOG(ERR, "Fail to allocate intr_handle");
return -ENOMEM;
}
fd = mlx5_os_get_devx_channel_fd(sh->txpp.echan);
sh->txpp.intr_handle.fd = fd;
sh->txpp.intr_handle.type = RTE_INTR_HANDLE_EXT;
if (rte_intr_callback_register(&sh->txpp.intr_handle,
if (rte_intr_fd_set(sh->txpp.intr_handle, fd))
return -rte_errno;
if (rte_intr_type_set(sh->txpp.intr_handle, RTE_INTR_HANDLE_EXT))
return -rte_errno;
if (rte_intr_callback_register(sh->txpp.intr_handle,
mlx5_txpp_interrupt_handler, sh)) {
sh->txpp.intr_handle.fd = 0;
rte_intr_fd_set(sh->txpp.intr_handle, 0);
DRV_LOG(ERR, "Failed to register CQE interrupt %d.", rte_errno);
return -rte_errno;
}

4
drivers/net/netvsc/hn_ethdev.c
View File

@ -133,9 +133,9 @@ eth_dev_vmbus_allocate(struct rte_vmbus_device *dev, size_t private_data_size)
eth_dev->device = &dev->device;
/* interrupt is simulated */
dev->intr_handle.type = RTE_INTR_HANDLE_EXT;
rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_EXT);
eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
eth_dev->intr_handle = &dev->intr_handle;
eth_dev->intr_handle = dev->intr_handle;
return eth_dev;
}

34
drivers/net/nfp/nfp_common.c
View File

@ -307,24 +307,21 @@ nfp_configure_rx_interrupt(struct rte_eth_dev *dev,
struct nfp_net_hw *hw;
int i;
if (!intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (!intr_handle->intr_vec) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
}
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
}
hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
if (intr_handle->type == RTE_INTR_HANDLE_UIO) {
if (rte_intr_type_get(intr_handle) == RTE_INTR_HANDLE_UIO) {
PMD_INIT_LOG(INFO, "VF: enabling RX interrupt with UIO");
/* UIO just supports one queue and no LSC*/
nn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(0), 0);
intr_handle->intr_vec[0] = 0;
if (rte_intr_vec_list_index_set(intr_handle, 0, 0))
return -1;
} else {
PMD_INIT_LOG(INFO, "VF: enabling RX interrupt with VFIO");
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@ -333,9 +330,12 @@ nfp_configure_rx_interrupt(struct rte_eth_dev *dev,
* efd interrupts
*/
nn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(i), i + 1);
intr_handle->intr_vec[i] = i + 1;
if (rte_intr_vec_list_index_set(intr_handle, i,
i + 1))
return -1;
PMD_INIT_LOG(DEBUG, "intr_vec[%d]= %d", i,
intr_handle->intr_vec[i]);
rte_intr_vec_list_index_get(intr_handle,
i));
}
}
@ -804,7 +804,8 @@ nfp_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
pci_dev = RTE_ETH_DEV_TO_PCI(dev);
if (pci_dev->intr_handle.type != RTE_INTR_HANDLE_UIO)
if (rte_intr_type_get(pci_dev->intr_handle) !=
RTE_INTR_HANDLE_UIO)
base = 1;
/* Make sure all updates are written before un-masking */
@ -824,7 +825,8 @@ nfp_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
pci_dev = RTE_ETH_DEV_TO_PCI(dev);
if (pci_dev->intr_handle.type != RTE_INTR_HANDLE_UIO)
if (rte_intr_type_get(pci_dev->intr_handle) !=
RTE_INTR_HANDLE_UIO)
base = 1;
/* Make sure all updates are written before un-masking */
@ -874,7 +876,7 @@ nfp_net_irq_unmask(struct rte_eth_dev *dev)
if (hw->ctrl & NFP_NET_CFG_CTRL_MSIXAUTO) {
/* If MSI-X auto-masking is used, clear the entry */
rte_wmb();
rte_intr_ack(&pci_dev->intr_handle);
rte_intr_ack(pci_dev->intr_handle);
} else {
/* Make sure all updates are written before un-masking */
rte_wmb();

13
drivers/net/nfp/nfp_ethdev.c
View File

@ -82,7 +82,7 @@ static int
nfp_net_start(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t new_ctrl, update = 0;
struct nfp_net_hw *hw;
struct nfp_pf_dev *pf_dev;
@ -109,12 +109,13 @@ nfp_net_start(struct rte_eth_dev *dev)
"with NFP multiport PF");
return -EINVAL;
}
if (intr_handle->type == RTE_INTR_HANDLE_UIO) {
if (rte_intr_type_get(intr_handle) ==
RTE_INTR_HANDLE_UIO) {
/*
* Better not to share LSC with RX interrupts.
* Unregistering LSC interrupt handler
*/
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_callback_unregister(pci_dev->intr_handle,
nfp_net_dev_interrupt_handler, (void *)dev);
if (dev->data->nb_rx_queues > 1) {
@ -333,10 +334,10 @@ nfp_net_close(struct rte_eth_dev *dev)
nfp_cpp_free(pf_dev->cpp);
rte_free(pf_dev);
rte_intr_disable(&pci_dev->intr_handle);
rte_intr_disable(pci_dev->intr_handle);
/* unregister callback func from eal lib */
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_callback_unregister(pci_dev->intr_handle,
nfp_net_dev_interrupt_handler,
(void *)dev);
@ -579,7 +580,7 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
/* Registering LSC interrupt handler */
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
nfp_net_dev_interrupt_handler,
(void *)eth_dev);
/* Telling the firmware about the LSC interrupt entry */

13
drivers/net/nfp/nfp_ethdev_vf.c
View File

@ -51,7 +51,7 @@ static int
nfp_netvf_start(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t new_ctrl, update = 0;
struct nfp_net_hw *hw;
struct rte_eth_conf *dev_conf;
@ -71,12 +71,13 @@ nfp_netvf_start(struct rte_eth_dev *dev)
/* check and configure queue intr-vector mapping */
if (dev->data->dev_conf.intr_conf.rxq != 0) {
if (intr_handle->type == RTE_INTR_HANDLE_UIO) {
if (rte_intr_type_get(intr_handle) ==
RTE_INTR_HANDLE_UIO) {
/*
* Better not to share LSC with RX interrupts.
* Unregistering LSC interrupt handler
*/
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_callback_unregister(pci_dev->intr_handle,
nfp_net_dev_interrupt_handler, (void *)dev);
if (dev->data->nb_rx_queues > 1) {
@ -225,10 +226,10 @@ nfp_netvf_close(struct rte_eth_dev *dev)
nfp_net_reset_rx_queue(this_rx_q);
}
rte_intr_disable(&pci_dev->intr_handle);
rte_intr_disable(pci_dev->intr_handle);
/* unregister callback func from eal lib */
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_callback_unregister(pci_dev->intr_handle,
nfp_net_dev_interrupt_handler,
(void *)dev);
@ -445,7 +446,7 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
/* Registering LSC interrupt handler */
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
nfp_net_dev_interrupt_handler,
(void *)eth_dev);
/* Telling the firmware about the LSC interrupt entry */

29
drivers/net/ngbe/ngbe_ethdev.c
View File

@ -129,7 +129,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct ngbe_hw *hw = ngbe_dev_hw(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
const struct rte_memzone *mz;
uint32_t ctrl_ext;
int err;
@ -334,7 +334,7 @@ ngbe_dev_start(struct rte_eth_dev *dev)
{
struct ngbe_hw *hw = ngbe_dev_hw(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t intr_vector = 0;
int err;
bool link_up = false, negotiate = false;
@ -372,11 +372,9 @@ ngbe_dev_start(struct rte_eth_dev *dev)
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && intr_handle->intr_vec == NULL) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR,
"Failed to allocate %d rx_queues intr_vec",
dev->data->nb_rx_queues);
@ -503,7 +501,7 @@ ngbe_dev_stop(struct rte_eth_dev *dev)
struct rte_eth_link link;
struct ngbe_hw *hw = ngbe_dev_hw(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (hw->adapter_stopped)
return 0;
@ -540,10 +538,7 @@ ngbe_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
hw->adapter_stopped = true;
dev->data->dev_started = 0;
@ -559,7 +554,7 @@ ngbe_dev_close(struct rte_eth_dev *dev)
{
struct ngbe_hw *hw = ngbe_dev_hw(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int retries = 0;
int ret;
@ -1093,7 +1088,7 @@ static void
ngbe_configure_msix(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct ngbe_hw *hw = ngbe_dev_hw(dev);
uint32_t queue_id, base = NGBE_MISC_VEC_ID;
uint32_t vec = NGBE_MISC_VEC_ID;
@ -1128,8 +1123,10 @@ ngbe_configure_msix(struct rte_eth_dev *dev)
queue_id++) {
/* by default, 1:1 mapping */
ngbe_set_ivar_map(hw, 0, queue_id, vec);
intr_handle->intr_vec[queue_id] = vec;
if (vec < base + intr_handle->nb_efd - 1)
rte_intr_vec_list_index_set(intr_handle,
queue_id, vec);
if (vec < base + rte_intr_nb_efd_get(intr_handle)
- 1)
vec++;
}

35
drivers/net/octeontx2/otx2_ethdev_irq.c
View File

@ -34,7 +34,7 @@ static int
nix_lf_register_err_irq(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int rc, vec;
@ -54,7 +54,7 @@ static void
nix_lf_unregister_err_irq(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int vec;
@ -90,7 +90,7 @@ static int
nix_lf_register_ras_irq(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int rc, vec;
@ -110,7 +110,7 @@ static void
nix_lf_unregister_ras_irq(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int vec;
@ -263,7 +263,7 @@ int
oxt2_nix_register_queue_irqs(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int vec, q, sqs, rqs, qs, rc = 0;
@ -308,7 +308,7 @@ void
oxt2_nix_unregister_queue_irqs(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int vec, q;
@ -332,7 +332,7 @@ int
oxt2_nix_register_cq_irqs(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
uint8_t rc = 0, vec, q;
@ -362,20 +362,19 @@ oxt2_nix_register_cq_irqs(struct rte_eth_dev *eth_dev)
return rc;
}
if (!handle->intr_vec) {
handle->intr_vec = rte_zmalloc("intr_vec",
dev->configured_cints *
sizeof(int), 0);
if (!handle->intr_vec) {
otx2_err("Failed to allocate %d rx intr_vec",
dev->configured_cints);
return -ENOMEM;
}
rc = rte_intr_vec_list_alloc(handle, "intr_vec",
dev->configured_cints);
if (rc) {
otx2_err("Fail to allocate intr vec list, "
"rc=%d", rc);
return rc;
}
/* VFIO vector zero is resereved for misc interrupt so
* doing required adjustment. (b13bfab4cd)
*/
handle->intr_vec[q] = RTE_INTR_VEC_RXTX_OFFSET + vec;
if (rte_intr_vec_list_index_set(handle, q,
RTE_INTR_VEC_RXTX_OFFSET + vec))
return -1;
/* Configure CQE interrupt coalescing parameters */
otx2_write64(((CQ_CQE_THRESH_DEFAULT) |
@ -395,7 +394,7 @@ void
oxt2_nix_unregister_cq_irqs(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *handle = &pci_dev->intr_handle;
struct rte_intr_handle *handle = pci_dev->intr_handle;
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int vec, q;

16
drivers/net/qede/qede_ethdev.c
View File

@ -1569,17 +1569,17 @@ static int qede_dev_close(struct rte_eth_dev *eth_dev)
qdev->ops->common->slowpath_stop(edev);
qdev->ops->common->remove(edev);
rte_intr_disable(&pci_dev->intr_handle);
rte_intr_disable(pci_dev->intr_handle);
switch (pci_dev->intr_handle.type) {
switch (rte_intr_type_get(pci_dev->intr_handle)) {
case RTE_INTR_HANDLE_UIO_INTX:
case RTE_INTR_HANDLE_VFIO_LEGACY:
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_callback_unregister(pci_dev->intr_handle,
qede_interrupt_handler_intx,
(void *)eth_dev);
break;
default:
rte_intr_callback_unregister(&pci_dev->intr_handle,
rte_intr_callback_unregister(pci_dev->intr_handle,
qede_interrupt_handler,
(void *)eth_dev);
}
@ -2554,22 +2554,22 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
}
qede_update_pf_params(edev);
switch (pci_dev->intr_handle.type) {
switch (rte_intr_type_get(pci_dev->intr_handle)) {
case RTE_INTR_HANDLE_UIO_INTX:
case RTE_INTR_HANDLE_VFIO_LEGACY:
int_mode = ECORE_INT_MODE_INTA;
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
qede_interrupt_handler_intx,
(void *)eth_dev);
break;
default:
int_mode = ECORE_INT_MODE_MSIX;
rte_intr_callback_register(&pci_dev->intr_handle,
rte_intr_callback_register(pci_dev->intr_handle,
qede_interrupt_handler,
(void *)eth_dev);
}
if (rte_intr_enable(&pci_dev->intr_handle)) {
if (rte_intr_enable(pci_dev->intr_handle)) {
DP_ERR(edev, "rte_intr_enable() failed\n");
rc = -ENODEV;
goto err;

30
drivers/net/sfc/sfc_intr.c
View File

@ -79,7 +79,7 @@ sfc_intr_line_handler(void *cb_arg)
if (qmask & (1 << sa->mgmt_evq_index))
sfc_intr_handle_mgmt_evq(sa);
if (rte_intr_ack(&pci_dev->intr_handle) != 0)
if (rte_intr_ack(pci_dev->intr_handle) != 0)
sfc_err(sa, "cannot reenable interrupts");
sfc_log_init(sa, "done");
@ -123,7 +123,7 @@ sfc_intr_message_handler(void *cb_arg)
sfc_intr_handle_mgmt_evq(sa);
if (rte_intr_ack(&pci_dev->intr_handle) != 0)
if (rte_intr_ack(pci_dev->intr_handle) != 0)
sfc_err(sa, "cannot reenable interrupts");
sfc_log_init(sa, "done");
@ -159,7 +159,7 @@ sfc_intr_start(struct sfc_adapter *sa)
goto fail_intr_init;
pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev);
intr_handle = &pci_dev->intr_handle;
intr_handle = pci_dev->intr_handle;
if (intr->handler != NULL) {
if (intr->rxq_intr && rte_intr_cap_multiple(intr_handle)) {
@ -171,16 +171,15 @@ sfc_intr_start(struct sfc_adapter *sa)
goto fail_rte_intr_efd_enable;
}
if (rte_intr_dp_is_en(intr_handle)) {
intr_handle->intr_vec =
rte_calloc("intr_vec",
sa->eth_dev->data->nb_rx_queues, sizeof(int),
0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_vec_list_alloc(intr_handle,
"intr_vec",
sa->eth_dev->data->nb_rx_queues)) {
sfc_err(sa,
"Failed to allocate %d rx_queues intr_vec",
sa->eth_dev->data->nb_rx_queues);
goto fail_intr_vector_alloc;
}
}
sfc_log_init(sa, "rte_intr_callback_register");
@ -214,16 +213,17 @@ sfc_intr_start(struct sfc_adapter *sa)
efx_intr_enable(sa->nic);
}
sfc_log_init(sa, "done type=%u max_intr=%d nb_efd=%u vec=%p",
intr_handle->type, intr_handle->max_intr,
intr_handle->nb_efd, intr_handle->intr_vec);
sfc_log_init(sa, "done type=%u max_intr=%d nb_efd=%u",
rte_intr_type_get(intr_handle),
rte_intr_max_intr_get(intr_handle),
rte_intr_nb_efd_get(intr_handle));
return 0;
fail_rte_intr_enable:
rte_intr_callback_unregister(intr_handle, intr->handler, (void *)sa);
fail_rte_intr_cb_reg:
rte_free(intr_handle->intr_vec);
rte_intr_vec_list_free(intr_handle);
fail_intr_vector_alloc:
rte_intr_efd_disable(intr_handle);
@ -250,9 +250,9 @@ sfc_intr_stop(struct sfc_adapter *sa)
efx_intr_disable(sa->nic);
intr_handle = &pci_dev->intr_handle;
intr_handle = pci_dev->intr_handle;
rte_free(intr_handle->intr_vec);
rte_intr_vec_list_free(intr_handle);
rte_intr_efd_disable(intr_handle);
if (rte_intr_disable(intr_handle) != 0)
@ -322,7 +322,7 @@ sfc_intr_attach(struct sfc_adapter *sa)
sfc_log_init(sa, "entry");
switch (pci_dev->intr_handle.type) {
switch (rte_intr_type_get(pci_dev->intr_handle)) {
#ifdef RTE_EXEC_ENV_LINUX
case RTE_INTR_HANDLE_UIO_INTX:
case RTE_INTR_HANDLE_VFIO_LEGACY:

33
drivers/net/tap/rte_eth_tap.c
View File

@ -1663,7 +1663,8 @@ tap_dev_intr_handler(void *cb_arg)
struct rte_eth_dev *dev = cb_arg;
struct pmd_internals *pmd = dev->data->dev_private;
tap_nl_recv(pmd->intr_handle.fd, tap_nl_msg_handler, dev);
tap_nl_recv(rte_intr_fd_get(pmd->intr_handle),
tap_nl_msg_handler, dev);
}
static int
@ -1674,22 +1675,22 @@ tap_lsc_intr_handle_set(struct rte_eth_dev *dev, int set)
/* In any case, disable interrupt if the conf is no longer there. */
if (!dev->data->dev_conf.intr_conf.lsc) {
if (pmd->intr_handle.fd != -1) {
if (rte_intr_fd_get(pmd->intr_handle) != -1)
goto clean;
}
return 0;
}
if (set) {
pmd->intr_handle.fd = tap_nl_init(RTMGRP_LINK);
if (unlikely(pmd->intr_handle.fd == -1))
rte_intr_fd_set(pmd->intr_handle, tap_nl_init(RTMGRP_LINK));
if (unlikely(rte_intr_fd_get(pmd->intr_handle) == -1))
return -EBADF;
return rte_intr_callback_register(
&pmd->intr_handle, tap_dev_intr_handler, dev);
pmd->intr_handle, tap_dev_intr_handler, dev);
}
clean:
do {
ret = rte_intr_callback_unregister(&pmd->intr_handle,
ret = rte_intr_callback_unregister(pmd->intr_handle,
tap_dev_intr_handler, dev);
if (ret >= 0) {
break;
@ -1702,8 +1703,8 @@ tap_lsc_intr_handle_set(struct rte_eth_dev *dev, int set)
}
} while (true);
tap_nl_final(pmd->intr_handle.fd);
pmd->intr_handle.fd = -1;
tap_nl_final(rte_intr_fd_get(pmd->intr_handle));
rte_intr_fd_set(pmd->intr_handle, -1);
return 0;
}
@ -1918,6 +1919,13 @@ eth_dev_tap_create(struct rte_vdev_device *vdev, const char *tap_name,
goto error_exit;
}
/* Allocate interrupt instance */
pmd->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (pmd->intr_handle == NULL) {
TAP_LOG(ERR, "Failed to allocate intr handle");
goto error_exit;
}
/* Setup some default values */
data = dev->data;
data->dev_private = pmd;
@ -1935,9 +1943,9 @@ eth_dev_tap_create(struct rte_vdev_device *vdev, const char *tap_name,
dev->rx_pkt_burst = pmd_rx_burst;
dev->tx_pkt_burst = pmd_tx_burst;
pmd->intr_handle.type = RTE_INTR_HANDLE_EXT;
pmd->intr_handle.fd = -1;
dev->intr_handle = &pmd->intr_handle;
rte_intr_type_set(pmd->intr_handle, RTE_INTR_HANDLE_EXT);
rte_intr_fd_set(pmd->intr_handle, -1);
dev->intr_handle = pmd->intr_handle;
/* Presetup the fds to -1 as being not valid */
for (i = 0; i < RTE_PMD_TAP_MAX_QUEUES; i++) {
@ -2088,6 +2096,7 @@ eth_dev_tap_create(struct rte_vdev_device *vdev, const char *tap_name,
/* mac_addrs must not be freed alone because part of dev_private */
dev->data->mac_addrs = NULL;
rte_eth_dev_release_port(dev);
rte_intr_instance_free(pmd->intr_handle);
error_exit_nodev:
TAP_LOG(ERR, "%s Unable to initialize %s",

2
drivers/net/tap/rte_eth_tap.h
View File

@ -89,7 +89,7 @@ struct pmd_internals {
LIST_HEAD(tap_implicit_flows, rte_flow) implicit_flows;
struct rx_queue rxq[RTE_PMD_TAP_MAX_QUEUES]; /* List of RX queues */
struct tx_queue txq[RTE_PMD_TAP_MAX_QUEUES]; /* List of TX queues */
struct rte_intr_handle intr_handle; /* LSC interrupt handle. */
struct rte_intr_handle *intr_handle; /* LSC interrupt handle. */
int ka_fd; /* keep-alive file descriptor */
struct rte_mempool *gso_ctx_mp; /* Mempool for GSO packets */
};

33
drivers/net/tap/tap_intr.c
View File

@ -29,12 +29,13 @@ static void
tap_rx_intr_vec_uninstall(struct rte_eth_dev *dev)
{
struct pmd_internals *pmd = dev->data->dev_private;
struct rte_intr_handle *intr_handle = &pmd->intr_handle;
struct rte_intr_handle *intr_handle = pmd->intr_handle;
rte_intr_free_epoll_fd(intr_handle);
free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
intr_handle->nb_efd = 0;
rte_intr_vec_list_free(intr_handle);
rte_intr_nb_efd_set(intr_handle, 0);
rte_intr_instance_free(intr_handle);
}
/**
@ -52,15 +53,15 @@ tap_rx_intr_vec_install(struct rte_eth_dev *dev)
struct pmd_internals *pmd = dev->data->dev_private;
struct pmd_process_private *process_private = dev->process_private;
unsigned int rxqs_n = pmd->dev->data->nb_rx_queues;
struct rte_intr_handle *intr_handle = &pmd->intr_handle;
struct rte_intr_handle *intr_handle = pmd->intr_handle;
unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
unsigned int i;
unsigned int count = 0;
if (!dev->data->dev_conf.intr_conf.rxq)
return 0;
intr_handle->intr_vec = malloc(sizeof(int) * rxqs_n);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_vec_list_alloc(intr_handle, NULL, rxqs_n)) {
rte_errno = ENOMEM;
TAP_LOG(ERR,
"failed to allocate memory for interrupt vector,"
@ -73,19 +74,23 @@ tap_rx_intr_vec_install(struct rte_eth_dev *dev)
/* Skip queues that cannot request interrupts. */
if (!rxq || process_private->rxq_fds[i] == -1) {
/* Use invalid intr_vec[] index to disable entry. */
intr_handle->intr_vec[i] =
RTE_INTR_VEC_RXTX_OFFSET +
RTE_MAX_RXTX_INTR_VEC_ID;
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
return -rte_errno;
continue;
}
intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
intr_handle->efds[count] = process_private->rxq_fds[i];
if (rte_intr_vec_list_index_set(intr_handle, i,
RTE_INTR_VEC_RXTX_OFFSET + count))
return -rte_errno;
if (rte_intr_efds_index_set(intr_handle, count,
process_private->rxq_fds[i]))
return -rte_errno;
count++;
}
if (!count)
tap_rx_intr_vec_uninstall(dev);
else
intr_handle->nb_efd = count;
else if (rte_intr_nb_efd_set(intr_handle, count))
return -rte_errno;
return 0;
}

10
drivers/net/thunderx/nicvf_ethdev.c
View File

@ -1858,6 +1858,8 @@ nicvf_dev_close(struct rte_eth_dev *dev)
nicvf_periodic_alarm_stop(nicvf_vf_interrupt, nic->snicvf[i]);
}
rte_intr_instance_free(nic->intr_handle);
return 0;
}
@ -2157,6 +2159,14 @@ nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)
goto fail;
}
/* Allocate interrupt instance */
nic->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
if (nic->intr_handle == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate intr handle");
ret = -ENODEV;
goto fail;
}
nicvf_disable_all_interrupts(nic);
ret = nicvf_periodic_alarm_start(nicvf_interrupt, eth_dev);

2
drivers/net/thunderx/nicvf_struct.h
View File

@ -100,7 +100,7 @@ struct nicvf {
uint16_t subsystem_vendor_id;
struct nicvf_rbdr *rbdr;
struct nicvf_rss_reta_info rss_info;
struct rte_intr_handle intr_handle;
struct rte_intr_handle *intr_handle;
uint8_t cpi_alg;
uint16_t mtu;
int skip_bytes;

38
drivers/net/txgbe/txgbe_ethdev.c
View File

@ -548,7 +548,7 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
struct txgbe_dcb_config *dcb_config = TXGBE_DEV_DCB_CONFIG(eth_dev);
struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(eth_dev);
struct txgbe_bw_conf *bw_conf = TXGBE_DEV_BW_CONF(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
const struct rte_memzone *mz;
uint32_t ctrl_ext;
uint16_t csum;
@ -1620,7 +1620,7 @@ txgbe_dev_start(struct rte_eth_dev *dev)
struct txgbe_hw_stats *hw_stats = TXGBE_DEV_STATS(dev);
struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t intr_vector = 0;
int err;
bool link_up = false, negotiate = 0;
@ -1670,17 +1670,14 @@ txgbe_dev_start(struct rte_eth_dev *dev)
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
}
}
/* confiugre msix for sleep until rx interrupt */
txgbe_configure_msix(dev);
@ -1861,7 +1858,7 @@ txgbe_dev_stop(struct rte_eth_dev *dev)
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int vf;
struct txgbe_tm_conf *tm_conf = TXGBE_DEV_TM_CONF(dev);
@ -1911,10 +1908,7 @@ txgbe_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
/* reset hierarchy commit */
tm_conf->committed = false;
@ -1977,7 +1971,7 @@ txgbe_dev_close(struct rte_eth_dev *dev)
{
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int retries = 0;
int ret;
@ -2936,8 +2930,8 @@ txgbe_dev_interrupt_get_status(struct rte_eth_dev *dev,
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
if (intr_handle->type != RTE_INTR_HANDLE_UIO &&
intr_handle->type != RTE_INTR_HANDLE_VFIO_MSIX)
if (rte_intr_type_get(intr_handle) != RTE_INTR_HANDLE_UIO &&
rte_intr_type_get(intr_handle) != RTE_INTR_HANDLE_VFIO_MSIX)
wr32(hw, TXGBE_PX_INTA, 1);
/* clear all cause mask */
@ -3103,7 +3097,7 @@ txgbe_dev_interrupt_delayed_handler(void *param)
{
struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
uint32_t eicr;
@ -3623,7 +3617,7 @@ static int
txgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t mask;
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
@ -3705,7 +3699,7 @@ static void
txgbe_configure_msix(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
uint32_t queue_id, base = TXGBE_MISC_VEC_ID;
uint32_t vec = TXGBE_MISC_VEC_ID;
@ -3739,8 +3733,10 @@ txgbe_configure_msix(struct rte_eth_dev *dev)
queue_id++) {
/* by default, 1:1 mapping */
txgbe_set_ivar_map(hw, 0, queue_id, vec);
intr_handle->intr_vec[queue_id] = vec;
if (vec < base + intr_handle->nb_efd - 1)
rte_intr_vec_list_index_set(intr_handle,
queue_id, vec);
if (vec < base + rte_intr_nb_efd_get(intr_handle)
- 1)
vec++;
}

33
drivers/net/txgbe/txgbe_ethdev_vf.c
View File

@ -166,7 +166,7 @@ eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)
int err;
uint32_t tc, tcs;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(eth_dev);
struct txgbe_hwstrip *hwstrip = TXGBE_DEV_HWSTRIP(eth_dev);
@ -608,7 +608,7 @@ txgbevf_dev_start(struct rte_eth_dev *dev)
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
uint32_t intr_vector = 0;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int err, mask = 0;
@ -669,11 +669,9 @@ txgbevf_dev_start(struct rte_eth_dev *dev)
return -1;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
if (rte_intr_dp_is_en(intr_handle)) {
if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
dev->data->nb_rx_queues)) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
return -ENOMEM;
@ -712,7 +710,7 @@ txgbevf_dev_stop(struct rte_eth_dev *dev)
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (hw->adapter_stopped)
return 0;
@ -739,10 +737,7 @@ txgbevf_dev_stop(struct rte_eth_dev *dev)
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
rte_intr_vec_list_free(intr_handle);
adapter->rss_reta_updated = 0;
hw->dev_start = false;
@ -755,7 +750,7 @@ txgbevf_dev_close(struct rte_eth_dev *dev)
{
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
int ret;
PMD_INIT_FUNC_TRACE();
@ -916,7 +911,7 @@ static int
txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
uint32_t vec = TXGBE_MISC_VEC_ID;
@ -938,7 +933,7 @@ txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
uint32_t vec = TXGBE_MISC_VEC_ID;
if (rte_intr_allow_others(intr_handle))
@ -978,7 +973,7 @@ static void
txgbevf_configure_msix(struct rte_eth_dev *dev)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
uint32_t q_idx;
uint32_t vector_idx = TXGBE_MISC_VEC_ID;
@ -1004,8 +999,10 @@ txgbevf_configure_msix(struct rte_eth_dev *dev)
* as TXGBE_VF_MAXMSIVECOTR = 1
*/
txgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);
intr_handle->intr_vec[q_idx] = vector_idx;
if (vector_idx < base + intr_handle->nb_efd - 1)
rte_intr_vec_list_index_set(intr_handle, q_idx,
vector_idx);
if (vector_idx < base + rte_intr_nb_efd_get(intr_handle)
- 1)
vector_idx++;
}

80
drivers/net/vhost/rte_eth_vhost.c
View File

@ -523,40 +523,43 @@ static int
eth_vhost_update_intr(struct rte_eth_dev *eth_dev, uint16_t rxq_idx)
{
struct rte_intr_handle *handle = eth_dev->intr_handle;
struct rte_epoll_event rev;
struct rte_epoll_event rev, *elist;
int epfd, ret;
if (!handle)
if (handle == NULL)
return 0;
if (handle->efds[rxq_idx] == handle->elist[rxq_idx].fd)
elist = rte_intr_elist_index_get(handle, rxq_idx);
if (rte_intr_efds_index_get(handle, rxq_idx) == elist->fd)
return 0;
VHOST_LOG(INFO, "kickfd for rxq-%d was changed, updating handler.\n",
rxq_idx);
if (handle->elist[rxq_idx].fd != -1)
if (elist->fd != -1)
VHOST_LOG(ERR, "Unexpected previous kickfd value (Got %d, expected -1).\n",
handle->elist[rxq_idx].fd);
elist->fd);
/*
* First remove invalid epoll event, and then install
* the new one. May be solved with a proper API in the
* future.
*/
epfd = handle->elist[rxq_idx].epfd;
rev = handle->elist[rxq_idx];
epfd = elist->epfd;
rev = *elist;
ret = rte_epoll_ctl(epfd, EPOLL_CTL_DEL, rev.fd,
&handle->elist[rxq_idx]);
elist);
if (ret) {
VHOST_LOG(ERR, "Delete epoll event failed.\n");
return ret;
}
rev.fd = handle->efds[rxq_idx];
handle->elist[rxq_idx] = rev;
ret = rte_epoll_ctl(epfd, EPOLL_CTL_ADD, rev.fd,
&handle->elist[rxq_idx]);
rev.fd = rte_intr_efds_index_get(handle, rxq_idx);
if (rte_intr_elist_index_set(handle, rxq_idx, rev))
return -rte_errno;
elist = rte_intr_elist_index_get(handle, rxq_idx);
ret = rte_epoll_ctl(epfd, EPOLL_CTL_ADD, rev.fd, elist);
if (ret) {
VHOST_LOG(ERR, "Add epoll event failed.\n");
return ret;
@ -634,12 +637,10 @@ eth_vhost_uninstall_intr(struct rte_eth_dev *dev)
{
struct rte_intr_handle *intr_handle = dev->intr_handle;
if (intr_handle) {
if (intr_handle->intr_vec)
free(intr_handle->intr_vec);
free(intr_handle);
if (intr_handle != NULL) {
rte_intr_vec_list_free(intr_handle);
rte_intr_instance_free(intr_handle);
}
dev->intr_handle = NULL;
}
@ -653,32 +654,31 @@ eth_vhost_install_intr(struct rte_eth_dev *dev)
int ret;
/* uninstall firstly if we are reconnecting */
if (dev->intr_handle)
if (dev->intr_handle != NULL)
eth_vhost_uninstall_intr(dev);
dev->intr_handle = malloc(sizeof(*dev->intr_handle));
if (!dev->intr_handle) {
dev->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
if (dev->intr_handle == NULL) {
VHOST_LOG(ERR, "Fail to allocate intr_handle\n");
return -ENOMEM;
}
memset(dev->intr_handle, 0, sizeof(*dev->intr_handle));
if (rte_intr_efd_counter_size_set(dev->intr_handle, sizeof(uint64_t)))
return -rte_errno;
dev->intr_handle->efd_counter_size = sizeof(uint64_t);
dev->intr_handle->intr_vec =
malloc(nb_rxq * sizeof(dev->intr_handle->intr_vec[0]));
if (!dev->intr_handle->intr_vec) {
if (rte_intr_vec_list_alloc(dev->intr_handle, NULL, nb_rxq)) {
VHOST_LOG(ERR,
"Failed to allocate memory for interrupt vector\n");
free(dev->intr_handle);
rte_intr_instance_free(dev->intr_handle);
return -ENOMEM;
}
VHOST_LOG(INFO, "Prepare intr vec\n");
for (i = 0; i < nb_rxq; i++) {
dev->intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + i;
dev->intr_handle->efds[i] = -1;
if (rte_intr_vec_list_index_set(dev->intr_handle, i, RTE_INTR_VEC_RXTX_OFFSET + i))
return -rte_errno;
if (rte_intr_efds_index_set(dev->intr_handle, i, -1))
return -rte_errno;
vq = dev->data->rx_queues[i];
if (!vq) {
VHOST_LOG(INFO, "rxq-%d not setup yet, skip!\n", i);
@ -697,13 +697,20 @@ eth_vhost_install_intr(struct rte_eth_dev *dev)
"rxq-%d's kickfd is invalid, skip!\n", i);
continue;
}
dev->intr_handle->efds[i] = vring.kickfd;
if (rte_intr_efds_index_set(dev->intr_handle, i, vring.kickfd))
continue;
VHOST_LOG(INFO, "Installed intr vec for rxq-%d\n", i);
}
dev->intr_handle->nb_efd = nb_rxq;
dev->intr_handle->max_intr = nb_rxq + 1;
dev->intr_handle->type = RTE_INTR_HANDLE_VDEV;
if (rte_intr_nb_efd_set(dev->intr_handle, nb_rxq))
return -rte_errno;
if (rte_intr_max_intr_set(dev->intr_handle, nb_rxq + 1))
return -rte_errno;
if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_VDEV))
return -rte_errno;
return 0;
}
@ -908,7 +915,10 @@ vring_conf_update(int vid, struct rte_eth_dev *eth_dev, uint16_t vring_id)
vring_id);
return ret;
}
eth_dev->intr_handle->efds[rx_idx] = vring.kickfd;
if (rte_intr_efds_index_set(eth_dev->intr_handle, rx_idx,
vring.kickfd))
return -rte_errno;
vq = eth_dev->data->rx_queues[rx_idx];
if (!vq) {

21
drivers/net/virtio/virtio_ethdev.c
View File

@ -731,8 +731,7 @@ virtio_dev_close(struct rte_eth_dev *dev)
if (intr_conf->lsc || intr_conf->rxq) {
virtio_intr_disable(dev);
rte_intr_efd_disable(dev->intr_handle);
rte_free(dev->intr_handle->intr_vec);
dev->intr_handle->intr_vec = NULL;
rte_intr_vec_list_free(dev->intr_handle);
}
virtio_reset(hw);
@ -1643,7 +1642,9 @@ virtio_queues_bind_intr(struct rte_eth_dev *dev)
PMD_INIT_LOG(INFO, "queue/interrupt binding");
for (i = 0; i < dev->data->nb_rx_queues; ++i) {
dev->intr_handle->intr_vec[i] = i + 1;
if (rte_intr_vec_list_index_set(dev->intr_handle, i,
i + 1))
return -rte_errno;
if (VIRTIO_OPS(hw)->set_queue_irq(hw, hw->vqs[i * 2], i + 1) ==
VIRTIO_MSI_NO_VECTOR) {
PMD_DRV_LOG(ERR, "failed to set queue vector");
@ -1682,15 +1683,11 @@ virtio_configure_intr(struct rte_eth_dev *dev)
return -1;
}
if (!dev->intr_handle->intr_vec) {
dev->intr_handle->intr_vec =
rte_zmalloc("intr_vec",
hw->max_queue_pairs * sizeof(int), 0);
if (!dev->intr_handle->intr_vec) {
PMD_INIT_LOG(ERR, "Failed to allocate %u rxq vectors",
hw->max_queue_pairs);
return -ENOMEM;
}
if (rte_intr_vec_list_alloc(dev->intr_handle, "intr_vec",
hw->max_queue_pairs)) {
PMD_INIT_LOG(ERR, "Failed to allocate %u rxq vectors",
hw->max_queue_pairs);
return -ENOMEM;
}
if (dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC) {

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