bus/fslmc: clean the QBMAN support code
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This commit is contained in:
Hemant Agrawal
Ferruh Yigit
parent
4ab87e3881
commit
d95bdc093b
@ -30,32 +30,17 @@
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#ifndef HEADER_COMPAT_H
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#define HEADER_COMPAT_H
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#include <sched.h>
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#ifndef _GNU_SOURCE
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#define _GNU_SOURCE
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#endif
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#include <stdint.h>
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#include <stdlib.h>
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#include <stddef.h>
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#include <errno.h>
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#include <string.h>
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#include <pthread.h>
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#include <net/ethernet.h>
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#include <stdio.h>
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#include <stdbool.h>
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#include <ctype.h>
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#include <malloc.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <sys/mman.h>
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#include <limits.h>
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#include <assert.h>
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#include <dirent.h>
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#include <inttypes.h>
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#include <error.h>
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#include <linux/types.h>
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#include <rte_atomic.h>
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/* The following definitions are primarily to allow the single-source driver
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@ -67,35 +52,9 @@
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/* Required compiler attributes */
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#define likely(x) __builtin_expect(!!(x), 1)
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#define unlikely(x) __builtin_expect(!!(x), 0)
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#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
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#ifdef ARRAY_SIZE
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#undef ARRAY_SIZE
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#endif
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
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/* Required types */
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typedef uint8_t u8;
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typedef uint16_t u16;
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typedef uint32_t u32;
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typedef uint64_t u64;
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typedef uint64_t dma_addr_t;
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typedef cpu_set_t cpumask_t;
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typedef unsigned int gfp_t;
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typedef uint32_t phandle;
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/* I/O operations */
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static inline u32 in_be32(volatile void *__p)
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{
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volatile u32 *p = __p;
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return *p;
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}
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static inline void out_be32(volatile void *__p, u32 val)
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{
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volatile u32 *p = __p;
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*p = val;
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}
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/* Debugging */
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#define prflush(fmt, args...) \
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@ -109,66 +68,45 @@ static inline void out_be32(volatile void *__p, u32 val)
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#define pr_info(fmt, args...) prflush(fmt, ##args)
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#ifdef RTE_LIBRTE_DPAA2_DEBUG_BUS
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/* Trace the 3 different classes of read/write access to QBMan. #undef as
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* required.
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*/
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#define QBMAN_CCSR_TRACE
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#define QBMAN_CINH_TRACE
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#define QBMAN_CENA_TRACE
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#define QBMAN_CHECKING
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#ifdef pr_debug
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#undef pr_debug
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#endif
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#define pr_debug(fmt, args...) {}
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#define WARN_ON(c, str) \
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#define pr_debug(fmt, args...) printf(fmt, ##args)
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#define QBMAN_BUG_ON(c) \
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do { \
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static int warned_##__LINE__; \
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if ((c) && !warned_##__LINE__) { \
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pr_warn("%s\n", str); \
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pr_warn("(%s:%d)\n", __FILE__, __LINE__); \
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warned_##__LINE__ = 1; \
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} \
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} while (0)
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#ifdef CONFIG_BUGON
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#define QBMAN_BUG_ON(c) WARN_ON(c, "BUG")
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#else
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#define QBMAN_BUG_ON(c) {}
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#define pr_debug(fmt, args...) {}
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#endif
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#define ALIGN(x, a) (((x) + ((typeof(x))(a) - 1)) & ~((typeof(x))(a) - 1))
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/* Other miscellaneous interfaces our APIs depend on; */
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#define lower_32_bits(x) ((u32)(x))
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#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16))
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/* Compiler/type stuff */
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#define lower_32_bits(x) ((uint32_t)(x))
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#define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
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#define __iomem
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#define GFP_KERNEL 0
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#define __raw_readb(p) (*(const volatile unsigned char *)(p))
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#define __raw_readl(p) (*(const volatile unsigned int *)(p))
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#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
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/* Allocator stuff */
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#define kmalloc(sz, t) malloc(sz)
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#define kfree(p) { if (p) free(p); }
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static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused)
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{
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void *ptr = malloc(sz);
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if (ptr)
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memset(ptr, 0, sz);
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return ptr;
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}
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static inline unsigned long get_zeroed_page(gfp_t __foo __rte_unused)
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{
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void *p;
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if (posix_memalign(&p, 4096, 4096))
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return 0;
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memset(p, 0, 4096);
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return (unsigned long)p;
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}
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static inline void free_page(unsigned long p)
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{
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free((void *)p);
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}
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#define atomic_t rte_atomic32_t
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#define atomic_read(v) rte_atomic32_read(v)
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#define atomic_set(v, i) rte_atomic32_set(v, i)
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@ -329,7 +329,7 @@ void qbman_pull_desc_clear(struct qbman_pull_desc *d);
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*/
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void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
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struct qbman_result *storage,
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dma_addr_t storage_phys,
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uint64_t storage_phys,
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int stash);
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/**
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* qbman_pull_desc_set_numframes() - Set the number of frames to be dequeued.
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@ -796,7 +796,6 @@ struct qbman_eq_desc {
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uint8_t wae;
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uint8_t rspid;
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uint64_t rsp_addr;
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uint8_t fd[32];
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} eq;
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};
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};
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@ -881,7 +880,7 @@ void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,
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* expresses a cache-warming attribute.
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*/
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void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
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dma_addr_t storage_phys,
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uint64_t storage_phys,
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int stash);
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/**
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@ -126,7 +126,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
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{
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int ret;
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uint32_t eqcr_pi;
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struct qbman_swp *p = kmalloc(sizeof(*p), GFP_KERNEL);
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struct qbman_swp *p = malloc(sizeof(*p));
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if (!p)
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return NULL;
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@ -155,7 +155,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
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ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
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if (ret) {
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kfree(p);
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free(p);
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pr_err("qbman_swp_sys_init() failed %d\n", ret);
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return NULL;
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}
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@ -183,7 +183,7 @@ void qbman_swp_finish(struct qbman_swp *p)
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#endif
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qbman_swp_sys_finish(&p->sys);
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portal_idx_map[p->desc.idx] = NULL;
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kfree(p);
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free(p);
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}
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const struct qbman_swp_desc *qbman_swp_get_desc(struct qbman_swp *p)
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@ -1097,15 +1097,7 @@ int qbman_result_bpscn_is_surplus(const struct qbman_result *scn)
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uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
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{
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uint64_t ctx;
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uint32_t ctx_hi, ctx_lo;
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ctx = qbman_result_SCN_ctx(scn);
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ctx_hi = upper32(ctx);
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ctx_lo = lower32(ctx);
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return ((uint64_t)make_le32(ctx_hi) << 32 |
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(uint64_t)make_le32(ctx_lo));
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return qbman_result_SCN_ctx(scn);
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}
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/*****************/
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@ -1118,15 +1110,7 @@ uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn)
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uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
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{
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uint64_t ctx;
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uint32_t ctx_hi, ctx_lo;
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ctx = qbman_result_SCN_ctx(scn);
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ctx_hi = upper32(ctx);
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ctx_lo = lower32(ctx);
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return ((uint64_t)(make_le32(ctx_hi) & 0xFF) << 32) |
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(uint64_t)make_le32(ctx_lo);
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return qbman_result_SCN_ctx(scn);
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}
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/******************/
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@ -26,10 +26,14 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "qbman_private.h"
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#include "qbman_sys.h"
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#include <fsl_qbman_portal.h>
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uint32_t qman_version;
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#define QMAN_REV_4000 0x04000000
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#define QMAN_REV_4100 0x04010000
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#define QMAN_REV_4101 0x04010001
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/* All QBMan command and result structures use this "valid bit" encoding */
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#define QB_VALID_BIT ((uint32_t)0x80)
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@ -40,7 +44,8 @@ uint32_t qman_version;
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#define QBMAN_EQCR_SIZE 8
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static inline u8 qm_cyc_diff(u8 ringsize, u8 first, u8 last)
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static inline uint8_t qm_cyc_diff(uint8_t ringsize, uint8_t first,
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uint8_t last)
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{
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/* 'first' is included, 'last' is excluded */
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if (first <= last)
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@ -130,133 +135,17 @@ void *qbman_swp_mc_result(struct qbman_swp *p);
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static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
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uint8_t cmd_verb)
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{
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int loopvar;
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int loopvar = 1000;
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qbman_swp_mc_submit(swp, cmd, cmd_verb);
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DBG_POLL_START(loopvar);
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do {
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DBG_POLL_CHECK(loopvar);
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cmd = qbman_swp_mc_result(swp);
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} while (!cmd);
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} while (!cmd && loopvar--);
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QBMAN_BUG_ON(!loopvar);
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return cmd;
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}
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/* ------------ */
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/* qb_attr_code */
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/* ------------ */
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/* This struct locates a sub-field within a QBMan portal (CENA) cacheline which
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* is either serving as a configuration command or a query result. The
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* representation is inherently little-endian, as the indexing of the words is
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* itself little-endian in nature and DPAA2 QBMan is little endian for anything
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* that crosses a word boundary too (64-bit fields are the obvious examples).
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*/
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struct qb_attr_code {
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unsigned int word; /* which uint32_t[] array member encodes the field */
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unsigned int lsoffset; /* encoding offset from ls-bit */
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unsigned int width; /* encoding width. (bool must be 1.) */
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};
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/* Some pre-defined codes */
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extern struct qb_attr_code code_generic_verb;
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extern struct qb_attr_code code_generic_rslt;
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/* Macros to define codes */
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#define QB_CODE(a, b, c) { a, b, c}
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#define QB_CODE_NULL \
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QB_CODE((unsigned int)-1, (unsigned int)-1, (unsigned int)-1)
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/* Rotate a code "ms", meaning that it moves from less-significant bytes to
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* more-significant, from less-significant words to more-significant, etc. The
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* "ls" version does the inverse, from more-significant towards
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* less-significant.
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*/
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static inline void qb_attr_code_rotate_ms(struct qb_attr_code *code,
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unsigned int bits)
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{
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code->lsoffset += bits;
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while (code->lsoffset > 31) {
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code->word++;
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code->lsoffset -= 32;
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}
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}
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static inline void qb_attr_code_rotate_ls(struct qb_attr_code *code,
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unsigned int bits)
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{
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/* Don't be fooled, this trick should work because the types are
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* unsigned. So the case that interests the while loop (the rotate has
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* gone too far and the word count needs to compensate for it), is
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* manifested when lsoffset is negative. But that equates to a really
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* large unsigned value, starting with lots of "F"s. As such, we can
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* continue adding 32 back to it until it wraps back round above zero,
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* to a value of 31 or less...
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*/
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code->lsoffset -= bits;
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while (code->lsoffset > 31) {
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code->word--;
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code->lsoffset += 32;
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}
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}
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/* Implement a loop of code rotations until 'expr' evaluates to FALSE (0). */
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#define qb_attr_code_for_ms(code, bits, expr) \
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for (; expr; qb_attr_code_rotate_ms(code, bits))
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#define qb_attr_code_for_ls(code, bits, expr) \
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for (; expr; qb_attr_code_rotate_ls(code, bits))
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/* decode a field from a cacheline */
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static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code,
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const uint32_t *cacheline)
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{
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return d32_uint32_t(code->lsoffset, code->width, cacheline[code->word]);
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}
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static inline uint64_t qb_attr_code_decode_64(const struct qb_attr_code *code,
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const uint64_t *cacheline)
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{
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return cacheline[code->word / 2];
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}
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/* encode a field to a cacheline */
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static inline void qb_attr_code_encode(const struct qb_attr_code *code,
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uint32_t *cacheline, uint32_t val)
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{
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cacheline[code->word] =
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r32_uint32_t(code->lsoffset, code->width, cacheline[code->word])
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| e32_uint32_t(code->lsoffset, code->width, val);
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}
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static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,
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uint64_t *cacheline, uint64_t val)
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{
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cacheline[code->word / 2] = val;
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}
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/* Small-width signed values (two's-complement) will decode into medium-width
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* positives. (Eg. for an 8-bit signed field, which stores values from -128 to
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* +127, a setting of -7 would appear to decode to the 32-bit unsigned value
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* 249. Likewise -120 would decode as 136.) This function allows the caller to
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* "re-sign" such fields to 32-bit signed. (Eg. -7, which was 249 with an 8-bit
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* encoding, will become 0xfffffff9 if you cast the return value to uint32_t).
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*/
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static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code,
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uint32_t val)
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{
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QBMAN_BUG_ON(val >= (1u << code->width));
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/* code->width should never exceed the width of val. If it does then a
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* different function with larger val size must be used to translate
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* from unsigned to signed
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*/
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QBMAN_BUG_ON(code->width > sizeof(val) * CHAR_BIT);
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/* If the high bit was set, it was encoding a negative */
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if (val >= 1u << (code->width - 1))
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return (int32_t)0 - (int32_t)(((uint32_t)1 << code->width) -
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val);
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/* Otherwise, it was encoding a positive */
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return (int32_t)val;
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}
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/* ---------------------- */
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/* Descriptors/cachelines */
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/* ---------------------- */
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@ -1,178 +0,0 @@
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/*-
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* BSD LICENSE
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*
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* Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
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* * Redistributions in binary form must reproduce the above copyright
|
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
|
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* * Neither the name of Freescale Semiconductor nor the
|
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* names of its contributors may be used to endorse or promote products
|
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Perform extra checking */
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/*#define QBMAN_CHECKING*/
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/* To maximise the amount of logic that is common between the Linux driver and
|
||||
* other targets (such as the embedded MC firmware), we pivot here between the
|
||||
* inclusion of two platform-specific headers.
|
||||
*
|
||||
* The first, qbman_sys_decl.h, includes any and all required system headers as
|
||||
* well as providing any definitions for the purposes of compatibility. The
|
||||
* second, qbman_sys.h, is where platform-specific routines go.
|
||||
*
|
||||
* The point of the split is that the platform-independent code (including this
|
||||
* header) may depend on platform-specific declarations, yet other
|
||||
* platform-specific routines may depend on platform-independent definitions.
|
||||
*/
|
||||
|
||||
#include "qbman_sys_decl.h"
|
||||
|
||||
/* When things go wrong, it is a convenient trick to insert a few FOO()
|
||||
* statements in the code to trace progress. TODO: remove this once we are
|
||||
* hacking the code less actively.
|
||||
*/
|
||||
#define FOO() fsl_os_print("FOO: %s:%d\n", __FILE__, __LINE__)
|
||||
|
||||
/* Any time there is a register interface which we poll on, this provides a
|
||||
* "break after x iterations" scheme for it. It's handy for debugging, eg.
|
||||
* where you don't want millions of lines of log output from a polling loop
|
||||
* that won't, because such things tend to drown out the earlier log output
|
||||
* that might explain what caused the problem. (NB: put ";" after each macro!)
|
||||
* TODO: we should probably remove this once we're done sanitising the
|
||||
* simulator...
|
||||
*/
|
||||
#define DBG_POLL_START(loopvar) (loopvar = 10)
|
||||
#define DBG_POLL_CHECK(loopvar) \
|
||||
do { \
|
||||
if (!(loopvar--)) \
|
||||
QBMAN_BUG_ON(NULL == "DBG_POLL_CHECK"); \
|
||||
} while (0)
|
||||
|
||||
/* For CCSR or portal-CINH registers that contain fields at arbitrary offsets
|
||||
* and widths, these macro-generated encode/decode/isolate/remove inlines can
|
||||
* be used.
|
||||
*
|
||||
* Eg. to "d"ecode a 14-bit field out of a register (into a "uint16_t" type),
|
||||
* where the field is located 3 bits "up" from the least-significant bit of the
|
||||
* register (ie. the field location within the 32-bit register corresponds to a
|
||||
* mask of 0x0001fff8), you would do;
|
||||
* uint16_t field = d32_uint16_t(3, 14, reg_value);
|
||||
*
|
||||
* Or to "e"ncode a 1-bit boolean value (input type is "int", zero is FALSE,
|
||||
* non-zero is TRUE, so must convert all non-zero inputs to 1, hence the "!!"
|
||||
* operator) into a register at bit location 0x00080000 (19 bits "in" from the
|
||||
* LS bit), do;
|
||||
* reg_value |= e32_int(19, 1, !!field);
|
||||
*
|
||||
* If you wish to read-modify-write a register, such that you leave the 14-bit
|
||||
* field as-is but have all other fields set to zero, then "i"solate the 14-bit
|
||||
* value using;
|
||||
* reg_value = i32_uint16_t(3, 14, reg_value);
|
||||
*
|
||||
* Alternatively, you could "r"emove the 1-bit boolean field (setting it to
|
||||
* zero) but leaving all other fields as-is;
|
||||
* reg_val = r32_int(19, 1, reg_value);
|
||||
*
|
||||
*/
|
||||
#ifdef __LP64__
|
||||
#define MAKE_MASK32(width) ((uint32_t)((1ULL << width) - 1))
|
||||
#else
|
||||
#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
|
||||
(uint32_t)((1 << width) - 1))
|
||||
#endif
|
||||
#define DECLARE_CODEC32(t) \
|
||||
static inline uint32_t e32_##t(uint32_t lsoffset, uint32_t width, t val) \
|
||||
{ \
|
||||
QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
|
||||
return ((uint32_t)val & MAKE_MASK32(width)) << lsoffset; \
|
||||
} \
|
||||
static inline t d32_##t(uint32_t lsoffset, uint32_t width, uint32_t val) \
|
||||
{ \
|
||||
QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
|
||||
return (t)((val >> lsoffset) & MAKE_MASK32(width)); \
|
||||
} \
|
||||
static inline uint32_t i32_##t(uint32_t lsoffset, uint32_t width, \
|
||||
uint32_t val) \
|
||||
{ \
|
||||
QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
|
||||
return e32_##t(lsoffset, width, d32_##t(lsoffset, width, val)); \
|
||||
} \
|
||||
static inline uint32_t r32_##t(uint32_t lsoffset, uint32_t width, \
|
||||
uint32_t val) \
|
||||
{ \
|
||||
QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
|
||||
return ~(MAKE_MASK32(width) << lsoffset) & val; \
|
||||
}
|
||||
DECLARE_CODEC32(uint32_t)
|
||||
DECLARE_CODEC32(uint16_t)
|
||||
DECLARE_CODEC32(uint8_t)
|
||||
DECLARE_CODEC32(int)
|
||||
|
||||
/*********************/
|
||||
/* Debugging assists */
|
||||
/*********************/
|
||||
|
||||
static inline void __hexdump(unsigned long start, unsigned long end,
|
||||
unsigned long p, size_t sz, const unsigned char *c)
|
||||
{
|
||||
while (start < end) {
|
||||
unsigned int pos = 0;
|
||||
char buf[64];
|
||||
int nl = 0;
|
||||
|
||||
pos += sprintf(buf + pos, "%08lx: ", start);
|
||||
do {
|
||||
if ((start < p) || (start >= (p + sz)))
|
||||
pos += sprintf(buf + pos, "..");
|
||||
else
|
||||
pos += sprintf(buf + pos, "%02x", *(c++));
|
||||
if (!(++start & 15)) {
|
||||
buf[pos++] = '\n';
|
||||
nl = 1;
|
||||
} else {
|
||||
nl = 0;
|
||||
if (!(start & 1))
|
||||
buf[pos++] = ' ';
|
||||
if (!(start & 3))
|
||||
buf[pos++] = ' ';
|
||||
}
|
||||
} while (start & 15);
|
||||
if (!nl)
|
||||
buf[pos++] = '\n';
|
||||
buf[pos] = '\0';
|
||||
pr_info("%s", buf);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void hexdump(const void *ptr, size_t sz)
|
||||
{
|
||||
unsigned long p = (unsigned long)ptr;
|
||||
unsigned long start = p & ~(unsigned long)15;
|
||||
unsigned long end = (p + sz + 15) & ~(unsigned long)15;
|
||||
const unsigned char *c = ptr;
|
||||
|
||||
__hexdump(start, end, p, sz, c);
|
||||
}
|
||||
|
||||
#define QMAN_REV_4000 0x04000000
|
||||
#define QMAN_REV_4100 0x04010000
|
||||
#define QMAN_REV_4101 0x04010001
|
||||
|
||||
#include "qbman_sys.h"
|
||||
@ -40,12 +40,50 @@
|
||||
* *not* to provide linux compatibility.
|
||||
*/
|
||||
|
||||
/* Trace the 3 different classes of read/write access to QBMan. #undef as
|
||||
* required.
|
||||
*/
|
||||
#undef QBMAN_CCSR_TRACE
|
||||
#undef QBMAN_CINH_TRACE
|
||||
#undef QBMAN_CENA_TRACE
|
||||
#include "qbman_sys_decl.h"
|
||||
|
||||
/* Debugging assists */
|
||||
static inline void __hexdump(unsigned long start, unsigned long end,
|
||||
unsigned long p, size_t sz, const unsigned char *c)
|
||||
{
|
||||
while (start < end) {
|
||||
unsigned int pos = 0;
|
||||
char buf[64];
|
||||
int nl = 0;
|
||||
|
||||
pos += sprintf(buf + pos, "%08lx: ", start);
|
||||
do {
|
||||
if ((start < p) || (start >= (p + sz)))
|
||||
pos += sprintf(buf + pos, "..");
|
||||
else
|
||||
pos += sprintf(buf + pos, "%02x", *(c++));
|
||||
if (!(++start & 15)) {
|
||||
buf[pos++] = '\n';
|
||||
nl = 1;
|
||||
} else {
|
||||
nl = 0;
|
||||
if (!(start & 1))
|
||||
buf[pos++] = ' ';
|
||||
if (!(start & 3))
|
||||
buf[pos++] = ' ';
|
||||
}
|
||||
} while (start & 15);
|
||||
if (!nl)
|
||||
buf[pos++] = '\n';
|
||||
buf[pos] = '\0';
|
||||
pr_info("%s", buf);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void hexdump(const void *ptr, size_t sz)
|
||||
{
|
||||
unsigned long p = (unsigned long)ptr;
|
||||
unsigned long start = p & ~15;
|
||||
unsigned long end = (p + sz + 15) & ~15;
|
||||
const unsigned char *c = ptr;
|
||||
|
||||
__hexdump(start, end, p, sz, c);
|
||||
}
|
||||
|
||||
/* Currently, the CENA support code expects each 32-bit word to be written in
|
||||
* host order, and these are converted to hardware (little-endian) order on
|
||||
@ -94,34 +132,6 @@ static inline void u64_from_le32_copy(uint64_t *d, const void *s,
|
||||
}
|
||||
}
|
||||
|
||||
/* Convert a host-native 32bit value into little endian */
|
||||
#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
|
||||
static inline uint32_t make_le32(uint32_t val)
|
||||
{
|
||||
return ((val & 0xff) << 24) | ((val & 0xff00) << 8) |
|
||||
((val & 0xff0000) >> 8) | ((val & 0xff000000) >> 24);
|
||||
}
|
||||
|
||||
static inline uint32_t make_le24(uint32_t val)
|
||||
{
|
||||
return (((val & 0xff) << 16) | (val & 0xff00) |
|
||||
((val & 0xff0000) >> 16));
|
||||
}
|
||||
|
||||
static inline void make_le32_n(uint32_t *val, unsigned int num)
|
||||
{
|
||||
while (num--) {
|
||||
*val = make_le32(*val);
|
||||
val++;
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
#define make_le32(val) (val)
|
||||
#define make_le24(val) (val)
|
||||
#define make_le32_n(val, len) do {} while (0)
|
||||
#endif
|
||||
|
||||
/******************/
|
||||
/* Portal access */
|
||||
/******************/
|
||||
@ -249,7 +259,7 @@ static inline void *qbman_cena_read_wo_shadow(struct qbman_swp_sys *s,
|
||||
uint32_t offset)
|
||||
{
|
||||
#ifdef QBMAN_CENA_TRACE
|
||||
pr_info("qbman_cena_read(%p:%d:0x%03x) %p\n",
|
||||
pr_info("qbman_cena_read(%p:%d:0x%03x)\n",
|
||||
s->addr_cena, s->idx, offset);
|
||||
#endif
|
||||
return s->addr_cena + offset;
|
||||
@ -283,20 +293,20 @@ static inline void qbman_cena_prefetch(struct qbman_swp_sys *s,
|
||||
* qbman_portal.c. So use of it is declared locally here.
|
||||
*/
|
||||
#define QBMAN_CINH_SWP_CFG 0xd00
|
||||
#define QBMAN_CINH_SWP_CFG 0xd00
|
||||
#define SWP_CFG_DQRR_MF_SHIFT 20
|
||||
#define SWP_CFG_EST_SHIFT 16
|
||||
#define SWP_CFG_WN_SHIFT 14
|
||||
#define SWP_CFG_RPM_SHIFT 12
|
||||
#define SWP_CFG_DCM_SHIFT 10
|
||||
#define SWP_CFG_EPM_SHIFT 8
|
||||
#define SWP_CFG_SD_SHIFT 5
|
||||
#define SWP_CFG_SP_SHIFT 4
|
||||
#define SWP_CFG_SE_SHIFT 3
|
||||
#define SWP_CFG_DP_SHIFT 2
|
||||
#define SWP_CFG_DE_SHIFT 1
|
||||
#define SWP_CFG_EP_SHIFT 0
|
||||
|
||||
/* For MC portal use, we always configure with
|
||||
* DQRR_MF is (SWP_CFG,20,3) - DQRR max fill (<- 0x4)
|
||||
* EST is (SWP_CFG,16,3) - EQCR_CI stashing threshold (<- 0x2)
|
||||
* RPM is (SWP_CFG,12,2) - RCR production notification mode (<- 0x3)
|
||||
* DCM is (SWP_CFG,10,2) - DQRR consumption notification mode (<- 0x2)
|
||||
* EPM is (SWP_CFG,8,2) - EQCR production notification mode (<- 0x2)
|
||||
* SD is (SWP_CFG,5,1) - memory stashing drop enable (<- TRUE)
|
||||
* SP is (SWP_CFG,4,1) - memory stashing priority (<- TRUE)
|
||||
* SE is (SWP_CFG,3,1) - memory stashing enable (<- TRUE)
|
||||
* DP is (SWP_CFG,2,1) - dequeue stashing priority (<- TRUE)
|
||||
* DE is (SWP_CFG,1,1) - dequeue stashing enable (<- TRUE)
|
||||
* EP is (SWP_CFG,0,1) - EQCR_CI stashing priority (<- TRUE)
|
||||
*/
|
||||
static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn,
|
||||
uint8_t est, uint8_t rpm, uint8_t dcm,
|
||||
uint8_t epm, int sd, int sp, int se,
|
||||
@ -304,12 +314,19 @@ static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn,
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
reg = e32_uint8_t(20, (uint32_t)(3 + (max_fill >> 3)), max_fill) |
|
||||
e32_uint8_t(16, 3, est) |
|
||||
e32_uint8_t(12, 2, rpm) | e32_uint8_t(10, 2, dcm) |
|
||||
e32_uint8_t(8, 2, epm) | e32_int(5, 1, sd) |
|
||||
e32_int(4, 1, sp) | e32_int(3, 1, se) | e32_int(2, 1, dp) |
|
||||
e32_int(1, 1, de) | e32_int(0, 1, ep) | e32_uint8_t(14, 1, wn);
|
||||
reg = (max_fill << SWP_CFG_DQRR_MF_SHIFT |
|
||||
est << SWP_CFG_EST_SHIFT |
|
||||
wn << SWP_CFG_WN_SHIFT |
|
||||
rpm << SWP_CFG_RPM_SHIFT |
|
||||
dcm << SWP_CFG_DCM_SHIFT |
|
||||
epm << SWP_CFG_EPM_SHIFT |
|
||||
sd << SWP_CFG_SD_SHIFT |
|
||||
sp << SWP_CFG_SP_SHIFT |
|
||||
se << SWP_CFG_SE_SHIFT |
|
||||
dp << SWP_CFG_DP_SHIFT |
|
||||
de << SWP_CFG_DE_SHIFT |
|
||||
ep << SWP_CFG_EP_SHIFT);
|
||||
|
||||
return reg;
|
||||
}
|
||||
|
||||
@ -322,7 +339,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
|
||||
s->addr_cena = d->cena_bar;
|
||||
s->addr_cinh = d->cinh_bar;
|
||||
s->idx = (uint32_t)d->idx;
|
||||
s->cena = (void *)get_zeroed_page(GFP_KERNEL);
|
||||
s->cena = malloc(4096);
|
||||
if (!s->cena) {
|
||||
pr_err("Could not allocate page for cena shadow\n");
|
||||
return -1;
|
||||
@ -347,7 +364,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
|
||||
reg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG);
|
||||
if (!reg) {
|
||||
pr_err("The portal %d is not enabled!\n", s->idx);
|
||||
kfree(s->cena);
|
||||
free(s->cena);
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
@ -355,5 +372,5 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
|
||||
|
||||
static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s)
|
||||
{
|
||||
free_page((unsigned long)s->cena);
|
||||
free(s->cena);
|
||||
}
|
||||
|
||||
@ -34,27 +34,6 @@
|
||||
#error "Unknown endianness!"
|
||||
#endif
|
||||
|
||||
/* The platform-independent code shouldn't need endianness, except for
|
||||
* weird/fast-path cases like qbman_result_has_token(), which needs to
|
||||
* perform a passive and endianness-specific test on a read-only data structure
|
||||
* very quickly. It's an exception, and this symbol is used for that case.
|
||||
*/
|
||||
#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
|
||||
#define DQRR_TOK_OFFSET 0
|
||||
#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 24
|
||||
#define SCN_STATE_OFFSET_IN_MEM 8
|
||||
#define SCN_RID_OFFSET_IN_MEM 8
|
||||
#else
|
||||
#define DQRR_TOK_OFFSET 24
|
||||
#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 0
|
||||
#define SCN_STATE_OFFSET_IN_MEM 16
|
||||
#define SCN_RID_OFFSET_IN_MEM 0
|
||||
#endif
|
||||
|
||||
/* Similarly-named functions */
|
||||
#define upper32(a) upper_32_bits(a)
|
||||
#define lower32(a) lower_32_bits(a)
|
||||
|
||||
/****************/
|
||||
/* arch assists */
|
||||
/****************/
|
||||
@ -64,10 +43,10 @@
|
||||
#define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); }
|
||||
static inline void prefetch_for_load(void *p)
|
||||
{
|
||||
asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p));
|
||||
asm volatile("prfm pldl1keep, [%0, #0]" : : "r" (p));
|
||||
}
|
||||
|
||||
static inline void prefetch_for_store(void *p)
|
||||
{
|
||||
asm volatile("prfm pstl1keep, [%0, #64]" : : "r" (p));
|
||||
asm volatile("prfm pstl1keep, [%0, #0]" : : "r" (p));
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user