diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 8181e1f37a..4e4791c2db 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -903,6 +903,7 @@ static int bnxt_shutdown_nic(struct bnxt *bp) uint32_t bnxt_get_speed_capabilities(struct bnxt *bp) { + uint32_t pam4_link_speed = 0; uint32_t link_speed = 0; uint32_t speed_capa = 0; @@ -912,8 +913,8 @@ uint32_t bnxt_get_speed_capabilities(struct bnxt *bp) link_speed = bp->link_info->support_speeds; /* If PAM4 is configured, use PAM4 supported speed */ - if (link_speed == 0 && bp->link_info->support_pam4_speeds > 0) - link_speed = bp->link_info->support_pam4_speeds; + if (bp->link_info->support_pam4_speeds > 0) + pam4_link_speed = bp->link_info->support_pam4_speeds; if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB) speed_capa |= RTE_ETH_LINK_SPEED_100M; @@ -935,11 +936,11 @@ uint32_t bnxt_get_speed_capabilities(struct bnxt *bp) speed_capa |= RTE_ETH_LINK_SPEED_50G; if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB) speed_capa |= RTE_ETH_LINK_SPEED_100G; - if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_50G) + if (pam4_link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_50G) speed_capa |= RTE_ETH_LINK_SPEED_50G; - if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_100G) + if (pam4_link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_100G) speed_capa |= RTE_ETH_LINK_SPEED_100G; - if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_200G) + if (pam4_link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_200G) speed_capa |= RTE_ETH_LINK_SPEED_200G; if (bp->link_info->auto_mode == diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 9eb8b8d56d..206ac20c0c 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -2970,7 +2970,7 @@ static uint16_t bnxt_check_eth_link_autoneg(uint32_t conf_link) } static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed, - uint16_t pam4_link) + struct bnxt_link_info *link_info) { uint16_t eth_link_speed = 0; @@ -3009,18 +3009,29 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed, HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB; break; case RTE_ETH_LINK_SPEED_50G: - eth_link_speed = pam4_link ? - HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_50GB : - HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB; + if (link_info->support_pam4_speeds & + HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_50G) { + eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_50GB; + link_info->link_signal_mode = BNXT_SIG_MODE_PAM4; + } else { + eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB; + link_info->link_signal_mode = BNXT_SIG_MODE_NRZ; + } break; case RTE_ETH_LINK_SPEED_100G: - eth_link_speed = pam4_link ? - HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_100GB : - HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB; + if (link_info->support_pam4_speeds & + HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_100G) { + eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_100GB; + link_info->link_signal_mode = BNXT_SIG_MODE_PAM4; + } else { + eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB; + link_info->link_signal_mode = BNXT_SIG_MODE_NRZ; + } break; case RTE_ETH_LINK_SPEED_200G: eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_200GB; + link_info->link_signal_mode = BNXT_SIG_MODE_PAM4; break; default: PMD_DRV_LOG(ERR, @@ -3242,7 +3253,7 @@ int bnxt_set_hwrm_link_config(struct bnxt *bp, bool link_up) autoneg = 0; speed = bnxt_parse_eth_link_speed(dev_conf->link_speeds, - bp->link_info->link_signal_mode); + bp->link_info); link_req.phy_flags = HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY; /* Autoneg can be done only when the FW allows. */ if (autoneg == 1 && diff --git a/drivers/net/bnxt/bnxt_hwrm.h b/drivers/net/bnxt/bnxt_hwrm.h index 77f8521406..a82d9fb3ef 100644 --- a/drivers/net/bnxt/bnxt_hwrm.h +++ b/drivers/net/bnxt/bnxt_hwrm.h @@ -141,6 +141,9 @@ struct bnxt_pf_resource_info { BNXT_TUNNELED_OFFLOADS_CAP_GRE_EN(bp) && \ BNXT_TUNNELED_OFFLOADS_CAP_IPINIP_EN(bp)) +#define BNXT_SIG_MODE_NRZ HWRM_PORT_PHY_QCFG_OUTPUT_SIGNAL_MODE_NRZ +#define BNXT_SIG_MODE_PAM4 HWRM_PORT_PHY_QCFG_OUTPUT_SIGNAL_MODE_PAM4 + int bnxt_hwrm_cfa_l2_clear_rx_mask(struct bnxt *bp, struct bnxt_vnic_info *vnic); int bnxt_hwrm_cfa_l2_set_rx_mask(struct bnxt *bp, struct bnxt_vnic_info *vnic,