mbuf: make rearm data address naturally aligned
To avoid multiple stores on fast path, Ethernet drivers aggregate the writes to data_off, refcnt, nb_segs and port to an uint64_t data and write the data in one shot with uint64_t* at &mbuf->rearm_data address. Some of the non-IA platforms have store operation overhead if the store address is not naturally aligned.This patch fixes the performance issue on those targets. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
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@ -324,9 +324,6 @@ fm10k_rxq_rearm(struct fm10k_rx_queue *rxq)
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/* Flush mbuf with pkt template.
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* Data to be rearmed is 6 bytes long.
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* Though, RX will overwrite ol_flags that are coming next
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* anyway. So overwrite whole 8 bytes with one load:
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* 6 bytes of rearm_data plus first 2 bytes of ol_flags.
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*/
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p0 = (uintptr_t)&mb0->rearm_data;
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*(uint64_t *)p0 = rxq->mbuf_initializer;
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@ -87,11 +87,8 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)
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mb0 = rxep[0].mbuf;
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mb1 = rxep[1].mbuf;
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/* Flush mbuf with pkt template.
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/* Flush mbuf with pkt template.
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* Data to be rearmed is 6 bytes long.
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* Though, RX will overwrite ol_flags that are coming next
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* anyway. So overwrite whole 8 bytes with one load:
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* 6 bytes of rearm_data plus first 2 bytes of ol_flags.
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*/
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p0 = (uintptr_t)&mb0->rearm_data;
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*(uint64_t *)p0 = rxq->mbuf_initializer;
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@ -85,9 +85,6 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq)
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/*
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* Flush mbuf with pkt template.
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* Data to be rearmed is 6 bytes long.
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* Though, RX will overwrite ol_flags that are coming next
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* anyway. So overwrite whole 8 bytes with one load:
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* 6 bytes of rearm_data plus first 2 bytes of ol_flags.
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*/
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vst1_u8((uint8_t *)&mb0->rearm_data, p);
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paddr = mb0->buf_physaddr + RTE_PKTMBUF_HEADROOM;
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@ -90,9 +90,6 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq)
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/*
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* Flush mbuf with pkt template.
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* Data to be rearmed is 6 bytes long.
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* Though, RX will overwrite ol_flags that are coming next
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* anyway. So overwrite whole 8 bytes with one load:
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* 6 bytes of rearm_data plus first 2 bytes of ol_flags.
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*/
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p0 = (uintptr_t)&mb0->rearm_data;
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*(uint64_t *)p0 = rxq->mbuf_initializer;
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@ -116,11 +116,10 @@ struct rte_kni_fifo {
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struct rte_kni_mbuf {
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void *buf_addr __attribute__((__aligned__(RTE_CACHE_LINE_SIZE)));
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uint64_t buf_physaddr;
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char pad0[2];
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uint16_t data_off; /**< Start address of data in segment buffer. */
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char pad1[2];
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uint8_t nb_segs; /**< Number of segments. */
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char pad4[1];
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char pad4[3];
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uint64_t ol_flags; /**< Offload features. */
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char pad2[4];
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uint32_t pkt_len; /**< Total pkt len: sum of all segment data_len. */
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@ -400,10 +400,8 @@ struct rte_mbuf {
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void *buf_addr; /**< Virtual address of segment buffer. */
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phys_addr_t buf_physaddr; /**< Physical address of segment buffer. */
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uint16_t buf_len; /**< Length of segment buffer. */
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/* next 6 bytes are initialised on RX descriptor rearm */
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MARKER8 rearm_data;
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MARKER64 rearm_data;
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uint16_t data_off;
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/**
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@ -421,6 +419,7 @@ struct rte_mbuf {
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};
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uint8_t nb_segs; /**< Number of segments. */
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uint8_t port; /**< Input port. */
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uint16_t pad; /**< 2B pad for naturally aligned ol_flags */
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uint64_t ol_flags; /**< Offload features. */
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@ -481,6 +480,7 @@ struct rte_mbuf {
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/** Outer VLAN TCI (CPU order), valid if PKT_RX_QINQ_STRIPPED is set. */
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uint16_t vlan_tci_outer;
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uint16_t buf_len; /**< Length of segment buffer. */
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/* second cache line - fields only used in slow path or on TX */
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MARKER cacheline1 __rte_cache_min_aligned;
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