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config: add Marvell ARMADA based on armv8-a

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This patch introduces armada target to address difference
in number of cores, no numa support

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Alan Winkowski <walan@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Gavin Hu <gavin.hu@arm.com>
This commit is contained in:
Liron Himi 2019-05-19 00:10:54 +03:00 committed by Thomas Monjalon
parent e404de1305
commit dd1cd845c1
4 changed files with 49 additions and 1 deletions
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16
config/arm/arm64_armada_linux_gcc Normal file
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@ -0,0 +1,16 @@
[binaries]
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-ar'
as = 'aarch64-linux-gnu-as'
strip = 'aarch64-linux-gnu-strip'
pcap-config = ''
[host_machine]
system = 'linux'
cpu_family = 'aarch64'
cpu = 'armv8-a'
endian = 'little'
[properties]
implementor_id = '0x56'

8
config/arm/meson.build
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@ -56,6 +56,12 @@ flags_dpaa2 = [
['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_NUMA_NODES', 1],
['RTE_MAX_LCORE', 16], ['RTE_MAX_LCORE', 16],
['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]]
flags_armada = [
['RTE_MACHINE', '"armv8a"'],
['RTE_CACHE_LINE_SIZE', 64],
['RTE_MAX_NUMA_NODES', 1],
['RTE_MAX_LCORE', 16]]
flags_default_extra = [] flags_default_extra = []
flags_thunderx_extra = [ flags_thunderx_extra = [
['RTE_MACHINE', '"thunderx"'], ['RTE_MACHINE', '"thunderx"'],
@ -104,7 +110,7 @@ impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic]
impl_0x50 = ['AppliedMicro', flags_generic, machine_args_generic] impl_0x50 = ['AppliedMicro', flags_generic, machine_args_generic]
impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic] impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic]
impl_0x53 = ['Samsung', flags_generic, machine_args_generic] impl_0x53 = ['Samsung', flags_generic, machine_args_generic]
impl_0x56 = ['Marvell', flags_generic, machine_args_generic] impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_generic]
impl_0x69 = ['Intel', flags_generic, machine_args_generic] impl_0x69 = ['Intel', flags_generic, machine_args_generic]
impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic] impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic]
impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, machine_args_generic] impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, machine_args_generic]

1
config/defconfig_arm64-armada-linux-gcc Symbolic link
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@ -0,0 +1 @@
defconfig_arm64-armada-linuxapp-gcc

25
config/defconfig_arm64-armada-linuxapp-gcc Normal file
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@ -0,0 +1,25 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2018 Marvell International Ltd
#
#include "defconfig_arm64-armv8a-linux-gcc"
#
# Compile Environment Abstraction Layer
#
CONFIG_RTE_MAX_LCORE=16
CONFIG_RTE_MAX_NUMA_NODES=1
CONFIG_RTE_CACHE_LINE_SIZE=64
# Enable PMDs
CONFIG_RTE_LIBRTE_MVEP_COMMON=y
CONFIG_RTE_LIBRTE_MVPP2_PMD=y
CONFIG_RTE_LIBRTE_MVNETA_PMD=y
CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=y
# Disable NXP as it is conflict with MUSDK
CONFIG_RTE_LIBRTE_DPAA_BUS=n
# Doesn't support NUMA
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
CONFIG_RTE_LIBRTE_VHOST_NUMA=n