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net/enic: use I/O device memory read/write API

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Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix portability
issues across different architectures.

CC: John Daley <johndale@cisco.com>
CC: Nelson Escobar <neescoba@cisco.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
This commit is contained in:
Santosh Shukla 2017-01-18 06:51:33 +05:30 committed by Thomas Monjalon
parent 57043b7ce2
commit dd7862ba58
2 changed files with 24 additions and 12 deletions
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27
drivers/net/enic/enic_compat.h
View File

@ -41,6 +41,7 @@
#include <rte_atomic.h>
#include <rte_malloc.h>
#include <rte_log.h>
#include <rte_io.h>
#define ENIC_PAGE_ALIGN 4096UL
#define ENIC_ALIGN ENIC_PAGE_ALIGN
@ -95,42 +96,52 @@ typedef unsigned long long dma_addr_t;
static inline uint32_t ioread32(volatile void *addr)
{
return *(volatile uint32_t *)addr;
return rte_read32(addr);
}
static inline uint16_t ioread16(volatile void *addr)
{
return *(volatile uint16_t *)addr;
return rte_read16(addr);
}
static inline uint8_t ioread8(volatile void *addr)
{
return *(volatile uint8_t *)addr;
return rte_read8(addr);
}
static inline void iowrite32(uint32_t val, volatile void *addr)
{
*(volatile uint32_t *)addr = val;
rte_write32(val, addr);
}
static inline void iowrite32_relaxed(uint32_t val, volatile void *addr)
{
rte_write32_relaxed(val, addr);
}
static inline void iowrite16(uint16_t val, volatile void *addr)
{
*(volatile uint16_t *)addr = val;
rte_write16(val, addr);
}
static inline void iowrite8(uint8_t val, volatile void *addr)
{
*(volatile uint8_t *)addr = val;
rte_write8(val, addr);
}
static inline unsigned int readl(volatile void __iomem *addr)
{
return *(volatile unsigned int *)addr;
return rte_read32(addr);
}
static inline unsigned int readl_relaxed(volatile void __iomem *addr)
{
return rte_read32_relaxed(addr);
}
static inline void writel(unsigned int val, volatile void __iomem *addr)
{
*(volatile unsigned int *)addr = val;
rte_write32(val, addr);
}
#define min_t(type, x, y) ({ \

9
drivers/net/enic/enic_rxtx.c
View File

@ -446,10 +446,11 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
rte_mb();
if (data_rq->in_use)
iowrite32(data_rq->posted_index,
&data_rq->ctrl->posted_index);
iowrite32_relaxed(data_rq->posted_index,
&data_rq->ctrl->posted_index);
rte_compiler_barrier();
iowrite32(sop_rq->posted_index, &sop_rq->ctrl->posted_index);
iowrite32_relaxed(sop_rq->posted_index,
&sop_rq->ctrl->posted_index);
}
@ -629,7 +630,7 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
}
post:
rte_wmb();
iowrite32(head_idx, &wq->ctrl->posted_index);
iowrite32_relaxed(head_idx, &wq->ctrl->posted_index);
done:
wq->ring.desc_avail = wq_desc_avail;
wq->head_idx = head_idx;