common/cnxk: support setting NPA buffer type

Add support to set/get per-aura buf type with refs and
get sum of all aura limits matching given buf type mask
and val.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>

drivers/common/cnxk/meson.build

@@ -51,6 +51,7 @@ sources = files(
         'roc_npa.c',
         'roc_npa_debug.c',
         'roc_npa_irq.c',
+        'roc_npa_type.c',
         'roc_npc.c',
         'roc_npc_mcam.c',
         'roc_npc_mcam_dump.c',

drivers/common/cnxk/roc_npa.c

@@ -499,6 +499,7 @@ npa_aura_pool_pair_free(struct npa_lf *lf, uint64_t aura_handle)
 	pool_id = aura_id;
 	rc = npa_aura_pool_fini(lf->mbox, aura_id, aura_handle);
 	rc |= npa_stack_dma_free(lf, name, pool_id);
+	memset(&lf->aura_attr[aura_id], 0, sizeof(struct npa_aura_attr));
 
 	plt_bitmap_set(lf->npa_bmp, aura_id);
 
@@ -750,6 +751,13 @@ npa_dev_init(struct npa_lf *lf, uintptr_t base, struct mbox *mbox)
 		goto qint_free;
 	}
 
+	/* Allocate per-aura attribute */
+	lf->aura_attr = plt_zmalloc(sizeof(struct npa_aura_attr) * nr_pools, 0);
+	if (lf->aura_attr == NULL) {
+		rc = NPA_ERR_PARAM;
+		goto lim_free;
+	}
+
 	/* Init aura start & end limits */
 	for (i = 0; i < nr_pools; i++) {
 		lf->aura_lim[i].ptr_start = UINT64_MAX;
@@ -758,6 +766,8 @@ npa_dev_init(struct npa_lf *lf, uintptr_t base, struct mbox *mbox)
 
 	return 0;
 
+lim_free:
+	plt_free(lf->aura_lim);
 qint_free:
 	plt_free(lf->npa_qint_mem);
 bmap_free:
@@ -780,6 +790,7 @@ npa_dev_fini(struct npa_lf *lf)
 	plt_free(lf->npa_qint_mem);
 	plt_bitmap_free(lf->npa_bmp);
 	plt_free(lf->npa_bmp_mem);
+	plt_free(lf->aura_attr);
 
 	return npa_lf_free(lf->mbox);
 }

drivers/common/cnxk/roc_npa.h

@@ -714,6 +714,25 @@ int __roc_api roc_npa_dev_fini(struct roc_npa *roc_npa);
 /* Flags to pool create */
 #define ROC_NPA_ZERO_AURA_F BIT(0)
 
+/* Enumerations */
+enum roc_npa_buf_type {
+	/* Aura used for normal pkts */
+	ROC_NPA_BUF_TYPE_PACKET = 0,
+	/* Aura used for ipsec pkts */
+	ROC_NPA_BUF_TYPE_PACKET_IPSEC,
+	/* Aura used as vwqe for normal pkts */
+	ROC_NPA_BUF_TYPE_VWQE,
+	/* Aura used as vwqe for ipsec pkts */
+	ROC_NPA_BUF_TYPE_VWQE_IPSEC,
+	/* Aura used as SQB for SQ */
+	ROC_NPA_BUF_TYPE_SQB,
+	/* Aura used for general buffer */
+	ROC_NPA_BUF_TYPE_BUF,
+	/* Aura used for timeout pool */
+	ROC_NPA_BUF_TYPE_TIMEOUT,
+	ROC_NPA_BUF_TYPE_END,
+};
+
 /* NPA pool */
 int __roc_api roc_npa_pool_create(uint64_t *aura_handle, uint32_t block_size,
 				  uint32_t block_count, struct npa_aura_s *aura,
@@ -726,6 +745,9 @@ void __roc_api roc_npa_aura_op_range_set(uint64_t aura_handle,
 					 uint64_t start_iova,
 					 uint64_t end_iova);
 uint64_t __roc_api roc_npa_zero_aura_handle(void);
+int __roc_api roc_npa_buf_type_update(uint64_t aura_handle, enum roc_npa_buf_type type, int cnt);
+uint64_t __roc_api roc_npa_buf_type_mask(uint64_t aura_handle);
+uint64_t __roc_api roc_npa_buf_type_limit_get(uint64_t type_mask);
 
 /* Init callbacks */
 typedef int (*roc_npa_lf_init_cb_t)(struct plt_pci_device *pci_dev);

drivers/common/cnxk/roc_npa_priv.h

@@ -18,6 +18,7 @@ enum npa_error_status {
 
 struct npa_lf {
 	struct plt_intr_handle *intr_handle;
+	struct npa_aura_attr *aura_attr;
 	struct npa_aura_lim *aura_lim;
 	struct plt_pci_device *pci_dev;
 	struct plt_bitmap *npa_bmp;
@@ -25,6 +26,7 @@ struct npa_lf {
 	uint32_t stack_pg_ptrs;
 	uint32_t stack_pg_bytes;
 	uint16_t npa_msixoff;
+	bool zero_aura_rsvd;
 	void *npa_qint_mem;
 	void *npa_bmp_mem;
 	uint32_t nr_pools;
@@ -32,7 +34,7 @@ struct npa_lf {
 	uint8_t aura_sz;
 	uint32_t qints;
 	uintptr_t base;
-	bool zero_aura_rsvd;
+
 };
 
 struct npa_qint {
@@ -45,6 +47,10 @@ struct npa_aura_lim {
 	uint64_t ptr_end;
 };
 
+struct npa_aura_attr {
+	int buf_type[ROC_NPA_BUF_TYPE_END];
+};
+
 struct dev;
 
 static inline struct npa *

drivers/common/cnxk/roc_npa_type.c

@@ -0,0 +1,99 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2022 Marvell.
+ */
+
+#include "roc_api.h"
+#include "roc_priv.h"
+
+int
+roc_npa_buf_type_update(uint64_t aura_handle, enum roc_npa_buf_type type, int count)
+{
+	uint64_t aura_id = roc_npa_aura_handle_to_aura(aura_handle);
+	struct npa_lf *lf;
+
+	lf = idev_npa_obj_get();
+	if (lf == NULL || aura_id >= lf->nr_pools)
+		return NPA_ERR_PARAM;
+
+	if (plt_bitmap_get(lf->npa_bmp, aura_id)) {
+		plt_err("Cannot set buf type on unused aura");
+		return NPA_ERR_PARAM;
+	}
+
+	if (type >= ROC_NPA_BUF_TYPE_END || (lf->aura_attr[aura_id].buf_type[type] + count < 0)) {
+		plt_err("Pool buf type invalid");
+		return NPA_ERR_PARAM;
+	}
+
+	lf->aura_attr[aura_id].buf_type[type] += count;
+	plt_wmb();
+	return 0;
+}
+
+uint64_t
+roc_npa_buf_type_mask(uint64_t aura_handle)
+{
+	uint64_t aura_id = roc_npa_aura_handle_to_aura(aura_handle);
+	uint64_t type_mask = 0;
+	struct npa_lf *lf;
+	int type;
+
+	lf = idev_npa_obj_get();
+	if (lf == NULL || aura_id >= lf->nr_pools) {
+		plt_err("Invalid aura id or lf");
+		return 0;
+	}
+
+	if (plt_bitmap_get(lf->npa_bmp, aura_id)) {
+		plt_err("Cannot get buf_type on unused aura");
+		return 0;
+	}
+
+	for (type = 0; type < ROC_NPA_BUF_TYPE_END; type++) {
+		if (lf->aura_attr[aura_id].buf_type[type])
+			type_mask |= BIT_ULL(type);
+	}
+
+	return type_mask;
+}
+
+uint64_t
+roc_npa_buf_type_limit_get(uint64_t type_mask)
+{
+	uint64_t wdata, reg;
+	uint64_t limit = 0;
+	struct npa_lf *lf;
+	uint64_t aura_id;
+	int64_t *addr;
+	uint64_t val;
+	int type;
+
+	lf = idev_npa_obj_get();
+	if (lf == NULL)
+		return NPA_ERR_PARAM;
+
+	for (aura_id = 0; aura_id < lf->nr_pools; aura_id++) {
+		if (plt_bitmap_get(lf->npa_bmp, aura_id))
+			continue;
+
+		/* Find aura's matching the buf_types requested */
+		if (type_mask != 0) {
+			val = 0;
+			for (type = 0; type < ROC_NPA_BUF_TYPE_END; type++) {
+				if (lf->aura_attr[aura_id].buf_type[type] != 0)
+					val |= BIT_ULL(type);
+			}
+			if ((val & type_mask) == 0)
+				continue;
+		}
+
+		wdata = aura_id << 44;
+		addr = (int64_t *)(lf->base + NPA_LF_AURA_OP_LIMIT);
+		reg = roc_atomic64_add_nosync(wdata, addr);
+
+		if (!(reg & BIT_ULL(42)))
+			limit += (reg & ROC_AURA_OP_LIMIT_MASK);
+	}
+
+	return limit;
+}

drivers/common/cnxk/version.map

@@ -306,6 +306,9 @@ INTERNAL {
 	roc_nix_vlan_mcam_entry_write;
 	roc_nix_vlan_strip_vtag_ena_dis;
 	roc_nix_vlan_tpid_set;
+	roc_npa_buf_type_mask;
+	roc_npa_buf_type_limit_get;
+	roc_npa_buf_type_update;
 	roc_npa_aura_drop_set;
 	roc_npa_aura_limit_modify;
 	roc_npa_aura_op_range_set;