net/ice/base: add method to disable FDIR swap option
In this patch, we introduced a new parameter to enable/disable the FDIR SWAP option by setting the swap and inset register set with certain values. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
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return ICE_SUCCESS;
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}
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/**
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* ice_disable_fd_swap - set register appropriately to disable FD swap
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* @hw: pointer to the HW struct
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* @prof_id: profile ID
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*/
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void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id)
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{
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u8 swap_val = ICE_SWAP_VALID;
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u8 i;
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/* Since the SWAP Flag in the Programming Desc doesn't work,
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* here add method to disable the SWAP Option via setting
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* certain SWAP and INSET register set.
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*/
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for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw / 4; i++) {
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u32 raw_swap = 0;
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u32 raw_in = 0;
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u8 j;
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for (j = 0; j < 4; j++) {
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raw_swap |= (swap_val++) << (j * BITS_PER_BYTE);
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raw_in |= ICE_INSET_DFLT << (j * BITS_PER_BYTE);
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}
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/* write the FDIR swap register set */
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wr32(hw, GLQF_FDSWAP(prof_id, i), raw_swap);
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ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n",
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prof_id, i, GLQF_FDSWAP(prof_id, i), raw_swap);
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/* write the FDIR inset register set */
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wr32(hw, GLQF_FDINSET(prof_id, i), raw_in);
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ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n",
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prof_id, i, GLQF_FDINSET(prof_id, i), raw_in);
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}
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}
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/**
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* ice_add_prof - add profile
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* @hw: pointer to the HW struct
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@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
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* @attr_cnt: number of elements in attrib array
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* @es: extraction sequence (length of array is determined by the block)
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* @masks: mask for extraction sequence
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* @fd_swap: enable/disable FDIR paired src/dst fields swap option
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*
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* This function registers a profile, which matches a set of PTYPES with a
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* particular extraction sequence. While the hardware profile is allocated
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@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
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enum ice_status
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ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
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const struct ice_ptype_attributes *attr, u16 attr_cnt,
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struct ice_fv_word *es, u16 *masks)
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struct ice_fv_word *es, u16 *masks, bool fd_swap)
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{
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u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);
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ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT);
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@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
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status = ice_alloc_prof_id(hw, blk, &prof_id);
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if (status)
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goto err_ice_add_prof;
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if (blk == ICE_BLK_FD) {
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if (blk == ICE_BLK_FD && fd_swap) {
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/* For Flow Director block, the extraction sequence may
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* need to be altered in the case where there are paired
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* fields that have no match. This is necessary because
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@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
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status = ice_update_fd_swap(hw, prof_id, es);
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if (status)
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goto err_ice_add_prof;
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} else if (blk == ICE_BLK_FD) {
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ice_disable_fd_swap(hw, prof_id);
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}
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status = ice_update_prof_masking(hw, blk, prof_id, masks);
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if (status)
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@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);
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/* XLT2/VSI group functions */
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enum ice_status
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ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
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void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id);
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enum ice_status
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ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
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const struct ice_ptype_attributes *attr, u16 attr_cnt,
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struct ice_fv_word *es, u16 *masks);
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struct ice_fv_word *es, u16 *masks, bool fd_swap);
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void ice_init_all_prof_masks(struct ice_hw *hw);
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void ice_shutdown_all_prof_masks(struct ice_hw *hw);
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struct ice_prof_map *
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@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
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/* Add a HW profile for this flow profile */
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status = ice_add_prof(hw, blk, prof_id, (u8 *)params->ptypes,
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params->attr, params->attr_cnt, params->es,
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params->mask);
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params->mask, true);
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if (status) {
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ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n");
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goto out;
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