raw/cnxk_bphy: support CGX enqueue operation
Add support for enqueueing messages. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
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@ -11,6 +11,13 @@ backed by ethernet I/O block called CGX or RPM (depending on the chip version).
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RFOE stands for Radio Frequency Over Ethernet and provides support for
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IEEE 1904.3 (RoE) standard.
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Features
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--------
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The BPHY CGX/RPM implements following features in the rawdev API:
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- Access to BPHY CGX/RPM via a set of predefined messages
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Device Setup
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------------
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@ -25,3 +32,64 @@ devices alone.
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Before performing actual data transfer one needs to first retrieve number of
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available queues with ``rte_rawdev_queue_count()`` and capacity of each
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using ``rte_rawdev_queue_conf_get()``.
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To perform data transfer use standard ``rte_rawdev_enqueue_buffers()`` and
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``rte_rawdev_dequeue_buffers()`` APIs. Not all messages produce sensible
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responses hence dequeueing is not always necessary.
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BPHY CGX/RPM PMD accepts ``struct cnxk_bphy_cgx_msg`` messages which differ by type and payload.
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Message types along with description are listed below.
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Get link information
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~~~~~~~~~~~~~~~~~~~~
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Message is used to get information about link state.
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Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO``. In response one will
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get message containing payload i.e ``struct cnxk_bphy_cgx_msg_link_info`` filled with information
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about current link state.
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Change internal loopback state
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Message is used to enable or disable internal loopback.
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Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE`` or
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``CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE``. Former will activate internal loopback while the latter
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will do the opposite.
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Change PTP RX state
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~~~~~~~~~~~~~~~~~~~
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Message is used to enable or disable PTP mode.
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Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE`` or
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``CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE``. Former will enable PTP while the latter will do the
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opposite.
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Set link mode
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~~~~~~~~~~~~~
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Message is used to change link mode.
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Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE``. Prior to sending actual
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message payload i.e ``struct cnxk_bphy_cgx_msg_link_mode`` needs to be filled with relevant
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information.
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Change link state
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~~~~~~~~~~~~~~~~~
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Message is used to set link up or down.
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Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE``. Prior to sending actual
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message payload i.e ``struct cnxk_bphy_cgx_msg_set_link_state`` needs to be filled with relevant
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information.
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Start or stop RX/TX
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~~~~~~~~~~~~~~~~~~~
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Message is used to start or stop accepting traffic.
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Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_START_RXTX`` or
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``CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX``. Former will enable traffic while the latter will
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do the opposite.
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@ -1,12 +1,16 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#include <string.h>
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#include <rte_bus_pci.h>
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#include <rte_rawdev.h>
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#include <rte_rawdev_pmd.h>
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#include <roc_api.h>
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#include "rte_pmd_bphy.h"
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struct cnxk_bphy_cgx_queue {
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unsigned int lmac;
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/* queue holds up to one response */
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@ -46,6 +50,113 @@ cnxk_bphy_cgx_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id,
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return 0;
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}
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static int
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cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue,
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struct rte_rawdev_buf *buf)
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{
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struct cnxk_bphy_cgx_queue *qp = &cgx->queues[queue];
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struct cnxk_bphy_cgx_msg_set_link_state *link_state;
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struct cnxk_bphy_cgx_msg *msg = buf->buf_addr;
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struct cnxk_bphy_cgx_msg_link_mode *link_mode;
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struct cnxk_bphy_cgx_msg_link_info *link_info;
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struct roc_bphy_cgx_link_info rlink_info;
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struct roc_bphy_cgx_link_mode rlink_mode;
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unsigned int lmac = qp->lmac;
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void *rsp = NULL;
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int ret;
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switch (msg->type) {
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case CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO:
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memset(&rlink_info, 0, sizeof(rlink_info));
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ret = roc_bphy_cgx_get_linkinfo(cgx->rcgx, lmac, &rlink_info);
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if (ret)
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break;
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link_info = rte_zmalloc(NULL, sizeof(*link_info), 0);
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if (!link_info)
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return -ENOMEM;
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link_info->link_up = rlink_info.link_up;
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link_info->full_duplex = rlink_info.full_duplex;
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link_info->speed =
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(enum cnxk_bphy_cgx_eth_link_speed)rlink_info.speed;
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link_info->autoneg = rlink_info.an;
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link_info->fec =
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(enum cnxk_bphy_cgx_eth_link_fec)rlink_info.fec;
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link_info->mode =
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(enum cnxk_bphy_cgx_eth_link_mode)rlink_info.mode;
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rsp = link_info;
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break;
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case CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE:
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ret = roc_bphy_cgx_intlbk_disable(cgx->rcgx, lmac);
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break;
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case CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE:
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ret = roc_bphy_cgx_intlbk_enable(cgx->rcgx, lmac);
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break;
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case CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE:
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ret = roc_bphy_cgx_ptp_rx_disable(cgx->rcgx, lmac);
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break;
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case CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE:
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ret = roc_bphy_cgx_ptp_rx_enable(cgx->rcgx, lmac);
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break;
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case CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE:
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link_mode = msg->data;
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memset(&rlink_mode, 0, sizeof(rlink_mode));
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rlink_mode.full_duplex = link_mode->full_duplex;
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rlink_mode.an = link_mode->autoneg;
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rlink_mode.speed =
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(enum roc_bphy_cgx_eth_link_speed)link_mode->speed;
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rlink_mode.mode =
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(enum roc_bphy_cgx_eth_link_mode)link_mode->mode;
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ret = roc_bphy_cgx_set_link_mode(cgx->rcgx, lmac, &rlink_mode);
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break;
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case CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE:
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link_state = msg->data;
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ret = roc_bphy_cgx_set_link_state(cgx->rcgx, lmac,
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link_state->state);
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break;
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case CNXK_BPHY_CGX_MSG_TYPE_START_RXTX:
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ret = roc_bphy_cgx_start_rxtx(cgx->rcgx, lmac);
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break;
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case CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX:
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ret = roc_bphy_cgx_stop_rxtx(cgx->rcgx, lmac);
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break;
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default:
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return -EINVAL;
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}
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/* get rid of last response if any */
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if (qp->rsp) {
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RTE_LOG(WARNING, PMD, "Previous response got overwritten\n");
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rte_free(qp->rsp);
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}
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qp->rsp = rsp;
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return ret;
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}
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static int
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cnxk_bphy_cgx_enqueue_bufs(struct rte_rawdev *dev,
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struct rte_rawdev_buf **buffers, unsigned int count,
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rte_rawdev_obj_t context)
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{
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struct cnxk_bphy_cgx *cgx = dev->dev_private;
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unsigned int queue = (size_t)context;
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int ret;
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if (queue >= cgx->num_queues)
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return -EINVAL;
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if (count == 0)
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return 0;
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ret = cnxk_bphy_cgx_process_buf(cgx, queue, buffers[0]);
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if (ret)
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return ret;
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return 1;
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}
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static uint16_t
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cnxk_bphy_cgx_queue_count(struct rte_rawdev *dev)
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{
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@ -56,6 +167,7 @@ cnxk_bphy_cgx_queue_count(struct rte_rawdev *dev)
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static const struct rte_rawdev_ops cnxk_bphy_cgx_rawdev_ops = {
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.queue_def_conf = cnxk_bphy_cgx_queue_def_conf,
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.enqueue_bufs = cnxk_bphy_cgx_enqueue_bufs,
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.queue_count = cnxk_bphy_cgx_queue_count,
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};
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@ -6,3 +6,4 @@ deps += ['bus_pci', 'common_cnxk', 'rawdev']
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sources = files(
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'cnxk_bphy_cgx.c',
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)
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headers = files('rte_pmd_bphy.h')
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drivers/raw/cnxk_bphy/rte_pmd_bphy.h
Normal file
104
drivers/raw/cnxk_bphy/rte_pmd_bphy.h
Normal file
@ -0,0 +1,104 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#ifndef _CNXK_BPHY_H_
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#define _CNXK_BPHY_H_
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enum cnxk_bphy_cgx_msg_type {
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CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO,
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CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE,
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CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE,
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CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE,
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CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE,
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CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE,
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CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE,
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CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
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CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
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};
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enum cnxk_bphy_cgx_eth_link_speed {
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CNXK_BPHY_CGX_ETH_LINK_SPEED_NONE,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_10M,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_100M,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_1G,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_2HG,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_5G,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_10G,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_20G,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_25G,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_40G,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_50G,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_80G,
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CNXK_BPHY_CGX_ETH_LINK_SPEED_100G,
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__CNXK_BPHY_CGX_ETH_LINK_SPEED_MAX
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};
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enum cnxk_bphy_cgx_eth_link_fec {
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CNXK_BPHY_CGX_ETH_LINK_FEC_NONE,
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CNXK_BPHY_CGX_ETH_LINK_FEC_BASE_R,
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CNXK_BPHY_CGX_ETH_LINK_FEC_RS,
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__CNXK_BPHY_CGX_ETH_LINK_FEC_MAX
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};
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enum cnxk_bphy_cgx_eth_link_mode {
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CNXK_BPHY_CGX_ETH_LINK_MODE_SGMII_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_1000_BASEX_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_QSGMII_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2M_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_10G_KR_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_20G_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2M_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_25G_2_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_25G_CR_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_25G_KR_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2M_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_40G_CR4_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_40G_KR4_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_40GAUI_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2M_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_50G_4_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_50G_CR_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_50G_KR_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_80GAUI_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2C_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2M_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_100G_CR4_BIT,
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CNXK_BPHY_CGX_ETH_LINK_MODE_100G_KR4_BIT,
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__CNXK_BPHY_CGX_ETH_LINK_MODE_MAX
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};
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struct cnxk_bphy_cgx_msg_link_mode {
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bool full_duplex;
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bool autoneg;
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enum cnxk_bphy_cgx_eth_link_speed speed;
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enum cnxk_bphy_cgx_eth_link_mode mode;
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};
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struct cnxk_bphy_cgx_msg_link_info {
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bool link_up;
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bool full_duplex;
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enum cnxk_bphy_cgx_eth_link_speed speed;
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bool autoneg;
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enum cnxk_bphy_cgx_eth_link_fec fec;
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enum cnxk_bphy_cgx_eth_link_mode mode;
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};
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struct cnxk_bphy_cgx_msg_set_link_state {
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bool state; /* up or down */
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};
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struct cnxk_bphy_cgx_msg {
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enum cnxk_bphy_cgx_msg_type type;
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/*
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* data depends on message type and whether
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* it's a request or a response
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*/
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void *data;
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};
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#endif /* _CNXK_BPHY_H_ */
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