e1000: minor changes
Signed-off-by: Intel
This commit is contained in:
Intel
Thomas Monjalon
parent
5e305acc2e
commit
e094e8f954
@ -35,35 +35,35 @@
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#ifndef _E1000_LOGS_H_
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#define _E1000_LOGS_H_
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#ifdef RTE_LIBRTE_IGB_DEBUG_INIT
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#ifdef RTE_LIBRTE_E1000_DEBUG_INIT
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#define PMD_INIT_LOG(level, fmt, args...) \
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RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
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#else
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#define PMD_INIT_LOG(level, fmt, args...) do { } while(0)
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#endif
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#ifdef RTE_LIBRTE_IGB_DEBUG_RX
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#ifdef RTE_LIBRTE_E1000_DEBUG_RX
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#define PMD_RX_LOG(level, fmt, args...) \
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RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
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#else
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#define PMD_RX_LOG(level, fmt, args...) do { } while(0)
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#endif
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#ifdef RTE_LIBRTE_IGB_DEBUG_TX
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#ifdef RTE_LIBRTE_E1000_DEBUG_TX
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#define PMD_TX_LOG(level, fmt, args...) \
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RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
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#else
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#define PMD_TX_LOG(level, fmt, args...) do { } while(0)
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#endif
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#ifdef RTE_LIBRTE_IGB_DEBUG_TX_FREE
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#ifdef RTE_LIBRTE_E1000_DEBUG_TX_FREE
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#define PMD_TX_FREE_LOG(level, fmt, args...) \
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RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
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#else
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#define PMD_TX_FREE_LOG(level, fmt, args...) do { } while(0)
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#endif
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#ifdef RTE_LIBRTE_IGB_DEBUG_DRIVER
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#ifdef RTE_LIBRTE_E1000_DEBUG_DRIVER
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#define PMD_DRV_LOG(level, fmt, args...) \
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RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
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#else
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@ -54,8 +54,7 @@
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#include <rte_malloc.h>
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#include "e1000_logs.h"
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#include "igb/e1000_api.h"
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#include "igb/e1000_hw.h"
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#include "e1000/e1000_api.h"
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#include "e1000_ethdev.h"
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static int eth_igb_configure(struct rte_eth_dev *dev, uint16_t nb_rx_q,
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@ -96,7 +95,8 @@ static int eth_igb_led_off(struct rte_eth_dev *dev);
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static void igb_intr_disable(struct e1000_hw *hw);
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static int igb_get_rx_buffer_size(struct e1000_hw *hw);
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static void eth_igb_rar_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
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static void eth_igb_rar_set(struct rte_eth_dev *dev,
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struct ether_addr *mac_addr,
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uint32_t index, uint32_t pool);
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static void eth_igb_rar_clear(struct rte_eth_dev *dev, uint32_t index);
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@ -72,7 +72,7 @@
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#include <rte_string_fns.h>
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#include "e1000_logs.h"
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#include "igb/e1000_api.h"
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#include "e1000/e1000_api.h"
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#include "e1000_ethdev.h"
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static inline struct rte_mbuf *
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@ -139,7 +139,7 @@ struct igb_rx_queue {
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enum igb_advctx_num {
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IGB_CTX_0 = 0, /**< CTX0 */
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IGB_CTX_1 = 1, /**< CTX1 */
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IGB_CTX_NUM = 2, /**< CTX NUM */
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IGB_CTX_NUM = 2, /**< CTX_NUM */
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};
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/**
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@ -148,7 +148,7 @@ enum igb_advctx_num {
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struct igb_advctx_info {
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uint16_t flags; /**< ol_flags related to context build. */
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uint32_t cmp_mask; /**< compare mask for vlan_macip_lens */
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uint32_t vlan_macip_lens; /**< vlan, mac.ip length. */
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union rte_vlan_macip vlan_macip_lens; /**< vlan, mac & ip length. */
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};
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/**
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@ -162,15 +162,19 @@ struct igb_tx_queue {
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uint32_t txd_type; /**< Device-specific TXD type */
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uint16_t nb_tx_desc; /**< number of TX descriptors. */
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uint16_t tx_tail; /**< Current value of TDT register. */
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uint16_t tx_head; /**< Index of first used TX descriptor. */
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uint16_t tx_head;
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/**< Index of first used TX descriptor. */
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uint16_t queue_id; /**< TX queue index. */
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uint8_t port_id; /**< Device port identifier. */
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uint8_t pthresh; /**< Prefetch threshold register. */
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uint8_t hthresh; /**< Host threshold register. */
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uint8_t wthresh; /**< Write-back threshold register. */
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uint32_t ctx_curr; /**< Current used hardware descriptor. */
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uint32_t ctx_start;/**< Start context position for transmit queue. */
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struct igb_advctx_info ctx_cache[IGB_CTX_NUM]; /**< Hardware context history.*/
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uint32_t ctx_curr;
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/**< Current used hardware descriptor. */
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uint32_t ctx_start;
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/**< Start context position for transmit queue. */
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struct igb_advctx_info ctx_cache[IGB_CTX_NUM];
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/**< Hardware context history.*/
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};
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#if 1
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@ -255,7 +259,8 @@ igbe_set_xmit_ctx(struct igb_tx_queue* txq,
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txq->ctx_cache[ctx_curr].flags = ol_flags;
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txq->ctx_cache[ctx_curr].cmp_mask = cmp_mask;
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txq->ctx_cache[ctx_curr].vlan_macip_lens = vlan_macip_lens & cmp_mask;
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txq->ctx_cache[ctx_curr].vlan_macip_lens.data =
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vlan_macip_lens & cmp_mask;
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ctx_txd->type_tucmd_mlhl = rte_cpu_to_le_32(type_tucmd_mlhl);
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ctx_txd->vlan_macip_lens = rte_cpu_to_le_32(vlan_macip_lens);
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@ -273,7 +278,7 @@ what_advctx_update(struct igb_tx_queue *txq, uint16_t flags,
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{
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/* If match with the current context */
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if (likely((txq->ctx_cache[txq->ctx_curr].flags == flags) &&
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(txq->ctx_cache[txq->ctx_curr].vlan_macip_lens ==
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(txq->ctx_cache[txq->ctx_curr].vlan_macip_lens.data ==
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(txq->ctx_cache[txq->ctx_curr].cmp_mask & vlan_macip_lens)))) {
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return txq->ctx_curr;
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}
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@ -281,7 +286,7 @@ what_advctx_update(struct igb_tx_queue *txq, uint16_t flags,
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/* If match with the second context */
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txq->ctx_curr ^= 1;
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if (likely((txq->ctx_cache[txq->ctx_curr].flags == flags) &&
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(txq->ctx_cache[txq->ctx_curr].vlan_macip_lens ==
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(txq->ctx_cache[txq->ctx_curr].vlan_macip_lens.data ==
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(txq->ctx_cache[txq->ctx_curr].cmp_mask & vlan_macip_lens)))) {
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return txq->ctx_curr;
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}
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@ -356,12 +361,13 @@ eth_igb_xmit_pkts(struct igb_tx_queue *txq, struct rte_mbuf **tx_pkts,
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tx_last = (uint16_t) (tx_id + tx_pkt->pkt.nb_segs - 1);
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ol_flags = tx_pkt->ol_flags;
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vlan_macip_lens = (tx_pkt->pkt.vlan_tci << 16) | (tx_pkt->pkt.l2_len << E1000_ADVTXD_MACLEN_SHIFT) | tx_pkt->pkt.l3_len;
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vlan_macip_lens = tx_pkt->pkt.vlan_macip.data;
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tx_ol_req = (ol_flags & PKT_TX_OFFLOAD_MASK);
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/* If a Context Descriptor need be built . */
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if (tx_ol_req) {
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ctx = what_advctx_update(txq, tx_ol_req,vlan_macip_lens);
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ctx = what_advctx_update(txq, tx_ol_req,
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vlan_macip_lens);
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/* Only allocate context descriptor if required*/
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new_ctx = (ctx == IGB_CTX_NUM);
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ctx = txq->ctx_curr;
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@ -736,7 +742,8 @@ eth_igb_recv_pkts(struct igb_rx_queue *rxq, struct rte_mbuf **rx_pkts,
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rxm->pkt.hash.rss = rxd.wb.lower.hi_dword.rss;
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hlen_type_rss = rte_le_to_cpu_32(rxd.wb.lower.lo_dword.data);
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/* Only valid if PKT_RX_VLAN_PKT set in pkt_flags */
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rxm->pkt.vlan_tci = rte_le_to_cpu_16(rxd.wb.upper.vlan);
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rxm->pkt.vlan_macip.f.vlan_tci =
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rte_le_to_cpu_16(rxd.wb.upper.vlan);
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pkt_flags = rx_desc_hlen_type_rss_to_pkt_flags(hlen_type_rss);
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pkt_flags = (pkt_flags |
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@ -970,7 +977,8 @@ eth_igb_recv_scattered_pkts(struct igb_rx_queue *rxq, struct rte_mbuf **rx_pkts,
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* The vlan_tci field is only valid when PKT_RX_VLAN_PKT is
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* set in the pkt_flags field.
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*/
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first_seg->pkt.vlan_tci = rte_le_to_cpu_16(rxd.wb.upper.vlan);
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first_seg->pkt.vlan_macip.f.vlan_tci =
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rte_le_to_cpu_16(rxd.wb.upper.vlan);
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hlen_type_rss = rte_le_to_cpu_32(rxd.wb.lower.lo_dword.data);
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pkt_flags = rx_desc_hlen_type_rss_to_pkt_flags(hlen_type_rss);
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pkt_flags = (pkt_flags | rx_desc_status_to_pkt_flags(staterr));
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@ -1203,15 +1211,15 @@ eth_igb_tx_queue_setup(struct rte_eth_dev *dev,
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if (tx_conf->tx_free_thresh != 0)
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RTE_LOG(WARNING, PMD,
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"The tx_free_thresh parameter is not "
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"used for the 1G driver.");
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"used for the 1G driver.\n");
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if (tx_conf->tx_rs_thresh != 0)
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RTE_LOG(WARNING, PMD,
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"The tx_rs_thresh parameter is not "
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"used for the 1G driver.");
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"used for the 1G driver.\n");
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if (tx_conf->tx_thresh.wthresh == 0)
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RTE_LOG(WARNING, PMD,
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"To improve 1G driver performance, consider setting "
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"the TX WTHRESH value to 4, 8, or 16.");
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"the TX WTHRESH value to 4, 8, or 16.\n");
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/* Free memory prior to re-allocation if needed */
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if (dev->data->tx_queues[queue_idx] != NULL)
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@ -1763,19 +1771,20 @@ eth_igb_rx_init(struct rte_eth_dev *dev)
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/* set STRCRC bit in all queues for Powerville */
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if (hw->mac.type == e1000_i350) {
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for (i = 0; i < dev->data->nb_rx_queues; i++) {
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uint32_t dvmolr = E1000_READ_REG(hw, E1000_DVMOLR(i));
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uint32_t dvmolr = E1000_READ_REG(hw,
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E1000_DVMOLR(i));
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dvmolr |= E1000_DVMOLR_STRCRC;
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E1000_WRITE_REG(hw, E1000_DVMOLR(i), dvmolr);
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}
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}
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} else {
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rctl &= ~E1000_RCTL_SECRC; /* Do not Strip Ethernet CRC. */
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/* clear STRCRC bit in all queues for Powerville */
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if (hw->mac.type == e1000_i350) {
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for (i = 0; i < dev->data->nb_rx_queues; i++) {
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uint32_t dvmolr = E1000_READ_REG(hw, E1000_DVMOLR(i));
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uint32_t dvmolr = E1000_READ_REG(hw,
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E1000_DVMOLR(i));
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dvmolr &= ~E1000_DVMOLR_STRCRC;
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E1000_WRITE_REG(hw, E1000_DVMOLR(i), dvmolr);
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}
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