net/octeontx2: support TM length adjust and packet mode
This patch adds support to packet length adjust TM feature for private shaper. It also adds support to packet mode feature that applies both to private shaper and node DWRR scheduling of SP children. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
This commit is contained in:
Nithin Dabilpuram
Ferruh Yigit
parent
bb52561e53
commit
e0b79eabac
@ -360,18 +360,25 @@ prepare_tm_shaper_reg(struct otx2_nix_tm_node *tm_node,
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{
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struct shaper_params cir, pir;
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uint32_t schq = tm_node->hw_id;
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uint64_t adjust = 0;
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uint8_t k = 0;
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memset(&cir, 0, sizeof(cir));
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memset(&pir, 0, sizeof(pir));
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shaper_config_to_nix(profile, &cir, &pir);
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otx2_tm_dbg("Shaper config node %s(%u) lvl %u id %u, "
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"pir %" PRIu64 "(%" PRIu64 "B),"
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" cir %" PRIu64 "(%" PRIu64 "B) (%p)",
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nix_hwlvl2str(tm_node->hw_lvl), schq, tm_node->lvl,
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tm_node->id, pir.rate, pir.burst,
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cir.rate, cir.burst, tm_node);
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/* Packet length adjust */
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if (tm_node->pkt_mode)
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adjust = 1;
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else if (profile)
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adjust = profile->params.pkt_length_adjust & 0x1FF;
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otx2_tm_dbg("Shaper config node %s(%u) lvl %u id %u, pir %" PRIu64
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"(%" PRIu64 "B), cir %" PRIu64 "(%" PRIu64 "B)"
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"adjust 0x%" PRIx64 "(pktmode %u) (%p)",
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nix_hwlvl2str(tm_node->hw_lvl), schq, tm_node->lvl,
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tm_node->id, pir.rate, pir.burst, cir.rate, cir.burst,
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adjust, tm_node->pkt_mode, tm_node);
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switch (tm_node->hw_lvl) {
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case NIX_TXSCH_LVL_SMQ:
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@ -388,7 +395,9 @@ prepare_tm_shaper_reg(struct otx2_nix_tm_node *tm_node,
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/* Configure RED ALG */
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reg[k] = NIX_AF_MDQX_SHAPE(schq);
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regval[k] = ((uint64_t)tm_node->red_algo << 9);
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regval[k] = (adjust |
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(uint64_t)tm_node->red_algo << 9 |
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(uint64_t)tm_node->pkt_mode << 24);
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k++;
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break;
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case NIX_TXSCH_LVL_TL4:
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@ -405,7 +414,9 @@ prepare_tm_shaper_reg(struct otx2_nix_tm_node *tm_node,
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/* Configure RED algo */
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reg[k] = NIX_AF_TL4X_SHAPE(schq);
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regval[k] = ((uint64_t)tm_node->red_algo << 9);
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regval[k] = (adjust |
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(uint64_t)tm_node->red_algo << 9 |
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(uint64_t)tm_node->pkt_mode << 24);
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k++;
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break;
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case NIX_TXSCH_LVL_TL3:
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@ -422,7 +433,9 @@ prepare_tm_shaper_reg(struct otx2_nix_tm_node *tm_node,
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/* Configure RED algo */
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reg[k] = NIX_AF_TL3X_SHAPE(schq);
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regval[k] = ((uint64_t)tm_node->red_algo << 9);
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regval[k] = (adjust |
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(uint64_t)tm_node->red_algo << 9 |
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(uint64_t)tm_node->pkt_mode << 24);
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k++;
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break;
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@ -440,7 +453,9 @@ prepare_tm_shaper_reg(struct otx2_nix_tm_node *tm_node,
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/* Configure RED algo */
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reg[k] = NIX_AF_TL2X_SHAPE(schq);
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regval[k] = ((uint64_t)tm_node->red_algo << 9);
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regval[k] = (adjust |
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(uint64_t)tm_node->red_algo << 9 |
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(uint64_t)tm_node->pkt_mode << 24);
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k++;
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break;
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@ -450,6 +465,12 @@ prepare_tm_shaper_reg(struct otx2_nix_tm_node *tm_node,
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regval[k] = (cir.rate && cir.burst) ?
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(shaper2regval(&cir) | 1) : 0;
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k++;
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/* Configure length disable and adjust */
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reg[k] = NIX_AF_TL1X_SHAPE(schq);
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regval[k] = (adjust |
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(uint64_t)tm_node->pkt_mode << 24);
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k++;
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break;
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}
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@ -799,6 +820,15 @@ nix_tm_node_add_to_list(struct otx2_eth_dev *dev, uint32_t node_id,
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tm_node->flags = 0;
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if (user)
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tm_node->flags = NIX_TM_NODE_USER;
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/* Packet mode */
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if (!nix_tm_is_leaf(dev, lvl) &&
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((profile && profile->params.packet_mode) ||
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(params->nonleaf.wfq_weight_mode &&
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params->nonleaf.n_sp_priorities &&
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!params->nonleaf.wfq_weight_mode[0])))
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tm_node->pkt_mode = 1;
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rte_memcpy(&tm_node->params, params, sizeof(struct rte_tm_node_params));
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if (profile)
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@ -1889,8 +1919,10 @@ otx2_nix_tm_capa_get(struct rte_eth_dev *eth_dev,
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cap->shaper_private_dual_rate_n_max = max_nr_nodes;
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cap->shaper_private_rate_min = MIN_SHAPER_RATE / 8;
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cap->shaper_private_rate_max = MAX_SHAPER_RATE / 8;
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cap->shaper_pkt_length_adjust_min = 0;
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cap->shaper_pkt_length_adjust_max = 0;
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cap->shaper_private_packet_mode_supported = 1;
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cap->shaper_private_byte_mode_supported = 1;
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cap->shaper_pkt_length_adjust_min = NIX_LENGTH_ADJUST_MIN;
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cap->shaper_pkt_length_adjust_max = NIX_LENGTH_ADJUST_MAX;
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/* Schedule Capabilities */
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cap->sched_n_children_max = rsp->schq[NIX_TXSCH_LVL_MDQ];
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@ -1898,6 +1930,8 @@ otx2_nix_tm_capa_get(struct rte_eth_dev *eth_dev,
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cap->sched_wfq_n_children_per_group_max = cap->sched_n_children_max;
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cap->sched_wfq_n_groups_max = 1;
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cap->sched_wfq_weight_max = MAX_SCHED_WEIGHT;
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cap->sched_wfq_packet_mode_supported = 1;
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cap->sched_wfq_byte_mode_supported = 1;
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cap->dynamic_update_mask =
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RTE_TM_UPDATE_NODE_PARENT_KEEP_LEVEL |
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@ -1960,12 +1994,16 @@ otx2_nix_tm_level_capa_get(struct rte_eth_dev *eth_dev, uint32_t lvl,
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nix_tm_have_tl1_access(dev) ? false : true;
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cap->nonleaf.shaper_private_rate_min = MIN_SHAPER_RATE / 8;
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cap->nonleaf.shaper_private_rate_max = MAX_SHAPER_RATE / 8;
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cap->nonleaf.shaper_private_packet_mode_supported = 1;
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cap->nonleaf.shaper_private_byte_mode_supported = 1;
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cap->nonleaf.sched_n_children_max = rsp->schq[hw_lvl - 1];
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cap->nonleaf.sched_sp_n_priorities_max =
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nix_max_prio(dev, hw_lvl) + 1;
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cap->nonleaf.sched_wfq_n_groups_max = 1;
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cap->nonleaf.sched_wfq_weight_max = MAX_SCHED_WEIGHT;
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cap->nonleaf.sched_wfq_packet_mode_supported = 1;
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cap->nonleaf.sched_wfq_byte_mode_supported = 1;
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if (nix_tm_have_tl1_access(dev))
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cap->nonleaf.stats_mask =
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@ -1982,6 +2020,8 @@ otx2_nix_tm_level_capa_get(struct rte_eth_dev *eth_dev, uint32_t lvl,
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cap->nonleaf.shaper_private_dual_rate_supported = true;
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cap->nonleaf.shaper_private_rate_min = MIN_SHAPER_RATE / 8;
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cap->nonleaf.shaper_private_rate_max = MAX_SHAPER_RATE / 8;
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cap->nonleaf.shaper_private_packet_mode_supported = 1;
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cap->nonleaf.shaper_private_byte_mode_supported = 1;
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/* MDQ doesn't support Strict Priority */
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if (hw_lvl == NIX_TXSCH_LVL_MDQ)
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@ -1993,6 +2033,8 @@ otx2_nix_tm_level_capa_get(struct rte_eth_dev *eth_dev, uint32_t lvl,
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nix_max_prio(dev, hw_lvl) + 1;
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cap->nonleaf.sched_wfq_n_groups_max = 1;
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cap->nonleaf.sched_wfq_weight_max = MAX_SCHED_WEIGHT;
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cap->nonleaf.sched_wfq_packet_mode_supported = 1;
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cap->nonleaf.sched_wfq_byte_mode_supported = 1;
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} else {
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/* unsupported level */
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error->type = RTE_TM_ERROR_TYPE_UNSPECIFIED;
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@ -2045,6 +2087,8 @@ otx2_nix_tm_node_capa_get(struct rte_eth_dev *eth_dev, uint32_t node_id,
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(hw_lvl == NIX_TXSCH_LVL_TL1) ? false : true;
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cap->shaper_private_rate_min = MIN_SHAPER_RATE / 8;
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cap->shaper_private_rate_max = MAX_SHAPER_RATE / 8;
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cap->shaper_private_packet_mode_supported = 1;
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cap->shaper_private_byte_mode_supported = 1;
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/* Non Leaf Scheduler */
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if (hw_lvl == NIX_TXSCH_LVL_MDQ)
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@ -2057,6 +2101,8 @@ otx2_nix_tm_node_capa_get(struct rte_eth_dev *eth_dev, uint32_t node_id,
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cap->nonleaf.sched_n_children_max;
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cap->nonleaf.sched_wfq_n_groups_max = 1;
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cap->nonleaf.sched_wfq_weight_max = MAX_SCHED_WEIGHT;
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cap->nonleaf.sched_wfq_packet_mode_supported = 1;
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cap->nonleaf.sched_wfq_byte_mode_supported = 1;
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if (hw_lvl == NIX_TXSCH_LVL_TL1)
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cap->stats_mask = RTE_TM_STATS_N_PKTS_RED_DROPPED |
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@ -2112,6 +2158,13 @@ otx2_nix_tm_shaper_profile_add(struct rte_eth_dev *eth_dev,
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}
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}
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if (params->pkt_length_adjust < NIX_LENGTH_ADJUST_MIN ||
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params->pkt_length_adjust > NIX_LENGTH_ADJUST_MAX) {
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error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PKT_ADJUST_LEN;
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error->message = "length adjust invalid";
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return -EINVAL;
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}
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profile = rte_zmalloc("otx2_nix_tm_shaper_profile",
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sizeof(struct otx2_nix_tm_shaper_profile), 0);
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if (!profile)
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@ -2124,13 +2177,14 @@ otx2_nix_tm_shaper_profile_add(struct rte_eth_dev *eth_dev,
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otx2_tm_dbg("Added TM shaper profile %u, "
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" pir %" PRIu64 " , pbs %" PRIu64 ", cir %" PRIu64
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", cbs %" PRIu64 " , adj %u",
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", cbs %" PRIu64 " , adj %u, pkt mode %d",
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profile_id,
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params->peak.rate * 8,
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params->peak.size,
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params->committed.rate * 8,
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params->committed.size,
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params->pkt_length_adjust);
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params->pkt_length_adjust,
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params->packet_mode);
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/* Translate rate as bits per second */
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profile->params.peak.rate = profile->params.peak.rate * 8;
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@ -2186,9 +2240,11 @@ otx2_nix_tm_node_add(struct rte_eth_dev *eth_dev, uint32_t node_id,
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struct rte_tm_error *error)
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{
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struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
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struct otx2_nix_tm_shaper_profile *profile = NULL;
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struct otx2_nix_tm_node *parent_node;
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int rc, clear_on_fail = 0;
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uint32_t exp_next_lvl;
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int rc, pkt_mode, clear_on_fail = 0;
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uint32_t exp_next_lvl, i;
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uint32_t profile_id;
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uint16_t hw_lvl;
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/* we don't support dynamic updates */
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@ -2250,13 +2306,45 @@ otx2_nix_tm_node_add(struct rte_eth_dev *eth_dev, uint32_t node_id,
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return -EINVAL;
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}
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/* Check if shaper profile exists for non leaf node */
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if (!nix_tm_is_leaf(dev, lvl) &&
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params->shaper_profile_id != RTE_TM_SHAPER_PROFILE_ID_NONE &&
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!nix_tm_shaper_profile_search(dev, params->shaper_profile_id)) {
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error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
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error->message = "invalid shaper profile";
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return -EINVAL;
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if (!nix_tm_is_leaf(dev, lvl)) {
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/* Check if shaper profile exists for non leaf node */
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profile_id = params->shaper_profile_id;
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profile = nix_tm_shaper_profile_search(dev, profile_id);
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if (profile_id != RTE_TM_SHAPER_PROFILE_ID_NONE && !profile) {
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error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
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error->message = "invalid shaper profile";
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return -EINVAL;
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}
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/* Minimum static priority count is 1 */
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if (!params->nonleaf.n_sp_priorities ||
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params->nonleaf.n_sp_priorities > TXSCH_TLX_SP_PRIO_MAX) {
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error->type =
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RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SP_PRIORITIES;
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error->message = "invalid sp priorities";
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return -EINVAL;
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}
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pkt_mode = 0;
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/* Validate weight mode */
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for (i = 0; i < params->nonleaf.n_sp_priorities &&
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params->nonleaf.wfq_weight_mode; i++) {
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pkt_mode = !params->nonleaf.wfq_weight_mode[i];
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if (pkt_mode == !params->nonleaf.wfq_weight_mode[0])
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continue;
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error->type =
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RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
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error->message = "unsupported weight mode";
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return -EINVAL;
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}
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if (profile && params->nonleaf.n_sp_priorities &&
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pkt_mode != profile->params.packet_mode) {
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error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
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error->message = "shaper wfq packet mode mismatch";
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return -EINVAL;
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}
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}
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/* Check if there is second DWRR already in siblings or holes in prio */
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@ -2498,6 +2586,12 @@ otx2_nix_tm_node_shaper_update(struct rte_eth_dev *eth_dev,
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}
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}
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if (profile && profile->params.packet_mode != tm_node->pkt_mode) {
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error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
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error->message = "shaper profile pkt mode mismatch";
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return -EINVAL;
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}
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tm_node->params.shaper_profile_id = profile_id;
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/* Nothing to do if not yet committed */
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@ -49,6 +49,7 @@ struct otx2_nix_tm_node {
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#define NIX_TM_NODE_RED_DISCARD BIT_ULL(3)
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/* Shaper algorithm for RED state @NIX_REDALG_E */
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uint32_t red_algo:2;
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uint32_t pkt_mode:1;
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struct otx2_nix_tm_node *parent;
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struct rte_tm_node_params params;
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@ -115,6 +116,10 @@ TAILQ_HEAD(otx2_nix_tm_shaper_profile_list, otx2_nix_tm_shaper_profile);
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#define MAX_SHAPER_RATE \
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SHAPER_RATE(MAX_RATE_EXPONENT, MAX_RATE_MANTISSA, 0)
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/* Min is limited so that NIX_AF_SMQX_CFG[MINLEN]+ADJUST is not -ve */
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#define NIX_LENGTH_ADJUST_MIN ((int)-NIX_MIN_HW_FRS + 1)
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#define NIX_LENGTH_ADJUST_MAX 255
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/** TM Shaper - low level operations */
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/** NIX burst limits */
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