ethdev: replace bit shifts with macros
The macros RTE_BIT32 and RTE_BIT64 are used to replace bit shifts. The macro UINT64C is also used to replace remaining occurrences of ULL. The bit shifts of ETH_RSS_LEVEL_* are kept for aesthetic reason. The API of rte_mtr and rte_tm is using enums for 64-bit variables. As they are enums, unsigned bit cannot be used. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
This commit is contained in:
Thomas Monjalon
Ferruh Yigit
parent
febc855b35
commit
e1823e0842
@ -1293,7 +1293,7 @@ eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
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while (offloads_diff != 0) {
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/* Check if any offload is requested but not enabled. */
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offload = 1ULL << __builtin_ctzll(offloads_diff);
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offload = RTE_BIT64(__builtin_ctzll(offloads_diff));
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if (offload & req_offloads) {
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RTE_ETHDEV_LOG(ERR,
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"Port %u failed to enable %s offload %s\n",
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@ -1687,7 +1687,7 @@ eth_dev_mac_restore(struct rte_eth_dev *dev,
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pool_mask = dev->data->mac_pool_sel[i];
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do {
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if (pool_mask & 1ULL)
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if (pool_mask & UINT64_C(1))
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(*dev->dev_ops->mac_addr_add)(dev,
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addr, i, pool);
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pool_mask >>= 1;
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@ -1975,7 +1975,7 @@ rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
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* for each segment specified in extended configuration.
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*/
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mp_first = rx_seg[0].mp;
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offset_mask = (1u << seg_capa->offset_align_log2) - 1;
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offset_mask = RTE_BIT32(seg_capa->offset_align_log2) - 1;
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for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
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struct rte_mempool *mpl = rx_seg[seg_idx].mp;
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uint32_t length = rx_seg[seg_idx].length;
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@ -3736,9 +3736,9 @@ rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
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vbit = vlan_id % 64;
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if (on)
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vfc->ids[vidx] |= UINT64_C(1) << vbit;
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vfc->ids[vidx] |= RTE_BIT64(vbit);
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else
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vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
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vfc->ids[vidx] &= ~RTE_BIT64(vbit);
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}
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return eth_err(port_id, ret);
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@ -4010,7 +4010,7 @@ eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
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for (i = 0; i < reta_size; i++) {
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idx = i / RTE_RETA_GROUP_SIZE;
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shift = i % RTE_RETA_GROUP_SIZE;
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if ((reta_conf[idx].mask & (1ULL << shift)) &&
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if ((reta_conf[idx].mask & RTE_BIT64(shift)) &&
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(reta_conf[idx].reta[shift] >= max_rxq)) {
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RTE_ETHDEV_LOG(ERR,
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"reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
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@ -4349,7 +4349,7 @@ rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
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pool_mask = dev->data->mac_pool_sel[index];
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/* Check if both MAC address and pool is already there, and do nothing */
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if (pool_mask & (1ULL << pool))
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if (pool_mask & RTE_BIT64(pool))
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return 0;
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}
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@ -4361,7 +4361,7 @@ rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
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rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
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/* Update pool bitmap in NIC data structure */
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dev->data->mac_pool_sel[index] |= (1ULL << pool);
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dev->data->mac_pool_sel[index] |= RTE_BIT64(pool);
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}
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return eth_err(port_id, ret);
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@ -159,6 +159,7 @@ extern "C" {
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#include <rte_interrupts.h>
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#include <rte_dev.h>
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#include <rte_devargs.h>
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#include <rte_bitops.h>
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#include <rte_errno.h>
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#include <rte_common.h>
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#include <rte_config.h>
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@ -279,23 +280,23 @@ struct rte_eth_stats {
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/**@{@name Link speed capabilities
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* Device supported speeds bitmap flags
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*/
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#define ETH_LINK_SPEED_AUTONEG (0 << 0) /**< Autonegotiate (all speeds) */
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#define ETH_LINK_SPEED_FIXED (1 << 0) /**< Disable autoneg (fixed speed) */
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#define ETH_LINK_SPEED_10M_HD (1 << 1) /**< 10 Mbps half-duplex */
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#define ETH_LINK_SPEED_10M (1 << 2) /**< 10 Mbps full-duplex */
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#define ETH_LINK_SPEED_100M_HD (1 << 3) /**< 100 Mbps half-duplex */
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#define ETH_LINK_SPEED_100M (1 << 4) /**< 100 Mbps full-duplex */
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#define ETH_LINK_SPEED_1G (1 << 5) /**< 1 Gbps */
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#define ETH_LINK_SPEED_2_5G (1 << 6) /**< 2.5 Gbps */
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#define ETH_LINK_SPEED_5G (1 << 7) /**< 5 Gbps */
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#define ETH_LINK_SPEED_10G (1 << 8) /**< 10 Gbps */
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#define ETH_LINK_SPEED_20G (1 << 9) /**< 20 Gbps */
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#define ETH_LINK_SPEED_25G (1 << 10) /**< 25 Gbps */
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#define ETH_LINK_SPEED_40G (1 << 11) /**< 40 Gbps */
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#define ETH_LINK_SPEED_50G (1 << 12) /**< 50 Gbps */
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#define ETH_LINK_SPEED_56G (1 << 13) /**< 56 Gbps */
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#define ETH_LINK_SPEED_100G (1 << 14) /**< 100 Gbps */
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#define ETH_LINK_SPEED_200G (1 << 15) /**< 200 Gbps */
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#define ETH_LINK_SPEED_AUTONEG 0 /**< Autonegotiate (all speeds) */
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#define ETH_LINK_SPEED_FIXED RTE_BIT32(0) /**< Disable autoneg (fixed speed) */
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#define ETH_LINK_SPEED_10M_HD RTE_BIT32(1) /**< 10 Mbps half-duplex */
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#define ETH_LINK_SPEED_10M RTE_BIT32(2) /**< 10 Mbps full-duplex */
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#define ETH_LINK_SPEED_100M_HD RTE_BIT32(3) /**< 100 Mbps half-duplex */
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#define ETH_LINK_SPEED_100M RTE_BIT32(4) /**< 100 Mbps full-duplex */
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#define ETH_LINK_SPEED_1G RTE_BIT32(5) /**< 1 Gbps */
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#define ETH_LINK_SPEED_2_5G RTE_BIT32(6) /**< 2.5 Gbps */
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#define ETH_LINK_SPEED_5G RTE_BIT32(7) /**< 5 Gbps */
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#define ETH_LINK_SPEED_10G RTE_BIT32(8) /**< 10 Gbps */
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#define ETH_LINK_SPEED_20G RTE_BIT32(9) /**< 20 Gbps */
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#define ETH_LINK_SPEED_25G RTE_BIT32(10) /**< 25 Gbps */
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#define ETH_LINK_SPEED_40G RTE_BIT32(11) /**< 40 Gbps */
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#define ETH_LINK_SPEED_50G RTE_BIT32(12) /**< 50 Gbps */
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#define ETH_LINK_SPEED_56G RTE_BIT32(13) /**< 56 Gbps */
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#define ETH_LINK_SPEED_100G RTE_BIT32(14) /**< 100 Gbps */
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#define ETH_LINK_SPEED_200G RTE_BIT32(15) /**< 200 Gbps */
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/**@}*/
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/**@{@name Link speed
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@ -512,38 +513,38 @@ struct rte_eth_rss_conf {
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* Below macros are defined for RSS offload types, they can be used to
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* fill rte_eth_rss_conf.rss_hf or rte_flow_action_rss.types.
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*/
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#define ETH_RSS_IPV4 (1ULL << 2)
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#define ETH_RSS_FRAG_IPV4 (1ULL << 3)
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#define ETH_RSS_NONFRAG_IPV4_TCP (1ULL << 4)
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#define ETH_RSS_NONFRAG_IPV4_UDP (1ULL << 5)
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#define ETH_RSS_NONFRAG_IPV4_SCTP (1ULL << 6)
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#define ETH_RSS_NONFRAG_IPV4_OTHER (1ULL << 7)
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#define ETH_RSS_IPV6 (1ULL << 8)
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#define ETH_RSS_FRAG_IPV6 (1ULL << 9)
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#define ETH_RSS_NONFRAG_IPV6_TCP (1ULL << 10)
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#define ETH_RSS_NONFRAG_IPV6_UDP (1ULL << 11)
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#define ETH_RSS_NONFRAG_IPV6_SCTP (1ULL << 12)
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#define ETH_RSS_NONFRAG_IPV6_OTHER (1ULL << 13)
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#define ETH_RSS_L2_PAYLOAD (1ULL << 14)
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#define ETH_RSS_IPV6_EX (1ULL << 15)
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#define ETH_RSS_IPV6_TCP_EX (1ULL << 16)
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#define ETH_RSS_IPV6_UDP_EX (1ULL << 17)
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#define ETH_RSS_PORT (1ULL << 18)
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#define ETH_RSS_VXLAN (1ULL << 19)
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#define ETH_RSS_GENEVE (1ULL << 20)
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#define ETH_RSS_NVGRE (1ULL << 21)
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#define ETH_RSS_GTPU (1ULL << 23)
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#define ETH_RSS_ETH (1ULL << 24)
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#define ETH_RSS_S_VLAN (1ULL << 25)
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#define ETH_RSS_C_VLAN (1ULL << 26)
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#define ETH_RSS_ESP (1ULL << 27)
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#define ETH_RSS_AH (1ULL << 28)
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#define ETH_RSS_L2TPV3 (1ULL << 29)
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#define ETH_RSS_PFCP (1ULL << 30)
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#define ETH_RSS_PPPOE (1ULL << 31)
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#define ETH_RSS_ECPRI (1ULL << 32)
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#define ETH_RSS_MPLS (1ULL << 33)
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#define ETH_RSS_IPV4_CHKSUM (1ULL << 34)
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#define ETH_RSS_IPV4 RTE_BIT64(2)
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#define ETH_RSS_FRAG_IPV4 RTE_BIT64(3)
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#define ETH_RSS_NONFRAG_IPV4_TCP RTE_BIT64(4)
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#define ETH_RSS_NONFRAG_IPV4_UDP RTE_BIT64(5)
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#define ETH_RSS_NONFRAG_IPV4_SCTP RTE_BIT64(6)
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#define ETH_RSS_NONFRAG_IPV4_OTHER RTE_BIT64(7)
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#define ETH_RSS_IPV6 RTE_BIT64(8)
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#define ETH_RSS_FRAG_IPV6 RTE_BIT64(9)
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#define ETH_RSS_NONFRAG_IPV6_TCP RTE_BIT64(10)
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#define ETH_RSS_NONFRAG_IPV6_UDP RTE_BIT64(11)
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#define ETH_RSS_NONFRAG_IPV6_SCTP RTE_BIT64(12)
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#define ETH_RSS_NONFRAG_IPV6_OTHER RTE_BIT64(13)
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#define ETH_RSS_L2_PAYLOAD RTE_BIT64(14)
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#define ETH_RSS_IPV6_EX RTE_BIT64(15)
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#define ETH_RSS_IPV6_TCP_EX RTE_BIT64(16)
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#define ETH_RSS_IPV6_UDP_EX RTE_BIT64(17)
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#define ETH_RSS_PORT RTE_BIT64(18)
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#define ETH_RSS_VXLAN RTE_BIT64(19)
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#define ETH_RSS_GENEVE RTE_BIT64(20)
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#define ETH_RSS_NVGRE RTE_BIT64(21)
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#define ETH_RSS_GTPU RTE_BIT64(23)
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#define ETH_RSS_ETH RTE_BIT64(24)
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#define ETH_RSS_S_VLAN RTE_BIT64(25)
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#define ETH_RSS_C_VLAN RTE_BIT64(26)
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#define ETH_RSS_ESP RTE_BIT64(27)
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#define ETH_RSS_AH RTE_BIT64(28)
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#define ETH_RSS_L2TPV3 RTE_BIT64(29)
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#define ETH_RSS_PFCP RTE_BIT64(30)
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#define ETH_RSS_PPPOE RTE_BIT64(31)
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#define ETH_RSS_ECPRI RTE_BIT64(32)
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#define ETH_RSS_MPLS RTE_BIT64(33)
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#define ETH_RSS_IPV4_CHKSUM RTE_BIT64(34)
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/**
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* The ETH_RSS_L4_CHKSUM works on checksum field of any L4 header.
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@ -557,7 +558,7 @@ struct rte_eth_rss_conf {
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* For the case that checksum is not used in an UDP header,
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* it takes the reserved value 0 as input for the hash function.
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*/
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#define ETH_RSS_L4_CHKSUM (1ULL << 35)
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#define ETH_RSS_L4_CHKSUM RTE_BIT64(35)
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/*
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* We use the following macros to combine with above ETH_RSS_* for
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@ -568,12 +569,12 @@ struct rte_eth_rss_conf {
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* the same level are used simultaneously, it is the same case as none of
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* them are added.
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*/
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#define ETH_RSS_L3_SRC_ONLY (1ULL << 63)
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#define ETH_RSS_L3_DST_ONLY (1ULL << 62)
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#define ETH_RSS_L4_SRC_ONLY (1ULL << 61)
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#define ETH_RSS_L4_DST_ONLY (1ULL << 60)
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#define ETH_RSS_L2_SRC_ONLY (1ULL << 59)
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#define ETH_RSS_L2_DST_ONLY (1ULL << 58)
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#define ETH_RSS_L3_SRC_ONLY RTE_BIT64(63)
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#define ETH_RSS_L3_DST_ONLY RTE_BIT64(62)
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#define ETH_RSS_L4_SRC_ONLY RTE_BIT64(61)
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#define ETH_RSS_L4_DST_ONLY RTE_BIT64(60)
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#define ETH_RSS_L2_SRC_ONLY RTE_BIT64(59)
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#define ETH_RSS_L2_DST_ONLY RTE_BIT64(58)
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/*
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* Only select IPV6 address prefix as RSS input set according to
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@ -581,12 +582,12 @@ struct rte_eth_rss_conf {
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* Must be combined with ETH_RSS_IPV6, ETH_RSS_NONFRAG_IPV6_UDP,
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* ETH_RSS_NONFRAG_IPV6_TCP, ETH_RSS_NONFRAG_IPV6_SCTP.
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*/
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#define RTE_ETH_RSS_L3_PRE32 (1ULL << 57)
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#define RTE_ETH_RSS_L3_PRE40 (1ULL << 56)
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#define RTE_ETH_RSS_L3_PRE48 (1ULL << 55)
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#define RTE_ETH_RSS_L3_PRE56 (1ULL << 54)
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#define RTE_ETH_RSS_L3_PRE64 (1ULL << 53)
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#define RTE_ETH_RSS_L3_PRE96 (1ULL << 52)
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#define RTE_ETH_RSS_L3_PRE32 RTE_BIT64(57)
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#define RTE_ETH_RSS_L3_PRE40 RTE_BIT64(56)
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#define RTE_ETH_RSS_L3_PRE48 RTE_BIT64(55)
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#define RTE_ETH_RSS_L3_PRE56 RTE_BIT64(54)
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#define RTE_ETH_RSS_L3_PRE64 RTE_BIT64(53)
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#define RTE_ETH_RSS_L3_PRE96 RTE_BIT64(52)
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/*
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* Use the following macros to combine with the above layers
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@ -1619,7 +1620,7 @@ struct rte_eth_txq_info {
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* by PMD, then the application can iterate to retrieve burst description for
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* all other queues.
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*/
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#define RTE_ETH_BURST_FLAG_PER_QUEUE (1ULL << 0)
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#define RTE_ETH_BURST_FLAG_PER_QUEUE RTE_BIT64(0)
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/**
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* Ethernet device RX/TX queue packet burst mode information structure.
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@ -1711,10 +1712,10 @@ enum rte_eth_fec_mode {
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};
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/* Translate from FEC mode to FEC capa */
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#define RTE_ETH_FEC_MODE_TO_CAPA(x) (1U << (x))
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#define RTE_ETH_FEC_MODE_TO_CAPA(x) RTE_BIT32(x)
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/* This macro indicates FEC capa mask */
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#define RTE_ETH_FEC_MODE_CAPA_MASK(x) (1U << (RTE_ETH_FEC_ ## x))
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#define RTE_ETH_FEC_MODE_CAPA_MASK(x) RTE_BIT32(RTE_ETH_FEC_ ## x)
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/* A structure used to get capabilities per link speed */
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struct rte_eth_fec_capa {
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@ -4870,13 +4871,13 @@ int rte_eth_representor_info_get(uint16_t port_id,
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struct rte_eth_representor_info *info);
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/** The NIC is able to deliver flag (if set) with packets to the PMD. */
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#define RTE_ETH_RX_METADATA_USER_FLAG (UINT64_C(1) << 0)
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#define RTE_ETH_RX_METADATA_USER_FLAG RTE_BIT64(0)
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/** The NIC is able to deliver mark ID with packets to the PMD. */
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#define RTE_ETH_RX_METADATA_USER_MARK (UINT64_C(1) << 1)
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#define RTE_ETH_RX_METADATA_USER_MARK RTE_BIT64(1)
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/** The NIC is able to deliver tunnel ID with packets to the PMD. */
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#define RTE_ETH_RX_METADATA_TUNNEL_ID (UINT64_C(1) << 2)
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#define RTE_ETH_RX_METADATA_TUNNEL_ID RTE_BIT64(2)
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/**
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* @warning
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@ -280,12 +280,12 @@ rte_flow_dynf_metadata_register(void)
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if (flag < 0)
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goto error;
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rte_flow_dynf_metadata_offs = offset;
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rte_flow_dynf_metadata_mask = (1ULL << flag);
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rte_flow_dynf_metadata_mask = RTE_BIT64(flag);
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return 0;
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error:
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rte_flow_dynf_metadata_offs = -1;
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rte_flow_dynf_metadata_mask = 0ULL;
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rte_flow_dynf_metadata_mask = UINT64_C(0);
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return -rte_errno;
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}
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@ -4463,17 +4463,17 @@ struct rte_flow_tunnel {
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/**
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* Indicate that the packet has a tunnel.
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*/
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#define RTE_FLOW_RESTORE_INFO_TUNNEL (1ULL << 0)
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#define RTE_FLOW_RESTORE_INFO_TUNNEL RTE_BIT64(0)
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/**
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* Indicate that the packet has a non decapsulated tunnel header.
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*/
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#define RTE_FLOW_RESTORE_INFO_ENCAPSULATED (1ULL << 1)
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#define RTE_FLOW_RESTORE_INFO_ENCAPSULATED RTE_BIT64(1)
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/**
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* Indicate that the packet has a group_id.
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*/
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#define RTE_FLOW_RESTORE_INFO_GROUP_ID (1ULL << 2)
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#define RTE_FLOW_RESTORE_INFO_GROUP_ID RTE_BIT64(2)
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/**
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* Restore information structure to communicate the current packet processing
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