i40e: queue start and stop
Add functions to start/stop specific RX/TX queue. Support fields start_rx_per_q and start_tx_per_q. In the meanwhile, change dev_start/stop functions to call per-queue functions. Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com> Reviewed-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Reviewed-by: Changchun Ouyang <changchun.ouyang@intel.com> Reviewed-by: Huawei Xie <huawei.xie@intel.com> [Thomas: reword comments and merge 2 patches]
This commit is contained in:
Chen Jing D(Mark)
Thomas Monjalon
parent
5f4ec54f1d
commit
e406719449
@ -236,6 +236,10 @@ static struct eth_dev_ops i40e_eth_dev_ops = {
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.vlan_offload_set = i40e_vlan_offload_set,
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.vlan_strip_queue_set = i40e_vlan_strip_queue_set,
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.vlan_pvid_set = i40e_vlan_pvid_set,
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.rx_queue_start = i40e_dev_rx_queue_start,
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.rx_queue_stop = i40e_dev_rx_queue_stop,
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.tx_queue_start = i40e_dev_tx_queue_start,
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.tx_queue_stop = i40e_dev_tx_queue_stop,
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.rx_queue_setup = i40e_dev_rx_queue_setup,
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.rx_queue_release = i40e_dev_rx_queue_release,
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.rx_queue_count = i40e_dev_rx_queue_count,
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@ -801,7 +805,6 @@ i40e_dev_start(struct rte_eth_dev *dev)
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err_up:
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i40e_vsi_switch_queues(vsi, FALSE);
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i40e_dev_clear_queues(dev);
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return ret;
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}
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@ -815,9 +818,6 @@ i40e_dev_stop(struct rte_eth_dev *dev)
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/* Disable all queues */
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i40e_vsi_switch_queues(vsi, FALSE);
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/* Clear all queues and release memory */
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i40e_dev_clear_queues(dev);
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/* Set link down */
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i40e_dev_set_link_down(dev);
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@ -3005,17 +3005,21 @@ static int
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i40e_vsi_switch_tx_queues(struct i40e_vsi *vsi, bool on)
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{
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struct rte_eth_dev_data *dev_data = I40E_VSI_TO_DEV_DATA(vsi);
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struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
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struct i40e_tx_queue *txq;
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uint16_t i, pf_q;
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struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);
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uint16_t i;
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int ret;
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pf_q = vsi->base_queue;
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for (i = 0; i < dev_data->nb_tx_queues; i++, pf_q++) {
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for (i = 0; i < dev_data->nb_tx_queues; i++) {
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txq = dev_data->tx_queues[i];
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if (!txq->q_set)
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continue; /* Queue not configured */
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ret = i40e_switch_tx_queue(hw, pf_q, on);
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/* Don't operate the queue if not configured or
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* if starting only per queue */
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if (!txq->q_set || (on && txq->start_tx_per_q))
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continue;
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if (on)
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ret = i40e_dev_tx_queue_start(dev, i);
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else
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ret = i40e_dev_tx_queue_stop(dev, i);
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if ( ret != I40E_SUCCESS)
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return ret;
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}
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@ -3079,18 +3083,22 @@ static int
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i40e_vsi_switch_rx_queues(struct i40e_vsi *vsi, bool on)
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{
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struct rte_eth_dev_data *dev_data = I40E_VSI_TO_DEV_DATA(vsi);
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struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
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struct i40e_rx_queue *rxq;
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uint16_t i, pf_q;
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struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);
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uint16_t i;
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int ret;
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pf_q = vsi->base_queue;
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for (i = 0; i < dev_data->nb_rx_queues; i++, pf_q++) {
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for (i = 0; i < dev_data->nb_rx_queues; i++) {
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rxq = dev_data->rx_queues[i];
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if (!rxq->q_set)
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continue; /* Queue not configured */
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ret = i40e_switch_rx_queue(hw, pf_q, on);
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if ( ret != I40E_SUCCESS)
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/* Don't operate the queue if not configured or
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* if starting only per queue */
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if (!rxq->q_set || (on && rxq->start_rx_per_q))
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continue;
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if (on)
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ret = i40e_dev_rx_queue_start(dev, i);
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else
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ret = i40e_dev_rx_queue_stop(dev, i);
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if (ret != I40E_SUCCESS)
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return ret;
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}
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@ -88,9 +88,6 @@ i40e_ring_dma_zone_reserve(struct rte_eth_dev *dev,
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uint16_t queue_id,
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uint32_t ring_size,
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int socket_id);
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static void i40e_reset_rx_queue(struct i40e_rx_queue *rxq);
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static void i40e_reset_tx_queue(struct i40e_tx_queue *txq);
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static void i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq);
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static uint16_t i40e_xmit_pkts_simple(void *tx_queue,
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struct rte_mbuf **tx_pkts,
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uint16_t nb_pkts);
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@ -1428,6 +1425,118 @@ i40e_xmit_pkts_simple(void *tx_queue,
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return nb_tx;
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}
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int
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i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
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{
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struct i40e_vsi *vsi = I40E_DEV_PRIVATE_TO_VSI(dev->data->dev_private);
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struct i40e_rx_queue *rxq;
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int err = -1;
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struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
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uint16_t q_base = vsi->base_queue;
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PMD_INIT_FUNC_TRACE();
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if (rx_queue_id < dev->data->nb_rx_queues) {
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rxq = dev->data->rx_queues[rx_queue_id];
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err = i40e_alloc_rx_queue_mbufs(rxq);
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if (err) {
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PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf\n");
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return err;
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}
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rte_wmb();
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/* Init the RX tail regieter. */
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I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
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err = i40e_switch_rx_queue(hw, rx_queue_id + q_base, TRUE);
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if (err) {
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PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on\n",
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rx_queue_id);
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i40e_rx_queue_release_mbufs(rxq);
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i40e_reset_rx_queue(rxq);
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}
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}
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return err;
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}
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int
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i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
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{
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struct i40e_vsi *vsi = I40E_DEV_PRIVATE_TO_VSI(dev->data->dev_private);
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struct i40e_rx_queue *rxq;
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int err;
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struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
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uint16_t q_base = vsi->base_queue;
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if (rx_queue_id < dev->data->nb_rx_queues) {
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rxq = dev->data->rx_queues[rx_queue_id];
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err = i40e_switch_rx_queue(hw, rx_queue_id + q_base, FALSE);
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if (err) {
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PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off\n",
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rx_queue_id);
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return err;
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}
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i40e_rx_queue_release_mbufs(rxq);
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i40e_reset_rx_queue(rxq);
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}
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return 0;
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}
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int
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i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
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{
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struct i40e_vsi *vsi = I40E_DEV_PRIVATE_TO_VSI(dev->data->dev_private);
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int err = -1;
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struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
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uint16_t q_base = vsi->base_queue;
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PMD_INIT_FUNC_TRACE();
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if (tx_queue_id < dev->data->nb_tx_queues) {
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err = i40e_switch_tx_queue(hw, tx_queue_id + q_base, TRUE);
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if (err)
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PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on\n",
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tx_queue_id);
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}
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return err;
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}
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int
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i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
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{
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struct i40e_vsi *vsi = I40E_DEV_PRIVATE_TO_VSI(dev->data->dev_private);
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struct i40e_tx_queue *txq;
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int err;
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struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
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uint16_t q_base = vsi->base_queue;
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if (tx_queue_id < dev->data->nb_tx_queues) {
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txq = dev->data->tx_queues[tx_queue_id];
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err = i40e_switch_tx_queue(hw, tx_queue_id + q_base, FALSE);
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if (err) {
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PMD_DRV_LOG(ERR, "Failed to switch TX queue %u of\n",
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tx_queue_id);
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return err;
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}
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i40e_tx_queue_release_mbufs(txq);
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i40e_reset_tx_queue(txq);
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}
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return 0;
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}
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int
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i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
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uint16_t queue_idx,
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@ -1482,6 +1591,7 @@ i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
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0 : ETHER_CRC_LEN);
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rxq->drop_en = rx_conf->rx_drop_en;
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rxq->vsi = vsi;
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rxq->start_rx_per_q = rx_conf->start_rx_per_q;
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/* Allocate the maximun number of RX ring hardware descriptor. */
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ring_size = sizeof(union i40e_rx_desc) * I40E_MAX_RING_DESC;
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@ -1767,6 +1877,7 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
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txq->port_id = dev->data->port_id;
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txq->txq_flags = tx_conf->txq_flags;
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txq->vsi = vsi;
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txq->start_tx_per_q = tx_conf->start_tx_per_q;
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#ifdef RTE_LIBRTE_XEN_DOM0
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txq->tx_ring_phys_addr = rte_mem_phy2mch(tz->memseg_id, tz->phys_addr);
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@ -1874,7 +1985,7 @@ i40e_rx_queue_release_mbufs(struct i40e_rx_queue *rxq)
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#endif /* RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC */
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}
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static void
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void
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i40e_reset_rx_queue(struct i40e_rx_queue *rxq)
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{
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unsigned i;
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@ -1905,7 +2016,7 @@ i40e_reset_rx_queue(struct i40e_rx_queue *rxq)
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rxq->pkt_last_seg = NULL;
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}
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static void
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void
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i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq)
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{
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uint16_t i;
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@ -1923,7 +2034,7 @@ i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq)
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}
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}
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static void
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void
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i40e_reset_tx_queue(struct i40e_tx_queue *txq)
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{
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struct i40e_tx_entry *txe;
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@ -2161,7 +2272,7 @@ i40e_rx_queue_init(struct i40e_rx_queue *rxq)
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}
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rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
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err = i40e_alloc_rx_queue_mbufs(rxq);
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mbp_priv = rte_mempool_get_priv(rxq->mp);
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buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
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RTE_PKTMBUF_HEADROOM);
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@ -2172,16 +2283,10 @@ i40e_rx_queue_init(struct i40e_rx_queue *rxq)
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dev->rx_pkt_burst = i40e_recv_scattered_pkts;
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}
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rte_wmb();
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/* Init the RX tail regieter. */
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I40E_PCI_REG_WRITE(rxq->qrx_tail, 0);
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I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
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if (err)
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PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf\n");
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return err;
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return 0;
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}
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void
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@ -112,6 +112,7 @@ struct i40e_rx_queue {
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uint16_t max_pkt_len; /* Maximum packet length */
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uint8_t hs_mode; /* Header Split mode */
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bool q_set; /**< indicate if rx queue has been configured */
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bool start_rx_per_q; /**< don't start this queue in dev start */
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};
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struct i40e_tx_entry {
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@ -150,8 +151,13 @@ struct i40e_tx_queue {
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uint16_t tx_next_dd;
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uint16_t tx_next_rs;
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bool q_set; /**< indicate if tx queue has been configured */
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bool start_tx_per_q; /**< don't start this queue in dev start */
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};
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int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
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int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
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int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
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int i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
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int i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
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uint16_t queue_idx,
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uint16_t nb_desc,
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@ -179,6 +185,9 @@ int i40e_rx_queue_init(struct i40e_rx_queue *rxq);
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void i40e_free_tx_resources(struct i40e_tx_queue *txq);
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void i40e_free_rx_resources(struct i40e_rx_queue *rxq);
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void i40e_dev_clear_queues(struct rte_eth_dev *dev);
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void i40e_reset_rx_queue(struct i40e_rx_queue *rxq);
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void i40e_reset_tx_queue(struct i40e_tx_queue *txq);
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void i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq);
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int i40e_alloc_rx_queue_mbufs(struct i40e_rx_queue *rxq);
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void i40e_rx_queue_release_mbufs(struct i40e_rx_queue *rxq);
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