ixgbe/base: support X550em_x V2 device
Only x550em_x V1 was supported before. Now V2 is supported. A mask for V1 and V2 is defined and used to support both. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
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@ -100,6 +100,11 @@ This section should contain new features added in this release. Sample format:
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Added new X550EM_a devices and their mac types, X550EM_a and X550EM_a_vf.
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Updated the code to use the new devices and mac types.
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* **Added x550em_x V2 device support.**
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Only x550em_x V1 was supported before. Now V2 is supported.
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A mask for V1 and V2 is defined and used to support both.
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* **Enabled PCI extended tag for i40e.**
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It enabled extended tag by checking and writing corresponding PCI config
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@ -4044,7 +4044,7 @@ struct ixgbe_hw {
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#define IXGBE_FUSES0_GROUP(_i) (0x11158 + ((_i) * 4))
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#define IXGBE_FUSES0_300MHZ (1 << 5)
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#define IXGBE_FUSES0_REV1 (1 << 6)
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#define IXGBE_FUSES0_REV_MASK (3 << 6)
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#define IXGBE_KRM_PORT_CAR_GEN_CTRL(P) ((P) ? 0x8010 : 0x4010)
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#define IXGBE_KRM_LINK_CTRL_1(P) ((P) ? 0x820C : 0x420C)
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@ -658,7 +658,6 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
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u16 autoneg_eee_reg;
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u32 link_reg;
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s32 status;
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u32 fuse;
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DEBUGFUNC("ixgbe_setup_eee_X550");
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@ -679,9 +678,10 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
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hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_EEE_ADVT,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_eee_reg);
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} else if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) {
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/* Not supported on first revision. */
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fuse = IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0));
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if (!(fuse & IXGBE_FUSES0_REV1))
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/* Not supported on first revision of X550EM_x. */
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if ((hw->mac.type == ixgbe_mac_X550EM_x) &&
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!(IXGBE_FUSES0_REV_MASK &
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IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))
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return IXGBE_SUCCESS;
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status = ixgbe_read_iosf_sb_reg_x550(hw,
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@ -1602,9 +1602,10 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
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phy->ops.setup_internal_link =
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ixgbe_setup_internal_phy_t_x550em;
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/* setup SW LPLU only for first revision */
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if (!(IXGBE_FUSES0_REV1 & IXGBE_READ_REG(hw,
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IXGBE_FUSES0_GROUP(0))))
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/* setup SW LPLU only for first revision of X550EM_x */
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if ((hw->mac.type == ixgbe_mac_X550EM_x) &&
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!(IXGBE_FUSES0_REV_MASK &
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IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))
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phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;
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phy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em;
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@ -2808,7 +2809,9 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
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bool link_up;
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/* SW LPLU not required on later HW revisions. */
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if (IXGBE_FUSES0_REV1 & IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0)))
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if ((hw->mac.type == ixgbe_mac_X550EM_x) &&
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(IXGBE_FUSES0_REV_MASK &
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IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))
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return IXGBE_SUCCESS;
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/* If blocked by MNG FW, then don't restart AN */
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