net/liquidio/base: read and write register

Signed-off-by: Shijith Thotton <shijith.thotton@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Derek Chickles <derek.chickles@caviumnetworks.com>
Signed-off-by: Venkat Koppula <venkat.koppula@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Mallesham Jatharakonda <mjatharakonda@oneconvergence.com>
This commit is contained in:
Shijith Thotton 2017-03-25 11:54:16 +05:30 committed by Ferruh Yigit
parent 254387db6d
commit e7f2f7127e

View File

@ -34,6 +34,8 @@
#ifndef _LIO_HW_DEFS_H_
#define _LIO_HW_DEFS_H_
#include <rte_io.h>
#ifndef PCI_VENDOR_ID_CAVIUM
#define PCI_VENDOR_ID_CAVIUM 0x177D
#endif
@ -41,4 +43,69 @@
#define LIO_CN23XX_VF_VID 0x9712
#define LIO_DEVICE_NAME_LEN 32
/* Routines for reading and writing CSRs */
#ifdef RTE_LIBRTE_LIO_DEBUG_REGS
#define lio_write_csr(lio_dev, reg_off, value) \
do { \
typeof(lio_dev) _dev = lio_dev; \
typeof(reg_off) _reg_off = reg_off; \
typeof(value) _value = value; \
PMD_REGS_LOG(_dev, \
"Write32: Reg: 0x%08lx Val: 0x%08lx\n", \
(unsigned long)_reg_off, \
(unsigned long)_value); \
rte_write32(_value, _dev->hw_addr + _reg_off); \
} while (0)
#define lio_write_csr64(lio_dev, reg_off, val64) \
do { \
typeof(lio_dev) _dev = lio_dev; \
typeof(reg_off) _reg_off = reg_off; \
typeof(val64) _val64 = val64; \
PMD_REGS_LOG( \
_dev, \
"Write64: Reg: 0x%08lx Val: 0x%016llx\n", \
(unsigned long)_reg_off, \
(unsigned long long)_val64); \
rte_write64(_val64, _dev->hw_addr + _reg_off); \
} while (0)
#define lio_read_csr(lio_dev, reg_off) \
({ \
typeof(lio_dev) _dev = lio_dev; \
typeof(reg_off) _reg_off = reg_off; \
uint32_t val = rte_read32(_dev->hw_addr + _reg_off); \
PMD_REGS_LOG(_dev, \
"Read32: Reg: 0x%08lx Val: 0x%08lx\n", \
(unsigned long)_reg_off, \
(unsigned long)val); \
val; \
})
#define lio_read_csr64(lio_dev, reg_off) \
({ \
typeof(lio_dev) _dev = lio_dev; \
typeof(reg_off) _reg_off = reg_off; \
uint64_t val64 = rte_read64(_dev->hw_addr + _reg_off); \
PMD_REGS_LOG( \
_dev, \
"Read64: Reg: 0x%08lx Val: 0x%016llx\n", \
(unsigned long)_reg_off, \
(unsigned long long)val64); \
val64; \
})
#else
#define lio_write_csr(lio_dev, reg_off, value) \
rte_write32(value, (lio_dev)->hw_addr + (reg_off))
#define lio_write_csr64(lio_dev, reg_off, val64) \
rte_write64(val64, (lio_dev)->hw_addr + (reg_off))
#define lio_read_csr(lio_dev, reg_off) \
rte_read32((lio_dev)->hw_addr + (reg_off))
#define lio_read_csr64(lio_dev, reg_off) \
rte_read64((lio_dev)->hw_addr + (reg_off))
#endif
#endif /* _LIO_HW_DEFS_H_ */