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eal/x86: define I/O device memory barriers

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The patch does not provide any functional change for IA.
I/O barriers are mapped to existing smp barriers.

CC: Bruce Richardson <bruce.richardson@intel.com>
CC: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
This commit is contained in:
Jerin Jacob 2017-01-18 06:51:15 +05:30 committed by Thomas Monjalon
parent 1ea155733e
commit e802521171
1 changed files with 6 additions and 0 deletions
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6
lib/librte_eal/common/include/arch/x86/rte_atomic.h
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@ -61,6 +61,12 @@ extern "C" {
#define rte_smp_rmb() rte_compiler_barrier()
#define rte_io_mb() rte_mb()
#define rte_io_wmb() rte_compiler_barrier()
#define rte_io_rmb() rte_compiler_barrier()
/*------------------------- 16 bit atomic operations -------------------------*/
#ifndef RTE_FORCE_INTRINSICS