eal/x86: fix memcpy AVX-512 enablement
When testing on some x86 platforms, code compiled with meson was observed running at a different power-license level to that compiled with make. This is due to the fact that meson auto-detects the instruction sets available on the system and enabled AVX512 rte_memcpy when AVX512 was available, while on make, a build time AVX-512 flag needed to be explicitly set to enable that AVX512 rte_memcpy code path. In the absence of runtime path selection for rte_memcpy - which is complicated by it being a static inline function in a header file - we can fix this behaviour regression by similarly having a build-time option which must be set to enable the AVX-512 memcpy path. Fixes:a25a650be5
("build: add infrastructure for meson and ninja builds") Fixes:3e1bb55fd6
("build/x86: add SSE flags") Cc: stable@dpdk.org Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Tested-by: Yingya Han <yingyax.han@intel.com>
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@ -95,6 +95,10 @@ rte_mov256(uint8_t *dst, const uint8_t *src);
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* @note This is implemented as a macro, so it's address should not be taken
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* and care is needed as parameter expressions may be evaluated multiple times.
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*
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* @note For x86 platforms to enable the AVX-512 memcpy implementation, set
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* -DRTE_MEMCPY_AVX512 macro in CFLAGS, or define the RTE_MEMCPY_AVX512 macro
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* explicitly in the source file before including the rte_memcpy header file.
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*
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* @param dst
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* Pointer to the destination of the data.
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* @param src
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@ -45,7 +45,7 @@ extern "C" {
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static __rte_always_inline void *
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rte_memcpy(void *dst, const void *src, size_t n);
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#ifdef __AVX512F__
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#if defined __AVX512F__ && defined RTE_MEMCPY_AVX512
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#define ALIGNMENT_MASK 0x3F
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