igb/ixgbe: fix index overflow when resetting big queues
Rings are resetted with a loop because memset cannot be used without
issuing a warning about volatile casting.
The index of the loop was a 16-bit variable which is sufficient for
ring entries number but not for the byte size of the whole ring.
The overflow happens when rings are configured for 4096 entries
(descriptor size is 16 bytes). The result is an endless loop.
It is fixed by indexing ring entries and resetting all bytes of the entry
with a simple assignment.
The descriptor initializer is zeroed thanks to its static declaration.
There already was a fix for ixgbe Tx only
(commit bcf457f8c0
).
It is reverted to use the same fix everywhere (Rx/Tx for igb/ixgbe).
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
This commit is contained in:
parent
06bea48c36
commit
e8ae856140
@ -1134,16 +1134,15 @@ igb_reset_tx_queue_stat(struct igb_tx_queue *txq)
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static void
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igb_reset_tx_queue(struct igb_tx_queue *txq, struct rte_eth_dev *dev)
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{
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static const union e1000_adv_tx_desc zeroed_desc;
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struct igb_tx_entry *txe = txq->sw_ring;
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uint32_t size;
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uint16_t i, prev;
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struct e1000_hw *hw;
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hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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size = sizeof(union e1000_adv_tx_desc) * txq->nb_tx_desc;
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/* Zero out HW ring memory */
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for (i = 0; i < size; i++) {
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((volatile char *)txq->tx_ring)[i] = 0;
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for (i = 0; i < txq->nb_tx_desc; i++) {
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txq->tx_ring[i] = zeroed_desc;
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}
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/* Initialize ring entries */
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@ -1295,13 +1294,12 @@ eth_igb_rx_queue_release(void *rxq)
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static void
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igb_reset_rx_queue(struct igb_rx_queue *rxq)
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{
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unsigned size;
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static const union e1000_adv_rx_desc zeroed_desc;
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unsigned i;
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/* Zero out HW ring memory */
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size = sizeof(union e1000_adv_rx_desc) * rxq->nb_rx_desc;
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for (i = 0; i < size; i++) {
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((volatile char *)rxq->rx_ring)[i] = 0;
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for (i = 0; i < rxq->nb_rx_desc; i++) {
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rxq->rx_ring[i] = zeroed_desc;
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}
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rxq->rx_tail = 0;
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@ -1797,13 +1797,13 @@ ixgbe_dev_tx_queue_release(void *txq)
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static void
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ixgbe_reset_tx_queue(struct igb_tx_queue *txq)
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{
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static const union ixgbe_adv_tx_desc zeroed_desc;
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struct igb_tx_entry *txe = txq->sw_ring;
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uint16_t prev;
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uint32_t i;
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uint16_t prev, i;
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/* Zero out HW ring memory */
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for (i = 0; i < sizeof(union ixgbe_adv_tx_desc) * txq->nb_tx_desc; i++) {
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((volatile char *)txq->tx_ring)[i] = 0;
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for (i = 0; i < txq->nb_tx_desc; i++) {
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txq->tx_ring[i] = zeroed_desc;
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}
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/* Initialize SW ring entries */
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@ -1812,9 +1812,9 @@ ixgbe_reset_tx_queue(struct igb_tx_queue *txq)
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volatile union ixgbe_adv_tx_desc *txd = &txq->tx_ring[i];
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txd->wb.status = IXGBE_TXD_STAT_DD;
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txe[i].mbuf = NULL;
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txe[i].last_id = (uint16_t)i;
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txe[prev].next_id = (uint16_t)i;
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prev = (uint16_t)i;
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txe[i].last_id = i;
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txe[prev].next_id = i;
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prev = i;
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}
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txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
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@ -2092,6 +2092,7 @@ check_rx_burst_bulk_alloc_preconditions(__rte_unused struct igb_rx_queue *rxq)
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static void
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ixgbe_reset_rx_queue(struct igb_rx_queue *rxq)
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{
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static const union ixgbe_adv_rx_desc zeroed_desc;
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unsigned i;
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uint16_t len;
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@ -2119,8 +2120,8 @@ ixgbe_reset_rx_queue(struct igb_rx_queue *rxq)
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* the H/W ring so look-ahead logic in Rx Burst bulk alloc function
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* reads extra memory as zeros.
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*/
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for (i = 0; i < len * sizeof(union ixgbe_adv_rx_desc); i++) {
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((volatile char *)rxq->rx_ring)[i] = 0;
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for (i = 0; i < len; i++) {
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rxq->rx_ring[i] = zeroed_desc;
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}
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#ifdef RTE_LIBRTE_IXGBE_RX_ALLOW_BULK_ALLOC
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