common/cnxk: set MTU size on SDP based on SoC type

Set maximum frame size on SDP NIX side to 16KB for CN93 A0 and B0,
CNF95N A0 and CNF95O A0 SOC type. Rest of the SoCs SDP NIX to 64KB.

Signed-off-by: Sathesh Edara <sedara@marvell.com>
This commit is contained in:
Sathesh Edara 2022-10-14 11:13:05 +05:30 committed by Jerin Jacob
parent b7d3a0fe71
commit e98f583129
4 changed files with 25 additions and 1 deletions

View File

@ -2118,6 +2118,7 @@ struct nix_lso_format {
#define NIX_CN9K_MAX_HW_FRS 9212UL
#define NIX_LBK_MAX_HW_FRS 65535UL
#define NIX_SDP_MAX_HW_FRS 65535UL
#define NIX_SDP_16K_HW_FRS 16380UL
#define NIX_RPM_MAX_HW_FRS 16380UL
#define NIX_MIN_HW_FRS 60UL

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@ -90,4 +90,12 @@ roc_errata_nix_no_meta_aura(void)
return roc_model_is_cn10ka_a0();
}
/* Errata IPBUNIXTX-35039 */
static inline bool
roc_errata_nix_sdp_send_has_mtu_size_16k(void)
{
return (roc_model_is_cnf95xxn_a0() || roc_model_is_cnf95xxo_a0() ||
roc_model_is_cn96_a0() || roc_model_is_cn96_b0());
}
#endif /* _ROC_ERRATA_H_ */

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@ -140,6 +140,12 @@ roc_model_is_cn96_ax(void)
return (roc_model->flag & ROC_MODEL_CN96xx_Ax);
}
static inline uint64_t
roc_model_is_cn96_b0(void)
{
return (roc_model->flag & ROC_MODEL_CN96xx_B0);
}
static inline uint64_t
roc_model_is_cn96_cx(void)
{
@ -170,6 +176,12 @@ roc_model_is_cnf95xxn_b0(void)
return roc_model->flag & ROC_MODEL_CNF95xxN_B0;
}
static inline uint64_t
roc_model_is_cnf95xxo_a0(void)
{
return roc_model->flag & ROC_MODEL_CNF95xxO_A0;
}
static inline uint16_t
roc_model_is_cn95xxn_a0(void)
{

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@ -127,8 +127,11 @@ roc_nix_max_pkt_len(struct roc_nix *roc_nix)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
if (roc_nix_is_sdp(roc_nix))
if (roc_nix_is_sdp(roc_nix)) {
if (roc_errata_nix_sdp_send_has_mtu_size_16k())
return NIX_SDP_16K_HW_FRS;
return NIX_SDP_MAX_HW_FRS;
}
if (roc_model_is_cn9k())
return NIX_CN9K_MAX_HW_FRS;