ixgbe: fix RSC disabling bit
Signed-off-by: Intel
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@ -1930,7 +1930,7 @@ enum {
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#define IXGBE_RFCTL_ISCSI_DIS 0x00000001
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#define IXGBE_RFCTL_ISCSI_DWC_MASK 0x0000003E
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#define IXGBE_RFCTL_ISCSI_DWC_SHIFT 1
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#define IXGBE_RFCTL_RSC_DIS 0x00000010
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#define IXGBE_RFCTL_RSC_DIS 0x00000020
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#define IXGBE_RFCTL_NFSW_DIS 0x00000040
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#define IXGBE_RFCTL_NFSR_DIS 0x00000080
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#define IXGBE_RFCTL_NFS_VER_MASK 0x00000300
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