net/cxgbe: parse and validate flows
Introduce rte_flow skeleton and implement validate operation. Parse and convert <item>, <action>, <attributes> into hardware specification. Perform validation, including basic sanity tests and underlying device's supported filter capability checks. Currently add support for: <item>: IPv4, IPv6, TCP, and UDP. <action>: Drop, Queue, and Count. Also add sanity checks to ensure filters are created at specified index in LE-TCAM region. The index in LE-TCAM region indicates the filter rule's priority with index 0 having the highest priority. If no index is specified, filters are created at closest available free index. Signed-off-by: Shagun Agrawal <shaguna@chelsio.com> Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
This commit is contained in:
Shagun Agrawal
Ferruh Yigit
parent
6f2a064bef
commit
ee61f5113b
@ -30,6 +30,7 @@ CXGBE and CXGBEVF PMD has support for:
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- All multicast mode
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- Port hardware statistics
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- Jumbo frames
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- Flow API
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Limitations
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-----------
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@ -16,6 +16,7 @@ Allmulticast mode = Y
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RSS hash = Y
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RSS key update = Y
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Flow control = Y
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Flow API = Y
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CRC offload = Y
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VLAN offload = Y
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L3 checksum offload = Y
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@ -41,6 +41,11 @@ New Features
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Also, make sure to start the actual text at the margin.
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=========================================================
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* **Added Flow API support for CXGBE PMD.**
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Flow API support has been added to CXGBE Poll Mode Driver to offload
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flows to Chelsio T5/T6 NICs.
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API Changes
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-----------
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@ -49,6 +49,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbevf_ethdev.c
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SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbe_main.c
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SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbevf_main.c
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SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += sge.c
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SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbe_filter.c
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SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbe_flow.c
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SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += t4_hw.c
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SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += t4vf_hw.c
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@ -312,6 +312,17 @@ struct adapter {
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struct tid_info tids; /* Info used to access TID related tables */
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};
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/**
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* ethdev2pinfo - return the port_info structure associated with a rte_eth_dev
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* @dev: the rte_eth_dev
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*
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* Return the struct port_info associated with a rte_eth_dev
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*/
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static inline struct port_info *ethdev2pinfo(const struct rte_eth_dev *dev)
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{
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return (struct port_info *)dev->data->dev_private;
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}
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/**
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* adap2pinfo - return the port_info of a port
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* @adap: the adapter
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@ -324,6 +335,17 @@ static inline struct port_info *adap2pinfo(const struct adapter *adap, int idx)
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return adap->port[idx];
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}
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/**
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* ethdev2adap - return the adapter structure associated with a rte_eth_dev
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* @dev: the rte_eth_dev
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*
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* Return the struct adapter associated with a rte_eth_dev
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*/
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static inline struct adapter *ethdev2adap(const struct rte_eth_dev *dev)
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{
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return ethdev2pinfo(dev)->adapter;
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}
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#define CXGBE_PCI_REG(reg) rte_read32(reg)
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static inline uint64_t cxgbe_read_addr64(volatile void *addr)
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@ -36,6 +36,7 @@
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#include "cxgbe.h"
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#include "cxgbe_pfvf.h"
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#include "cxgbe_flow.h"
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/*
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* Macros needed to support the PCI Device ID Table ...
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@ -1036,6 +1037,7 @@ static const struct eth_dev_ops cxgbe_eth_dev_ops = {
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.rx_queue_start = cxgbe_dev_rx_queue_start,
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.rx_queue_stop = cxgbe_dev_rx_queue_stop,
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.rx_queue_release = cxgbe_dev_rx_queue_release,
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.filter_ctrl = cxgbe_dev_filter_ctrl,
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.stats_get = cxgbe_dev_stats_get,
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.stats_reset = cxgbe_dev_stats_reset,
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.flow_ctrl_get = cxgbe_flow_ctrl_get,
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77
drivers/net/cxgbe/cxgbe_filter.c
Normal file
77
drivers/net/cxgbe/cxgbe_filter.c
Normal file
@ -0,0 +1,77 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Chelsio Communications.
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* All rights reserved.
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*/
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#include "common.h"
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#include "t4_regs.h"
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#include "cxgbe_filter.h"
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/**
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* Validate if the requested filter specification can be set by checking
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* if the requested features have been enabled
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*/
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int validate_filter(struct adapter *adapter, struct ch_filter_specification *fs)
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{
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u32 fconf;
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/*
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* Check for unconfigured fields being used.
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*/
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fconf = adapter->params.tp.vlan_pri_map;
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#define S(_field) \
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(fs->val._field || fs->mask._field)
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#define U(_mask, _field) \
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(!(fconf & (_mask)) && S(_field))
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if (U(F_ETHERTYPE, ethtype) || U(F_PROTOCOL, proto))
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return -EOPNOTSUPP;
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#undef S
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#undef U
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return 0;
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}
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/**
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* Check if entry already filled.
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*/
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bool is_filter_set(struct tid_info *t, int fidx, int family)
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{
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bool result = FALSE;
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int i, max;
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/* IPv6 requires four slots and IPv4 requires only 1 slot.
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* Ensure, there's enough slots available.
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*/
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max = family == FILTER_TYPE_IPV6 ? fidx + 3 : fidx;
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t4_os_lock(&t->ftid_lock);
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for (i = fidx; i <= max; i++) {
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if (rte_bitmap_get(t->ftid_bmap, i)) {
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result = TRUE;
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break;
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}
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}
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t4_os_unlock(&t->ftid_lock);
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return result;
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}
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/**
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* Allocate a available free entry
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*/
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int cxgbe_alloc_ftid(struct adapter *adap, unsigned int family)
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{
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struct tid_info *t = &adap->tids;
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int pos;
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int size = t->nftids;
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t4_os_lock(&t->ftid_lock);
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if (family == FILTER_TYPE_IPV6)
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pos = cxgbe_bitmap_find_free_region(t->ftid_bmap, size, 4);
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else
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pos = cxgbe_find_first_zero_bit(t->ftid_bmap, size);
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t4_os_unlock(&t->ftid_lock);
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return pos < size ? pos : -1;
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}
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@ -77,21 +77,112 @@ struct ch_filter_tuple {
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* Filter specification
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*/
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struct ch_filter_specification {
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/* Administrative fields for filter. */
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uint32_t hitcnts:1; /* count filter hits in TCB */
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uint32_t prio:1; /* filter has priority over active/server */
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/*
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* Fundamental filter typing. This is the one element of filter
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* matching that doesn't exist as a (value, mask) tuple.
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*/
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uint32_t type:1; /* 0 => IPv4, 1 => IPv6 */
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/*
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* Packet dispatch information. Ingress packets which match the
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* filter rules will be dropped, passed to the host or switched back
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* out as egress packets.
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*/
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uint32_t action:2; /* drop, pass, switch */
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uint32_t dirsteer:1; /* 0 => RSS, 1 => steer to iq */
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uint32_t iq:10; /* ingress queue */
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/* Filter rule value/mask pairs. */
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struct ch_filter_tuple val;
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struct ch_filter_tuple mask;
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};
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enum {
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FILTER_PASS = 0, /* default */
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FILTER_DROP
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};
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enum filter_type {
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FILTER_TYPE_IPV4 = 0,
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FILTER_TYPE_IPV6,
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};
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/*
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* Host shadow copy of ingress filter entry. This is in host native format
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* and doesn't match the ordering or bit order, etc. of the hardware or the
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* firmware command.
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*/
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struct filter_entry {
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struct rte_eth_dev *dev; /* Port's rte eth device */
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/*
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* The filter itself.
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*/
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struct ch_filter_specification fs;
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};
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#define FILTER_ID_MAX (~0U)
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struct tid_info;
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struct adapter;
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/**
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* Find first clear bit in the bitmap.
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*/
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static inline unsigned int cxgbe_find_first_zero_bit(struct rte_bitmap *bmap,
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unsigned int size)
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{
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unsigned int idx;
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for (idx = 0; idx < size; idx++)
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if (!rte_bitmap_get(bmap, idx))
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break;
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return idx;
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}
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/**
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* Find a free region of 'num' consecutive entries.
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*/
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static inline unsigned int
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cxgbe_bitmap_find_free_region(struct rte_bitmap *bmap, unsigned int size,
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unsigned int num)
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{
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unsigned int idx, j, free = 0;
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if (num > size)
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return size;
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for (idx = 0; idx < size; idx += num) {
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for (j = 0; j < num; j++) {
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if (!rte_bitmap_get(bmap, idx + j)) {
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free++;
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} else {
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free = 0;
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break;
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}
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}
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/* Found the Region */
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if (free == num)
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break;
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/* Reached the end and still no region found */
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if ((idx + num) > size) {
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idx = size;
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break;
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}
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}
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return idx;
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}
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bool is_filter_set(struct tid_info *, int fidx, int family);
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int cxgbe_alloc_ftid(struct adapter *adap, unsigned int family);
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int validate_filter(struct adapter *adap, struct ch_filter_specification *fs);
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#endif /* _CXGBE_FILTER_H_ */
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473
drivers/net/cxgbe/cxgbe_flow.c
Normal file
473
drivers/net/cxgbe/cxgbe_flow.c
Normal file
@ -0,0 +1,473 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Chelsio Communications.
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* All rights reserved.
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*/
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#include "common.h"
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#include "cxgbe_flow.h"
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#define __CXGBE_FILL_FS(__v, __m, fs, elem, e) \
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do { \
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if (!((fs)->val.elem || (fs)->mask.elem)) { \
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(fs)->val.elem = (__v); \
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(fs)->mask.elem = (__m); \
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} else { \
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return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, \
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NULL, "a filter can be specified" \
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" only once"); \
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} \
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} while (0)
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#define __CXGBE_FILL_FS_MEMCPY(__v, __m, fs, elem) \
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do { \
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memcpy(&(fs)->val.elem, &(__v), sizeof(__v)); \
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memcpy(&(fs)->mask.elem, &(__m), sizeof(__m)); \
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} while (0)
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#define CXGBE_FILL_FS(v, m, elem) \
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__CXGBE_FILL_FS(v, m, fs, elem, e)
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#define CXGBE_FILL_FS_MEMCPY(v, m, elem) \
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__CXGBE_FILL_FS_MEMCPY(v, m, fs, elem)
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static int
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cxgbe_validate_item(const struct rte_flow_item *i, struct rte_flow_error *e)
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{
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/* rte_flow specification does not allow it. */
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if (!i->spec && (i->mask || i->last))
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return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM,
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i, "last or mask given without spec");
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/*
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* We don't support it.
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* Although, we can support values in last as 0's or last == spec.
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* But this will not provide user with any additional functionality
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* and will only increase the complexity for us.
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*/
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if (i->last)
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return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
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i, "last is not supported by chelsio pmd");
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return 0;
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}
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static int
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ch_rte_parsetype_udp(const void *dmask, const struct rte_flow_item *item,
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struct ch_filter_specification *fs,
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struct rte_flow_error *e)
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{
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const struct rte_flow_item_udp *val = item->spec;
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const struct rte_flow_item_udp *umask = item->mask;
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const struct rte_flow_item_udp *mask;
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mask = umask ? umask : (const struct rte_flow_item_udp *)dmask;
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if (mask->hdr.dgram_len || mask->hdr.dgram_cksum)
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return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
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item,
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"udp: only src/dst port supported");
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CXGBE_FILL_FS(IPPROTO_UDP, 0xff, proto);
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if (!val)
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return 0;
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CXGBE_FILL_FS(be16_to_cpu(val->hdr.src_port),
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be16_to_cpu(mask->hdr.src_port), fport);
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CXGBE_FILL_FS(be16_to_cpu(val->hdr.dst_port),
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be16_to_cpu(mask->hdr.dst_port), lport);
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return 0;
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}
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static int
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ch_rte_parsetype_tcp(const void *dmask, const struct rte_flow_item *item,
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struct ch_filter_specification *fs,
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struct rte_flow_error *e)
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{
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const struct rte_flow_item_tcp *val = item->spec;
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const struct rte_flow_item_tcp *umask = item->mask;
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const struct rte_flow_item_tcp *mask;
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mask = umask ? umask : (const struct rte_flow_item_tcp *)dmask;
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if (mask->hdr.sent_seq || mask->hdr.recv_ack || mask->hdr.data_off ||
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mask->hdr.tcp_flags || mask->hdr.rx_win || mask->hdr.cksum ||
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mask->hdr.tcp_urp)
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return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
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item,
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"tcp: only src/dst port supported");
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CXGBE_FILL_FS(IPPROTO_TCP, 0xff, proto);
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if (!val)
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return 0;
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CXGBE_FILL_FS(be16_to_cpu(val->hdr.src_port),
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be16_to_cpu(mask->hdr.src_port), fport);
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CXGBE_FILL_FS(be16_to_cpu(val->hdr.dst_port),
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be16_to_cpu(mask->hdr.dst_port), lport);
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return 0;
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}
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static int
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ch_rte_parsetype_ipv4(const void *dmask, const struct rte_flow_item *item,
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struct ch_filter_specification *fs,
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struct rte_flow_error *e)
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{
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const struct rte_flow_item_ipv4 *val = item->spec;
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const struct rte_flow_item_ipv4 *umask = item->mask;
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const struct rte_flow_item_ipv4 *mask;
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mask = umask ? umask : (const struct rte_flow_item_ipv4 *)dmask;
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if (mask->hdr.time_to_live || mask->hdr.type_of_service)
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return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
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item, "ttl/tos are not supported");
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fs->type = FILTER_TYPE_IPV4;
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CXGBE_FILL_FS(ETHER_TYPE_IPv4, 0xffff, ethtype);
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if (!val)
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return 0; /* ipv4 wild card */
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CXGBE_FILL_FS(val->hdr.next_proto_id, mask->hdr.next_proto_id, proto);
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CXGBE_FILL_FS_MEMCPY(val->hdr.dst_addr, mask->hdr.dst_addr, lip);
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CXGBE_FILL_FS_MEMCPY(val->hdr.src_addr, mask->hdr.src_addr, fip);
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return 0;
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}
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static int
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ch_rte_parsetype_ipv6(const void *dmask, const struct rte_flow_item *item,
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struct ch_filter_specification *fs,
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struct rte_flow_error *e)
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{
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const struct rte_flow_item_ipv6 *val = item->spec;
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const struct rte_flow_item_ipv6 *umask = item->mask;
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const struct rte_flow_item_ipv6 *mask;
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mask = umask ? umask : (const struct rte_flow_item_ipv6 *)dmask;
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if (mask->hdr.vtc_flow ||
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mask->hdr.payload_len || mask->hdr.hop_limits)
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return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
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item,
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"tc/flow/hop are not supported");
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fs->type = FILTER_TYPE_IPV6;
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CXGBE_FILL_FS(ETHER_TYPE_IPv6, 0xffff, ethtype);
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if (!val)
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return 0; /* ipv6 wild card */
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CXGBE_FILL_FS(val->hdr.proto, mask->hdr.proto, proto);
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CXGBE_FILL_FS_MEMCPY(val->hdr.dst_addr, mask->hdr.dst_addr, lip);
|
||||
CXGBE_FILL_FS_MEMCPY(val->hdr.src_addr, mask->hdr.src_addr, fip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
cxgbe_rtef_parse_attr(struct rte_flow *flow, const struct rte_flow_attr *attr,
|
||||
struct rte_flow_error *e)
|
||||
{
|
||||
if (attr->egress)
|
||||
return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR,
|
||||
attr, "attribute:<egress> is"
|
||||
" not supported !");
|
||||
if (attr->group > 0)
|
||||
return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR,
|
||||
attr, "group parameter is"
|
||||
" not supported.");
|
||||
|
||||
flow->fidx = attr->priority ? attr->priority - 1 : FILTER_ID_MAX;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int check_rxq(struct rte_eth_dev *dev, uint16_t rxq)
|
||||
{
|
||||
struct port_info *pi = ethdev2pinfo(dev);
|
||||
|
||||
if (rxq > pi->n_rx_qsets)
|
||||
return -EINVAL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cxgbe_validate_fidxondel(struct filter_entry *f, unsigned int fidx)
|
||||
{
|
||||
struct adapter *adap = ethdev2adap(f->dev);
|
||||
struct ch_filter_specification fs = f->fs;
|
||||
|
||||
if (fidx >= adap->tids.nftids) {
|
||||
dev_err(adap, "invalid flow index %d.\n", fidx);
|
||||
return -EINVAL;
|
||||
}
|
||||
if (!is_filter_set(&adap->tids, fidx, fs.type)) {
|
||||
dev_err(adap, "Already free fidx:%d f:%p\n", fidx, f);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
cxgbe_validate_fidxonadd(struct ch_filter_specification *fs,
|
||||
struct adapter *adap, unsigned int fidx)
|
||||
{
|
||||
if (is_filter_set(&adap->tids, fidx, fs->type)) {
|
||||
dev_err(adap, "filter index: %d is busy.\n", fidx);
|
||||
return -EBUSY;
|
||||
}
|
||||
if (fidx >= adap->tids.nftids) {
|
||||
dev_err(adap, "filter index (%u) >= max(%u)\n",
|
||||
fidx, adap->tids.nftids);
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
cxgbe_verify_fidx(struct rte_flow *flow, unsigned int fidx, uint8_t del)
|
||||
{
|
||||
return del ? cxgbe_validate_fidxondel(flow->f, fidx) :
|
||||
cxgbe_validate_fidxonadd(&flow->fs,
|
||||
ethdev2adap(flow->dev), fidx);
|
||||
}
|
||||
|
||||
static int cxgbe_get_fidx(struct rte_flow *flow, unsigned int *fidx)
|
||||
{
|
||||
struct ch_filter_specification *fs = &flow->fs;
|
||||
struct adapter *adap = ethdev2adap(flow->dev);
|
||||
|
||||
/* For tcam get the next available slot, if default value specified */
|
||||
if (flow->fidx == FILTER_ID_MAX) {
|
||||
int idx;
|
||||
|
||||
idx = cxgbe_alloc_ftid(adap, fs->type);
|
||||
if (idx < 0) {
|
||||
dev_err(adap, "unable to get a filter index in tcam\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
*fidx = (unsigned int)idx;
|
||||
} else {
|
||||
*fidx = flow->fidx;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
cxgbe_rtef_parse_actions(struct rte_flow *flow,
|
||||
const struct rte_flow_action action[],
|
||||
struct rte_flow_error *e)
|
||||
{
|
||||
struct ch_filter_specification *fs = &flow->fs;
|
||||
const struct rte_flow_action_queue *q;
|
||||
const struct rte_flow_action *a;
|
||||
char abit = 0;
|
||||
|
||||
for (a = action; a->type != RTE_FLOW_ACTION_TYPE_END; a++) {
|
||||
switch (a->type) {
|
||||
case RTE_FLOW_ACTION_TYPE_VOID:
|
||||
continue;
|
||||
case RTE_FLOW_ACTION_TYPE_DROP:
|
||||
if (abit++)
|
||||
return rte_flow_error_set(e, EINVAL,
|
||||
RTE_FLOW_ERROR_TYPE_ACTION, a,
|
||||
"specify only 1 pass/drop");
|
||||
fs->action = FILTER_DROP;
|
||||
break;
|
||||
case RTE_FLOW_ACTION_TYPE_QUEUE:
|
||||
q = (const struct rte_flow_action_queue *)a->conf;
|
||||
if (!q)
|
||||
return rte_flow_error_set(e, EINVAL,
|
||||
RTE_FLOW_ERROR_TYPE_ACTION, q,
|
||||
"specify rx queue index");
|
||||
if (check_rxq(flow->dev, q->index))
|
||||
return rte_flow_error_set(e, EINVAL,
|
||||
RTE_FLOW_ERROR_TYPE_ACTION, q,
|
||||
"Invalid rx queue");
|
||||
if (abit++)
|
||||
return rte_flow_error_set(e, EINVAL,
|
||||
RTE_FLOW_ERROR_TYPE_ACTION, a,
|
||||
"specify only 1 pass/drop");
|
||||
fs->action = FILTER_PASS;
|
||||
fs->dirsteer = 1;
|
||||
fs->iq = q->index;
|
||||
break;
|
||||
case RTE_FLOW_ACTION_TYPE_COUNT:
|
||||
fs->hitcnts = 1;
|
||||
break;
|
||||
default:
|
||||
/* Not supported action : return error */
|
||||
return rte_flow_error_set(e, ENOTSUP,
|
||||
RTE_FLOW_ERROR_TYPE_ACTION,
|
||||
a, "Action not supported");
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct chrte_fparse parseitem[] = {
|
||||
[RTE_FLOW_ITEM_TYPE_IPV4] = {
|
||||
.fptr = ch_rte_parsetype_ipv4,
|
||||
.dmask = &rte_flow_item_ipv4_mask,
|
||||
},
|
||||
|
||||
[RTE_FLOW_ITEM_TYPE_IPV6] = {
|
||||
.fptr = ch_rte_parsetype_ipv6,
|
||||
.dmask = &rte_flow_item_ipv6_mask,
|
||||
},
|
||||
|
||||
[RTE_FLOW_ITEM_TYPE_UDP] = {
|
||||
.fptr = ch_rte_parsetype_udp,
|
||||
.dmask = &rte_flow_item_udp_mask,
|
||||
},
|
||||
|
||||
[RTE_FLOW_ITEM_TYPE_TCP] = {
|
||||
.fptr = ch_rte_parsetype_tcp,
|
||||
.dmask = &rte_flow_item_tcp_mask,
|
||||
},
|
||||
};
|
||||
|
||||
static int
|
||||
cxgbe_rtef_parse_items(struct rte_flow *flow,
|
||||
const struct rte_flow_item items[],
|
||||
struct rte_flow_error *e)
|
||||
{
|
||||
const struct rte_flow_item *i;
|
||||
char repeat[ARRAY_SIZE(parseitem)] = {0};
|
||||
|
||||
for (i = items; i->type != RTE_FLOW_ITEM_TYPE_END; i++) {
|
||||
struct chrte_fparse *idx = &flow->item_parser[i->type];
|
||||
int ret;
|
||||
|
||||
if (i->type > ARRAY_SIZE(parseitem))
|
||||
return rte_flow_error_set(e, ENOTSUP,
|
||||
RTE_FLOW_ERROR_TYPE_ITEM,
|
||||
i, "Item not supported");
|
||||
|
||||
switch (i->type) {
|
||||
case RTE_FLOW_ITEM_TYPE_VOID:
|
||||
continue;
|
||||
default:
|
||||
/* check if item is repeated */
|
||||
if (repeat[i->type])
|
||||
return rte_flow_error_set(e, ENOTSUP,
|
||||
RTE_FLOW_ERROR_TYPE_ITEM, i,
|
||||
"parse items cannot be repeated (except void)");
|
||||
repeat[i->type] = 1;
|
||||
|
||||
/* validate the item */
|
||||
ret = cxgbe_validate_item(i, e);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (!idx || !idx->fptr) {
|
||||
return rte_flow_error_set(e, ENOTSUP,
|
||||
RTE_FLOW_ERROR_TYPE_ITEM, i,
|
||||
"Item not supported");
|
||||
} else {
|
||||
ret = idx->fptr(idx->dmask, i, &flow->fs, e);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
cxgbe_flow_parse(struct rte_flow *flow,
|
||||
const struct rte_flow_attr *attr,
|
||||
const struct rte_flow_item item[],
|
||||
const struct rte_flow_action action[],
|
||||
struct rte_flow_error *e)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* parse user request into ch_filter_specification */
|
||||
ret = cxgbe_rtef_parse_attr(flow, attr, e);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = cxgbe_rtef_parse_items(flow, item, e);
|
||||
if (ret)
|
||||
return ret;
|
||||
return cxgbe_rtef_parse_actions(flow, action, e);
|
||||
}
|
||||
|
||||
static int
|
||||
cxgbe_flow_validate(struct rte_eth_dev *dev,
|
||||
const struct rte_flow_attr *attr,
|
||||
const struct rte_flow_item item[],
|
||||
const struct rte_flow_action action[],
|
||||
struct rte_flow_error *e)
|
||||
{
|
||||
struct adapter *adap = ethdev2adap(dev);
|
||||
struct rte_flow *flow;
|
||||
unsigned int fidx;
|
||||
int ret;
|
||||
|
||||
flow = t4_os_alloc(sizeof(struct rte_flow));
|
||||
if (!flow)
|
||||
return rte_flow_error_set(e, ENOMEM, RTE_FLOW_ERROR_TYPE_HANDLE,
|
||||
NULL,
|
||||
"Unable to allocate memory for filter_entry");
|
||||
|
||||
flow->item_parser = parseitem;
|
||||
flow->dev = dev;
|
||||
|
||||
ret = cxgbe_flow_parse(flow, attr, item, action, e);
|
||||
if (ret) {
|
||||
t4_os_free(flow);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (validate_filter(adap, &flow->fs)) {
|
||||
t4_os_free(flow);
|
||||
return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_HANDLE,
|
||||
NULL,
|
||||
"validation failed. Check f/w config file.");
|
||||
}
|
||||
|
||||
if (cxgbe_get_fidx(flow, &fidx)) {
|
||||
t4_os_free(flow);
|
||||
return rte_flow_error_set(e, ENOMEM, RTE_FLOW_ERROR_TYPE_HANDLE,
|
||||
NULL, "no memory in tcam.");
|
||||
}
|
||||
|
||||
if (cxgbe_verify_fidx(flow, fidx, 0)) {
|
||||
t4_os_free(flow);
|
||||
return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_HANDLE,
|
||||
NULL, "validation failed");
|
||||
}
|
||||
|
||||
t4_os_free(flow);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct rte_flow_ops cxgbe_flow_ops = {
|
||||
.validate = cxgbe_flow_validate,
|
||||
.create = NULL,
|
||||
.destroy = NULL,
|
||||
.flush = NULL,
|
||||
.query = NULL,
|
||||
.isolate = NULL,
|
||||
};
|
||||
|
||||
int
|
||||
cxgbe_dev_filter_ctrl(struct rte_eth_dev *dev,
|
||||
enum rte_filter_type filter_type,
|
||||
enum rte_filter_op filter_op,
|
||||
void *arg)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
RTE_SET_USED(dev);
|
||||
switch (filter_type) {
|
||||
case RTE_ETH_FILTER_GENERIC:
|
||||
if (filter_op != RTE_ETH_FILTER_GET)
|
||||
return -EINVAL;
|
||||
*(const void **)arg = &cxgbe_flow_ops;
|
||||
break;
|
||||
default:
|
||||
ret = -ENOTSUP;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
38
drivers/net/cxgbe/cxgbe_flow.h
Normal file
38
drivers/net/cxgbe/cxgbe_flow.h
Normal file
@ -0,0 +1,38 @@
|
||||
/* SPDX-License-Identifier: BSD-3-Clause
|
||||
* Copyright(c) 2018 Chelsio Communications.
|
||||
* All rights reserved.
|
||||
*/
|
||||
#ifndef _CXGBE_FLOW_H_
|
||||
#define _CXGBE_FLOW_H_
|
||||
|
||||
#include <rte_flow_driver.h>
|
||||
#include "cxgbe_filter.h"
|
||||
|
||||
struct chrte_fparse {
|
||||
int (*fptr)(const void *mask, /* currently supported mask */
|
||||
const struct rte_flow_item *item, /* user input */
|
||||
struct ch_filter_specification *fs, /* where to parse */
|
||||
struct rte_flow_error *e);
|
||||
const void *dmask; /* Specify what is supported by chelsio by default*/
|
||||
};
|
||||
|
||||
struct rte_flow {
|
||||
struct filter_entry *f;
|
||||
struct ch_filter_specification fs; /* temp, to create filter */
|
||||
struct chrte_fparse *item_parser;
|
||||
/*
|
||||
* filter_entry doesn't store user priority.
|
||||
* Post creation of filter this will indicate the
|
||||
* flow index (fidx) for both hash and tcam filters
|
||||
*/
|
||||
unsigned int fidx;
|
||||
struct rte_eth_dev *dev;
|
||||
};
|
||||
|
||||
int
|
||||
cxgbe_dev_filter_ctrl(struct rte_eth_dev *dev,
|
||||
enum rte_filter_type filter_type,
|
||||
enum rte_filter_op filter_op,
|
||||
void *arg);
|
||||
|
||||
#endif /* _CXGBE_FLOW_H_ */
|
||||
Loading…
Reference in New Issue
Block a user