diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index d4561ffd90..293785b3f3 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -253,8 +253,8 @@ static void
 hns3_clear_all_event_cause(struct hns3_hw *hw)
 {
 	uint32_t vector0_int_stats;
-	vector0_int_stats = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
 
+	vector0_int_stats = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
 	if (BIT(HNS3_VECTOR0_IMPRESET_INT_B) & vector0_int_stats)
 		hns3_warn(hw, "Probe during IMP reset interrupt");
 
@@ -3127,7 +3127,6 @@ hns3_parse_cfg(struct hns3_cfg *cfg, struct hns3_cmd_desc *desc)
 	ext_rss_size_max = hns3_get_field(rte_le_to_cpu_32(req->param[2]),
 					       HNS3_CFG_EXT_RSS_SIZE_M,
 					       HNS3_CFG_EXT_RSS_SIZE_S);
-
 	/*
 	 * Field ext_rss_size_max obtained from firmware will be more flexible
 	 * for future changes and expansions, which is an exponent of 2, instead
@@ -3846,7 +3845,6 @@ hns3_drop_nopfc_buf_till_fit(struct hns3_hw *hw,
 	for (i = HNS3_MAX_TC_NUM - 1; i >= 0; i--) {
 		priv = &buf_alloc->priv_buf[i];
 		mask = BIT((uint8_t)i);
-
 		if (hw->hw_tc_map & mask &&
 		    !(hw->dcb_info.hw_pfc_map & mask)) {
 			/* Clear the no pfc TC private buffer */
@@ -3932,7 +3930,6 @@ hns3_only_alloc_priv_buff(struct hns3_hw *hw,
 			COMPENSATE_HALF_MPS_NUM * half_mps;
 	min_rx_priv = roundup(min_rx_priv, HNS3_BUF_SIZE_UNIT);
 	rx_priv = rounddown(rx_priv, HNS3_BUF_SIZE_UNIT);
-
 	if (rx_priv < min_rx_priv)
 		return false;
 
@@ -6297,7 +6294,6 @@ hns3_is_reset_pending(struct hns3_adapter *hns)
 
 	hns3_check_event_cause(hns, NULL);
 	reset = hns3_get_reset_level(hns, &hw->reset.pending);
-
 	if (reset != HNS3_NONE_RESET && hw->reset.level != HNS3_NONE_RESET &&
 	    hw->reset.level < reset) {
 		hns3_warn(hw, "High level reset %d is pending", reset);