net/dpaa2: support L3 and L4 checksum offload
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
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@ -6,6 +6,8 @@
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[Features]
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Queue start/stop = Y
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RSS hash = Y
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L3 checksum offload = Y
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L4 checksum offload = Y
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Linux VFIO = Y
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ARMv8 = Y
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Usage doc = Y
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@ -68,7 +68,17 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
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dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
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dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
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dev_info->rx_offload_capa =
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DEV_RX_OFFLOAD_IPV4_CKSUM |
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DEV_RX_OFFLOAD_UDP_CKSUM |
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DEV_RX_OFFLOAD_TCP_CKSUM |
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DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
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dev_info->tx_offload_capa =
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DEV_TX_OFFLOAD_IPV4_CKSUM |
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DEV_TX_OFFLOAD_UDP_CKSUM |
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DEV_TX_OFFLOAD_TCP_CKSUM |
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DEV_TX_OFFLOAD_SCTP_CKSUM |
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DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
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dev_info->speed_capa = ETH_LINK_SPEED_1G |
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ETH_LINK_SPEED_2_5G |
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ETH_LINK_SPEED_10G;
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@ -252,8 +262,13 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
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memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
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memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
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tc_id = 0;
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flow_id = tx_queue_id;
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if (priv->num_tc == 1) {
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tc_id = 0;
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flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id];
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} else {
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tc_id = tx_queue_id;
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flow_id = 0;
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}
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ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
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tc_id, flow_id, options, &tx_flow_cfg);
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@ -302,6 +317,7 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
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struct dpaa2_dev_priv *priv = data->dev_private;
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struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
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struct dpni_queue cfg;
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struct dpni_error_cfg err_cfg;
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uint16_t qdid;
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struct dpni_queue_id qid;
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struct dpaa2_queue *dpaa2_q;
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@ -337,6 +353,48 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
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dpaa2_q->fqid = qid.fqid;
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}
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ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
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DPNI_OFF_RX_L3_CSUM, true);
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if (ret) {
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PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
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return ret;
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}
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ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
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DPNI_OFF_RX_L4_CSUM, true);
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if (ret) {
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PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
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return ret;
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}
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ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
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DPNI_OFF_TX_L3_CSUM, true);
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if (ret) {
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PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
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return ret;
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}
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ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
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DPNI_OFF_TX_L4_CSUM, true);
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if (ret) {
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PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
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return ret;
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}
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/*checksum errors, send them to normal path and set it in annotation */
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err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
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err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
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err_cfg.set_frame_annotation = true;
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ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
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priv->token, &err_cfg);
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if (ret) {
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PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
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"code = %d\n", ret);
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return ret;
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}
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return 0;
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}
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@ -453,7 +511,13 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
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*/
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priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC];
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priv->nb_tx_queues = attr.num_queues;
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if (attr.num_tcs == 1)
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priv->nb_tx_queues = attr.num_queues;
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else
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priv->nb_tx_queues = attr.num_tcs;
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PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc);
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PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
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priv->hw = dpni_dev;
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priv->hw_id = hw_id;
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