net/mlx5: update source and destination vport translations

There new kernel/rdma_core [1] supports matching on metadata
register instead of vport field to provide operations over
VF LAG bonding configurations. This patch provides correct
translations for flow matchers and destination port actions
if united E-Switch (for VF LAG) is configured and/or new vport
matching mode is engaged.

[1] http://patchwork.ozlabs.org/cover/1122170/
    "Mellanox, mlx5 vport metadata matching"

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
This commit is contained in:
Viacheslav Ovsiienko 2019-09-25 07:53:32 +00:00 committed by Ferruh Yigit
parent 09a16bcab7
commit f07341e7ae
2 changed files with 43 additions and 4 deletions

View File

@ -4616,6 +4616,29 @@ flow_dv_translate_item_meta(void *matcher, void *key,
}
}
/**
* Add vport metadata Reg C0 item to matcher
*
* @param[in, out] matcher
* Flow matcher.
* @param[in, out] key
* Flow matcher value.
* @param[in] reg
* Flow pattern to translate.
*/
static void
flow_dv_translate_item_meta_vport(void *matcher, void *key,
uint32_t value, uint32_t mask)
{
void *misc2_m =
MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
void *misc2_v =
MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, value);
}
/**
* Add source vport match to the specified matcher.
*
@ -4668,6 +4691,12 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
priv = mlx5_port_to_eswitch_info(id);
if (!priv)
return -rte_errno;
/* Translate to vport field or to metadata, depending on mode. */
if (priv->vport_meta_mask)
flow_dv_translate_item_meta_vport(matcher, key,
priv->vport_meta_tag,
priv->vport_meta_mask);
else
flow_dv_translate_item_source_vport(matcher, key,
priv->vport_id, mask);
return 0;
@ -5113,6 +5142,9 @@ flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
RTE_FLOW_ERROR_TYPE_ACTION,
NULL,
"No eswitch info was found for port");
if (priv->vport_meta_mask)
*dst_port_id = priv->vport_meta_tag;
else
*dst_port_id = priv->vport_id;
return 0;
}

View File

@ -614,7 +614,14 @@ struct mlx5_ifc_fte_match_set_misc2_bits {
struct mlx5_ifc_fte_match_mpls_bits inner_first_mpls;
struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls_over_gre;
struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls_over_udp;
u8 reserved_at_80[0x100];
u8 metadata_reg_c_7[0x20];
u8 metadata_reg_c_6[0x20];
u8 metadata_reg_c_5[0x20];
u8 metadata_reg_c_4[0x20];
u8 metadata_reg_c_3[0x20];
u8 metadata_reg_c_2[0x20];
u8 metadata_reg_c_1[0x20];
u8 metadata_reg_c_0[0x20];
u8 metadata_reg_a[0x20];
u8 reserved_at_1a0[0x60];
};