net/mlx5: support Direct Rules action template API
This patch adapts mlx5 PMD to changes in mlx5dr API regarding the action templates. It changes the following: 1. Actions template creation: - Flow actions types are translated to mlx5dr action types in order to create mlx5dr_action_template object. - An offset is assigned to each flow action. This offset is used to predetermine the action's location in the rule_acts array passed on the rule creation. 2. Template table creation: - Fixed actions are created and put in the rule_acts cache using predetermined offsets - mlx5dr matcher is parametrized by action templates bound to template table. - mlx5dr matcher is configured to optimize rule creation based on passed rule indices. 3. Flow rule creation: - mlx5dr rule is parametrized by the action template on which these rule's actions are based. - Rule index hint is provided to mlx5dr. Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
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@ -1578,6 +1578,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
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}
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/* Only HWS requires this information. */
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flow_hw_init_tags_set(eth_dev);
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flow_hw_init_flow_metadata_config(eth_dev);
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if (priv->sh->config.dv_esw_en &&
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flow_hw_create_vport_action(eth_dev)) {
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DRV_LOG(ERR, "port %u failed to create vport action",
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@ -1969,8 +1969,10 @@ mlx5_dev_close(struct rte_eth_dev *dev)
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flow_hw_destroy_vport_action(dev);
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flow_hw_resource_release(dev);
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flow_hw_clear_port_info(dev);
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if (priv->sh->config.dv_flow_en == 2)
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if (priv->sh->config.dv_flow_en == 2) {
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flow_hw_clear_flow_metadata_config();
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flow_hw_clear_tags_set(dev);
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}
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#endif
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if (priv->rxq_privs != NULL) {
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/* XXX race condition if mlx5_rx_burst() is still running. */
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@ -1657,6 +1657,8 @@ struct mlx5_priv {
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struct mlx5dr_action *hw_drop[2];
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/* HW steering global tag action. */
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struct mlx5dr_action *hw_tag[2];
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/* HW steering create ongoing rte flow table list header. */
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LIST_HEAD(flow_hw_tbl_ongo, rte_flow_template_table) flow_hw_tbl_ongo;
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struct mlx5_indexed_pool *acts_ipool; /* Action data indexed pool. */
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#endif
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};
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@ -1189,6 +1189,11 @@ struct rte_flow_actions_template {
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struct rte_flow_actions_template_attr attr;
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struct rte_flow_action *actions; /* Cached flow actions. */
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struct rte_flow_action *masks; /* Cached action masks.*/
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struct mlx5dr_action_template *tmpl; /* mlx5dr action template. */
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uint16_t dr_actions_num; /* Amount of DR rules actions. */
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uint16_t actions_num; /* Amount of flow actions */
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uint16_t *actions_off; /* DR action offset for given rte action offset. */
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uint16_t reformat_off; /* Offset of DR reformat action. */
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uint16_t mhdr_off; /* Offset of DR modify header action. */
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uint32_t refcnt; /* Reference counter. */
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uint16_t rx_cpy_pos; /* Action position of Rx metadata to be copied. */
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@ -1240,7 +1245,6 @@ struct mlx5_hw_actions {
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/* Encap/Decap action. */
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struct mlx5_hw_encap_decap_action *encap_decap;
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uint16_t encap_decap_pos; /* Encap/Decap action position. */
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uint32_t acts_num:4; /* Total action number. */
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uint32_t mark:1; /* Indicate the mark action. */
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uint32_t cnt_id; /* Counter id. */
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/* Translated DR action array from action template. */
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@ -1496,6 +1500,13 @@ flow_hw_get_wire_port(struct ibv_context *ibctx)
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}
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#endif
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extern uint32_t mlx5_flow_hw_flow_metadata_config_refcnt;
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extern uint8_t mlx5_flow_hw_flow_metadata_esw_en;
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extern uint8_t mlx5_flow_hw_flow_metadata_xmeta_en;
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void flow_hw_init_flow_metadata_config(struct rte_eth_dev *dev);
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void flow_hw_clear_flow_metadata_config(void);
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/*
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* Convert metadata or tag to the actual register.
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* META: Can only be used to match in the FDB in this stage, fixed C_1.
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@ -1507,7 +1518,22 @@ flow_hw_get_reg_id(enum rte_flow_item_type type, uint32_t id)
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{
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switch (type) {
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case RTE_FLOW_ITEM_TYPE_META:
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#ifdef HAVE_MLX5_HWS_SUPPORT
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if (mlx5_flow_hw_flow_metadata_esw_en &&
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mlx5_flow_hw_flow_metadata_xmeta_en == MLX5_XMETA_MODE_META32_HWS) {
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return REG_C_1;
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}
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#endif
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/*
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* On root table - PMD allows only egress META matching, thus
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* REG_A matching is sufficient.
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*
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* On non-root tables - REG_A corresponds to general_purpose_lookup_field,
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* which translates to REG_A in NIC TX and to REG_B in NIC RX.
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* However, current FW does not implement REG_B case right now, so
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* REG_B case should be rejected on pattern template validation.
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*/
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return REG_A;
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case RTE_FLOW_ITEM_TYPE_TAG:
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MLX5_ASSERT(id < MLX5_FLOW_HW_TAGS_MAX);
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return mlx5_flow_hw_avl_tags[id];
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@ -2421,4 +2447,6 @@ int mlx5_flow_pattern_validate(struct rte_eth_dev *dev,
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const struct rte_flow_pattern_template_attr *attr,
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const struct rte_flow_item items[],
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struct rte_flow_error *error);
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int flow_hw_table_update(struct rte_eth_dev *dev,
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struct rte_flow_error *error);
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#endif /* RTE_PMD_MLX5_FLOW_H_ */
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File diff suppressed because it is too large
Load Diff
@ -1170,6 +1170,16 @@ mlx5_dev_start(struct rte_eth_dev *dev)
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dev->data->port_id, rte_strerror(rte_errno));
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goto error;
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}
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#ifdef HAVE_MLX5_HWS_SUPPORT
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if (priv->sh->config.dv_flow_en == 2) {
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ret = flow_hw_table_update(dev, NULL);
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if (ret) {
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DRV_LOG(ERR, "port %u failed to update HWS tables",
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dev->data->port_id);
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goto error;
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}
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}
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#endif
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ret = mlx5_traffic_enable(dev);
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if (ret) {
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DRV_LOG(ERR, "port %u failed to set defaults flows",
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