net/qede/base: support driver attribute repository
Add support for driver attributes repository in MFW and base driver. Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
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@ -3674,3 +3674,76 @@ enum _ecore_status_t ecore_mcp_set_capabilities(struct ecore_hwfn *p_hwfn,
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return ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_FEATURE_SUPPORT,
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features, &mcp_resp, &mcp_param);
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}
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enum _ecore_status_t
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ecore_mcp_drv_attribute(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
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struct ecore_mcp_drv_attr *p_drv_attr)
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{
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struct attribute_cmd_write_stc attr_cmd_write;
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enum _attribute_commands_e mfw_attr_cmd;
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struct ecore_mcp_mb_params mb_params;
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enum _ecore_status_t rc;
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switch (p_drv_attr->attr_cmd) {
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case ECORE_MCP_DRV_ATTR_CMD_READ:
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mfw_attr_cmd = ATTRIBUTE_CMD_READ;
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break;
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case ECORE_MCP_DRV_ATTR_CMD_WRITE:
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mfw_attr_cmd = ATTRIBUTE_CMD_WRITE;
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break;
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case ECORE_MCP_DRV_ATTR_CMD_READ_CLEAR:
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mfw_attr_cmd = ATTRIBUTE_CMD_READ_CLEAR;
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break;
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case ECORE_MCP_DRV_ATTR_CMD_CLEAR:
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mfw_attr_cmd = ATTRIBUTE_CMD_CLEAR;
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break;
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default:
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DP_NOTICE(p_hwfn, false, "Unknown attribute command %d\n",
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p_drv_attr->attr_cmd);
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return ECORE_INVAL;
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}
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OSAL_MEM_ZERO(&mb_params, sizeof(mb_params));
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mb_params.cmd = DRV_MSG_CODE_ATTRIBUTE;
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SET_MFW_FIELD(mb_params.param, DRV_MB_PARAM_ATTRIBUTE_KEY,
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p_drv_attr->attr_num);
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SET_MFW_FIELD(mb_params.param, DRV_MB_PARAM_ATTRIBUTE_CMD,
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mfw_attr_cmd);
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if (p_drv_attr->attr_cmd == ECORE_MCP_DRV_ATTR_CMD_WRITE) {
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OSAL_MEM_ZERO(&attr_cmd_write, sizeof(attr_cmd_write));
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attr_cmd_write.val = p_drv_attr->val;
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attr_cmd_write.mask = p_drv_attr->mask;
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attr_cmd_write.offset = p_drv_attr->offset;
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mb_params.p_data_src = &attr_cmd_write;
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mb_params.data_src_size = sizeof(attr_cmd_write);
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}
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rc = ecore_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
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if (rc != ECORE_SUCCESS)
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return rc;
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if (mb_params.mcp_resp == FW_MSG_CODE_UNSUPPORTED) {
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DP_INFO(p_hwfn,
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"The attribute command is not supported by the MFW\n");
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return ECORE_NOTIMPL;
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} else if (mb_params.mcp_resp != FW_MSG_CODE_OK) {
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DP_INFO(p_hwfn,
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"Failed to send an attribute command [mcp_resp 0x%x, attr_cmd %d, attr_num %d]\n",
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mb_params.mcp_resp, p_drv_attr->attr_cmd,
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p_drv_attr->attr_num);
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return ECORE_INVAL;
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}
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DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
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"Attribute Command: cmd %d [mfw_cmd %d], num %d, in={val 0x%08x, mask 0x%08x, offset 0x%08x}, out={val 0x%08x}\n",
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p_drv_attr->attr_cmd, mfw_attr_cmd, p_drv_attr->attr_num,
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p_drv_attr->val, p_drv_attr->mask, p_drv_attr->offset,
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mb_params.mcp_param);
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if (p_drv_attr->attr_cmd == ECORE_MCP_DRV_ATTR_CMD_READ ||
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p_drv_attr->attr_cmd == ECORE_MCP_DRV_ATTR_CMD_READ_CLEAR)
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p_drv_attr->val = mb_params.mcp_param;
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return ECORE_SUCCESS;
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}
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@ -521,6 +521,41 @@ enum _ecore_status_t ecore_mcp_get_capabilities(struct ecore_hwfn *p_hwfn,
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enum _ecore_status_t ecore_mcp_set_capabilities(struct ecore_hwfn *p_hwfn,
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struct ecore_ptt *p_ptt);
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enum ecore_mcp_drv_attr_cmd {
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ECORE_MCP_DRV_ATTR_CMD_READ,
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ECORE_MCP_DRV_ATTR_CMD_WRITE,
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ECORE_MCP_DRV_ATTR_CMD_READ_CLEAR,
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ECORE_MCP_DRV_ATTR_CMD_CLEAR,
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};
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struct ecore_mcp_drv_attr {
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enum ecore_mcp_drv_attr_cmd attr_cmd;
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u32 attr_num;
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/* R/RC - will be set with the read value
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* W - should hold the required value to be written
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* C - DC
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*/
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u32 val;
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/* W - mask/offset to be applied on the given value
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* R/RC/C - DC
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*/
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u32 mask;
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u32 offset;
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};
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/**
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* @brief Handle the drivers' attributes that are kept by the MFW.
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*
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* @param p_hwfn
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* @param p_ptt
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* @param p_drv_attr
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*/
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enum _ecore_status_t
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ecore_mcp_drv_attribute(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
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struct ecore_mcp_drv_attr *p_drv_attr);
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/**
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* @brief Read ufp config from the shared memory.
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*
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@ -475,6 +475,18 @@ struct dcb_dscp_map {
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u32 dscp_pri_map[8];
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};
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/**************************************
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* Attributes commands
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**************************************/
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enum _attribute_commands_e {
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ATTRIBUTE_CMD_READ = 0,
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ATTRIBUTE_CMD_WRITE,
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ATTRIBUTE_CMD_READ_CLEAR,
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ATTRIBUTE_CMD_CLEAR,
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ATTRIBUTE_NUM_OF_COMMANDS
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};
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/**************************************/
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/* */
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/* P U B L I C G L O B A L */
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@ -1149,6 +1161,12 @@ struct mdump_retain_data_stc {
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u32 status;
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};
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struct attribute_cmd_write_stc {
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u32 val;
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u32 mask;
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u32 offset;
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};
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union drv_union_data {
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struct mcp_mac wol_mac; /* UNLOAD_DONE */
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@ -1180,6 +1198,7 @@ union drv_union_data {
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struct load_req_stc load_req;
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struct load_rsp_stc load_rsp;
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struct mdump_retain_data_stc mdump_retain;
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struct attribute_cmd_write_stc attribute_cmd_write;
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/* ... */
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};
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@ -1414,6 +1433,8 @@ struct public_drv_mb {
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#define DRV_MSG_CODE_FEATURE_SUPPORT 0x00300000
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/* return FW_MB_PARAM_FEATURE_SUPPORT_* */
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#define DRV_MSG_CODE_GET_MFW_FEATURE_SUPPORT 0x00310000
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/* Param: [0:23] Attribute key, [24:31] Attribute sub command */
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#define DRV_MSG_CODE_ATTRIBUTE 0x00350000
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#define DRV_MSG_SEQ_NUMBER_MASK 0x0000ffff
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@ -1573,6 +1594,11 @@ struct public_drv_mb {
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#define DRV_MB_PARAM_FEATURE_SUPPORT_PORT_EEE 0x00000002
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#define DRV_MB_PARAM_FEATURE_SUPPORT_FUNC_MASK 0xFFFF0000
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#define DRV_MB_PARAM_FEATURE_SUPPORT_FUNC_OFFSET 16
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/* Driver attributes params */
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#define DRV_MB_PARAM_ATTRIBUTE_KEY_OFFSET 0
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#define DRV_MB_PARAM_ATTRIBUTE_KEY_MASK 0x00FFFFFF
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#define DRV_MB_PARAM_ATTRIBUTE_CMD_OFFSET 24
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#define DRV_MB_PARAM_ATTRIBUTE_CMD_MASK 0xFF000000
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u32 fw_mb_header;
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#define FW_MSG_CODE_MASK 0xffff0000
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@ -1686,6 +1712,8 @@ struct public_drv_mb {
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#define FW_MSG_SEQ_NUMBER_MASK 0x0000ffff
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#define FW_MSG_CODE_ATTRIBUTE_INVALID_KEY 0x00020000
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#define FW_MSG_CODE_ATTRIBUTE_INVALID_CMD 0x00030000
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u32 fw_mb_param;
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/* Resource Allocation params - MFW version support */
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