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net/bnxt: configure PARIF for egress rules

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The parif for the egress rules need to be dynamically
configured based on the port type.
PARIF is handler to a partition of the physical port.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
This commit is contained in:
Kishore Padmanabha 2020-07-23 17:26:27 +05:30 committed by Ferruh Yigit
parent 772656956f
commit f7df1c75b7
7 changed files with 123 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/net/bnxt/tf_ulp/ulp_def_rules.c
View File

@ -81,17 +81,12 @@ ulp_set_parif_in_comp_fld(struct bnxt_ulp_context *ulp_ctx,
if (rc)
return rc;
if (parif_type == BNXT_ULP_PHY_PORT_PARIF) {
if (parif_type == BNXT_ULP_PHY_PORT_PARIF)
idx = BNXT_ULP_CF_IDX_PHY_PORT_PARIF;
/* Parif needs to be reset to a free partition */
parif += BNXT_ULP_FREE_PARIF_BASE;
} else if (parif_type == BNXT_ULP_DRV_FUNC_PARIF) {
else if (parif_type == BNXT_ULP_DRV_FUNC_PARIF)
idx = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF;
/* Parif needs to be reset to a free partition */
parif += BNXT_ULP_FREE_PARIF_BASE;
} else {
else
idx = BNXT_ULP_CF_IDX_VF_FUNC_PARIF;
}
ULP_COMP_FLD_IDX_WR(mapper_params, idx, parif);

35
drivers/net/bnxt/tf_ulp/ulp_mapper.c
View File

@ -998,6 +998,41 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
}
break;
case BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF:
if (!ulp_operand_read(fld->result_operand,
(uint8_t *)&idx,
sizeof(uint16_t))) {
BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
return -EINVAL;
}
idx = tfp_be_to_cpu_16(idx);
if (idx >= BNXT_ULP_CF_IDX_LAST) {
BNXT_TF_DBG(ERR, "%s invalid index %u\n", name, idx);
return -EINVAL;
}
/* check if the computed field is set */
if (ULP_COMP_FLD_IDX_RD(parms, idx))
val = fld->result_operand_true;
else
val = fld->result_operand_false;
/* read the appropriate computed field */
if (!ulp_operand_read(val, (uint8_t *)&idx, sizeof(uint16_t))) {
BNXT_TF_DBG(ERR, "%s val operand read failed\n", name);
return -EINVAL;
}
idx = tfp_be_to_cpu_16(idx);
if (idx >= BNXT_ULP_CF_IDX_LAST) {
BNXT_TF_DBG(ERR, "%s invalid index %u\n", name, idx);
return -EINVAL;
}
val = ulp_blob_push_32(blob, &parms->comp_fld[idx],
fld->field_bit_size);
if (!val) {
BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
return -EINVAL;
}
break;
default:
BNXT_TF_DBG(ERR, "invalid result mapper opcode 0x%x\n",
fld->result_opcode);

2
drivers/net/bnxt/tf_ulp/ulp_port_db.c
View File

@ -372,6 +372,8 @@ ulp_port_db_parif_get(struct bnxt_ulp_context *ulp_ctxt,
phy_port_id = port_db->ulp_func_id_tbl[func_id].phy_port_id;
*parif = port_db->phy_port_list[phy_port_id].port_parif;
}
/* Parif needs to be reset to a free partition */
*parif += BNXT_ULP_FREE_PARIF_BASE;
return 0;
}

54
drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
View File

@ -167,31 +167,63 @@ bnxt_ulp_comp_fld_intf_update(struct ulp_rte_parser_params *params)
{
uint32_t ifindex;
uint16_t port_id, parif;
uint32_t mtype;
enum bnxt_ulp_direction_type dir;
/* get the direction details */
dir = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_DIRECTION);
/* read the port id details */
port_id = ULP_COMP_FLD_IDX_RD(params,
BNXT_ULP_CF_IDX_INCOMING_IF);
if (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx,
port_id,
&ifindex)) {
BNXT_TF_DBG(ERR, "ParseErr:Portid is not valid\n");
return;
}
if (dir == BNXT_ULP_DIR_INGRESS) {
/* read the port id details */
port_id = ULP_COMP_FLD_IDX_RD(params,
BNXT_ULP_CF_IDX_INCOMING_IF);
if (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx,
port_id,
&ifindex)) {
BNXT_TF_DBG(ERR, "ParseErr:Portid is not valid\n");
return;
}
/* Set port PARIF */
if (ulp_port_db_parif_get(params->ulp_ctx, ifindex,
BNXT_ULP_PHY_PORT_PARIF, &parif)) {
BNXT_TF_DBG(ERR, "ParseErr:ifindex is not valid\n");
return;
}
/* Parif needs to be reset to a free partition */
parif += BNXT_ULP_FREE_PARIF_BASE;
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
parif);
} else {
/* Get the match port type */
mtype = ULP_COMP_FLD_IDX_RD(params,
BNXT_ULP_CF_IDX_MATCH_PORT_TYPE);
if (mtype == BNXT_ULP_INTF_TYPE_VF_REP) {
ULP_COMP_FLD_IDX_WR(params,
BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP,
1);
/* Set VF func PARIF */
if (ulp_port_db_parif_get(params->ulp_ctx, ifindex,
BNXT_ULP_VF_FUNC_PARIF,
&parif)) {
BNXT_TF_DBG(ERR,
"ParseErr:ifindex is not valid\n");
return;
}
ULP_COMP_FLD_IDX_WR(params,
BNXT_ULP_CF_IDX_VF_FUNC_PARIF,
parif);
} else {
/* Set DRV func PARIF */
if (ulp_port_db_parif_get(params->ulp_ctx, ifindex,
BNXT_ULP_DRV_FUNC_PARIF,
&parif)) {
BNXT_TF_DBG(ERR,
"ParseErr:ifindex is not valid\n");
return;
}
ULP_COMP_FLD_IDX_WR(params,
BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
parif);
}
}
}

16
drivers/net/bnxt/tf_ulp/ulp_template_db_act.c
View File

@ -1808,11 +1808,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {
},
{
.field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST,
.result_operand = {
BNXT_ULP_SYM_DECAP_FUNC_THRU_TUN,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff,
((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff,
((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff,
((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff,
((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff,
((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff,
((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff,
(uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 12,

25
drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
View File

@ -5058,7 +5058,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
},
{
.field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
@ -5149,7 +5151,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
},
{
.field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
@ -17054,11 +17058,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {
},
{
.field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF,
.result_operand = {
BNXT_ULP_SYM_VF_FUNC_PARIF,
(BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff,
BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_true = {
(BNXT_ULP_CF_IDX_VF_FUNC_PARIF >> 8) & 0xff,
BNXT_ULP_CF_IDX_VF_FUNC_PARIF & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_false = {
(BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff,
BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 8,

14
drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
View File

@ -127,11 +127,12 @@ enum bnxt_ulp_cf_idx {
BNXT_ULP_CF_IDX_ACT_PORT_IS_SET = 35,
BNXT_ULP_CF_IDX_ACT_PORT_TYPE = 36,
BNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 37,
BNXT_ULP_CF_IDX_VF_TO_VF = 38,
BNXT_ULP_CF_IDX_L3_HDR_CNT = 39,
BNXT_ULP_CF_IDX_L4_HDR_CNT = 40,
BNXT_ULP_CF_IDX_VFR_MODE = 41,
BNXT_ULP_CF_IDX_LAST = 42
BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP = 38,
BNXT_ULP_CF_IDX_VF_TO_VF = 39,
BNXT_ULP_CF_IDX_L3_HDR_CNT = 40,
BNXT_ULP_CF_IDX_L4_HDR_CNT = 41,
BNXT_ULP_CF_IDX_VFR_MODE = 42,
BNXT_ULP_CF_IDX_LAST = 43
};
enum bnxt_ulp_cond_opcode {
@ -215,7 +216,8 @@ enum bnxt_ulp_mapper_opc {
BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8,
BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9,
BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10,
BNXT_ULP_MAPPER_OPC_LAST = 11
BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11,
BNXT_ULP_MAPPER_OPC_LAST = 12
};
enum bnxt_ulp_mark_db_opcode {