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net/txgbe: support ethertype filter add and delete

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Support add and delete operations on ethertype filter.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
This commit is contained in:
Jiawen Wu 2020-12-18 17:36:34 +08:00 committed by Ferruh Yigit
parent b7eeecb175
commit f8e2cfc770
2 changed files with 109 additions and 0 deletions
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91
drivers/net/txgbe/txgbe_ethdev.c
View File

@ -3798,6 +3798,77 @@ txgbe_add_del_ntuple_filter(struct rte_eth_dev *dev,
return 0;
}
int
txgbe_add_del_ethertype_filter(struct rte_eth_dev *dev,
struct rte_eth_ethertype_filter *filter,
bool add)
{
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(dev);
uint32_t etqf = 0;
uint32_t etqs = 0;
int ret;
struct txgbe_ethertype_filter ethertype_filter;
if (filter->queue >= TXGBE_MAX_RX_QUEUE_NUM)
return -EINVAL;
if (filter->ether_type == RTE_ETHER_TYPE_IPV4 ||
filter->ether_type == RTE_ETHER_TYPE_IPV6) {
PMD_DRV_LOG(ERR, "unsupported ether_type(0x%04x) in"
" ethertype filter.", filter->ether_type);
return -EINVAL;
}
if (filter->flags & RTE_ETHTYPE_FLAGS_MAC) {
PMD_DRV_LOG(ERR, "mac compare is unsupported.");
return -EINVAL;
}
if (filter->flags & RTE_ETHTYPE_FLAGS_DROP) {
PMD_DRV_LOG(ERR, "drop option is unsupported.");
return -EINVAL;
}
ret = txgbe_ethertype_filter_lookup(filter_info, filter->ether_type);
if (ret >= 0 && add) {
PMD_DRV_LOG(ERR, "ethertype (0x%04x) filter exists.",
filter->ether_type);
return -EEXIST;
}
if (ret < 0 && !add) {
PMD_DRV_LOG(ERR, "ethertype (0x%04x) filter doesn't exist.",
filter->ether_type);
return -ENOENT;
}
if (add) {
etqf = TXGBE_ETFLT_ENA;
etqf |= TXGBE_ETFLT_ETID(filter->ether_type);
etqs |= TXGBE_ETCLS_QPID(filter->queue);
etqs |= TXGBE_ETCLS_QENA;
ethertype_filter.ethertype = filter->ether_type;
ethertype_filter.etqf = etqf;
ethertype_filter.etqs = etqs;
ethertype_filter.conf = FALSE;
ret = txgbe_ethertype_filter_insert(filter_info,
&ethertype_filter);
if (ret < 0) {
PMD_DRV_LOG(ERR, "ethertype filters are full.");
return -ENOSPC;
}
} else {
ret = txgbe_ethertype_filter_remove(filter_info, (uint8_t)ret);
if (ret < 0)
return -ENOSYS;
}
wr32(hw, TXGBE_ETFLT(ret), etqf);
wr32(hw, TXGBE_ETCLS(ret), etqs);
txgbe_flush(hw);
return 0;
}
static int
txgbe_dev_filter_ctrl(__rte_unused struct rte_eth_dev *dev,
enum rte_filter_type filter_type,
@ -4355,10 +4426,30 @@ txgbe_ntuple_filter_restore(struct rte_eth_dev *dev)
}
}
/* restore ethernet type filter */
static inline void
txgbe_ethertype_filter_restore(struct rte_eth_dev *dev)
{
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(dev);
int i;
for (i = 0; i < TXGBE_ETF_ID_MAX; i++) {
if (filter_info->ethertype_mask & (1 << i)) {
wr32(hw, TXGBE_ETFLT(i),
filter_info->ethertype_filters[i].etqf);
wr32(hw, TXGBE_ETCLS(i),
filter_info->ethertype_filters[i].etqs);
txgbe_flush(hw);
}
}
}
static int
txgbe_filter_restore(struct rte_eth_dev *dev)
{
txgbe_ntuple_filter_restore(dev);
txgbe_ethertype_filter_restore(dev);
return 0;
}

18
drivers/net/txgbe/txgbe_ethdev.h
View File

@ -320,6 +320,10 @@ bool txgbe_rss_update_sp(enum txgbe_mac_type mac_type);
int txgbe_add_del_ntuple_filter(struct rte_eth_dev *dev,
struct rte_eth_ntuple_filter *filter,
bool add);
int txgbe_add_del_ethertype_filter(struct rte_eth_dev *dev,
struct rte_eth_ethertype_filter *filter,
bool add);
void txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
uint8_t queue, uint8_t msix_vector);
@ -384,6 +388,20 @@ txgbe_ethertype_filter_insert(struct txgbe_filter_info *filter_info,
return (i < TXGBE_ETF_ID_MAX ? i : -1);
}
static inline int
txgbe_ethertype_filter_remove(struct txgbe_filter_info *filter_info,
uint8_t idx)
{
if (idx >= TXGBE_ETF_ID_MAX)
return -1;
filter_info->ethertype_mask &= ~(1 << idx);
filter_info->ethertype_filters[idx].ethertype = 0;
filter_info->ethertype_filters[idx].etqf = 0;
filter_info->ethertype_filters[idx].etqs = 0;
filter_info->ethertype_filters[idx].etqs = FALSE;
return idx;
}
/* High threshold controlling when to start sending XOFF frames. */
#define TXGBE_FC_XOFF_HITH 128 /*KB*/
/* Low threshold controlling when to start sending XON frames. */