net/bnxt: add L2 filter alloc/init/free
Add the L2 filter structure and the alloc/init/free functions for dealing with them. A filter is used to identify traffic that contains a matching set of parameters like unicast or broadcast MAC address or a VLAN tag amongst other things which then allows the ASIC to direct the incoming traffic to an appropriate VNIC or Rx ring. New HWRM calls: bnxt_hwrm_clear_filter: Free a L2 filter. bnxt_hwrm_set_filter Allocate an An L2 filter or a L2 context. Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Signed-off-by: Stephen Hurd <stephen.hurd@broadcom.com> Reviewed-by: David Christensen <david.christensen@broadcom.com>
This commit is contained in:
parent
f2a768d4d1
commit
f92735db1e
@ -50,6 +50,7 @@ EXPORT_MAP := rte_pmd_bnxt_version.map
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#
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SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_cpr.c
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SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_ethdev.c
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SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_filter.c
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SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_hwrm.c
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SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_ring.c
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SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_vnic.c
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@ -145,6 +145,9 @@ struct bnxt {
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struct bnxt_vnic_info *vnic_info;
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STAILQ_HEAD(, bnxt_vnic_info) free_vnic_list;
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struct bnxt_filter_info *filter_info;
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STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
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/* VNIC pointer for flow filter (VMDq) pools */
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#define MAX_FF_POOLS ETH_64_POOLS
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STAILQ_HEAD(, bnxt_vnic_info) ff_pool[MAX_FF_POOLS];
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175
drivers/net/bnxt/bnxt_filter.c
Normal file
175
drivers/net/bnxt/bnxt_filter.c
Normal file
@ -0,0 +1,175 @@
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/*-
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* BSD LICENSE
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*
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* Copyright(c) Broadcom Limited.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Broadcom Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/queue.h>
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#include <rte_log.h>
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#include <rte_malloc.h>
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#include "bnxt.h"
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#include "bnxt_filter.h"
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#include "bnxt_hwrm.h"
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#include "bnxt_vnic.h"
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#include "hsi_struct_def_dpdk.h"
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/*
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* Filter Functions
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*/
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struct bnxt_filter_info *bnxt_alloc_filter(struct bnxt *bp)
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{
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struct bnxt_filter_info *filter;
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/* Find the 1st unused filter from the free_filter_list pool*/
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filter = STAILQ_FIRST(&bp->free_filter_list);
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if (!filter) {
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RTE_LOG(ERR, PMD, "No more free filter resources\n");
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return NULL;
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}
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STAILQ_REMOVE_HEAD(&bp->free_filter_list, next);
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/* Default to L2 MAC Addr filter */
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filter->flags = HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
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filter->enables = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
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HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
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memcpy(filter->l2_addr, bp->eth_dev->data->mac_addrs->addr_bytes,
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ETHER_ADDR_LEN);
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memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
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return filter;
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}
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void bnxt_init_filters(struct bnxt *bp)
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{
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struct bnxt_filter_info *filter;
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int i, max_filters;
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if (BNXT_PF(bp)) {
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struct bnxt_pf_info *pf = &bp->pf;
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max_filters = pf->max_l2_ctx;
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} else {
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struct bnxt_vf_info *vf = &bp->vf;
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max_filters = vf->max_l2_ctx;
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}
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STAILQ_INIT(&bp->free_filter_list);
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for (i = 0; i < max_filters; i++) {
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filter = &bp->filter_info[i];
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filter->fw_l2_filter_id = -1;
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STAILQ_INSERT_TAIL(&bp->free_filter_list, filter, next);
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}
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}
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void bnxt_free_all_filters(struct bnxt *bp)
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{
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struct bnxt_vnic_info *vnic;
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struct bnxt_filter_info *filter, *temp_filter;
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int i;
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for (i = 0; i < MAX_FF_POOLS; i++) {
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STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
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filter = STAILQ_FIRST(&vnic->filter);
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while (filter) {
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temp_filter = STAILQ_NEXT(filter, next);
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STAILQ_REMOVE(&vnic->filter, filter,
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bnxt_filter_info, next);
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STAILQ_INSERT_TAIL(&bp->free_filter_list,
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filter, next);
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filter = temp_filter;
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}
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STAILQ_INIT(&vnic->filter);
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}
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}
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}
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void bnxt_free_filter_mem(struct bnxt *bp)
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{
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struct bnxt_filter_info *filter;
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uint16_t max_filters, i;
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int rc = 0;
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/* Ensure that all filters are freed */
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if (BNXT_PF(bp)) {
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struct bnxt_pf_info *pf = &bp->pf;
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max_filters = pf->max_l2_ctx;
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} else {
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struct bnxt_vf_info *vf = &bp->vf;
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max_filters = vf->max_l2_ctx;
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}
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for (i = 0; i < max_filters; i++) {
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filter = &bp->filter_info[i];
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if (filter->fw_l2_filter_id != ((uint64_t)-1)) {
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RTE_LOG(ERR, PMD, "HWRM filter is not freed??\n");
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/* Call HWRM to try to free filter again */
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rc = bnxt_hwrm_clear_filter(bp, filter);
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if (rc)
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RTE_LOG(ERR, PMD,
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"HWRM filter cannot be freed rc = %d\n",
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rc);
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}
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filter->fw_l2_filter_id = -1;
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}
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STAILQ_INIT(&bp->free_filter_list);
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rte_free(bp->filter_info);
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bp->filter_info = NULL;
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}
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int bnxt_alloc_filter_mem(struct bnxt *bp)
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{
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struct bnxt_filter_info *filter_mem;
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uint16_t max_filters;
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if (BNXT_PF(bp)) {
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struct bnxt_pf_info *pf = &bp->pf;
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max_filters = pf->max_l2_ctx;
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} else {
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struct bnxt_vf_info *vf = &bp->vf;
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max_filters = vf->max_l2_ctx;
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}
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/* Allocate memory for VNIC pool and filter pool */
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filter_mem = rte_zmalloc("bnxt_filter_info",
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max_filters * sizeof(struct bnxt_filter_info),
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0);
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if (filter_mem == NULL) {
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RTE_LOG(ERR, PMD, "Failed to alloc memory for %d filters",
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max_filters);
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return -ENOMEM;
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}
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bp->filter_info = filter_mem;
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return 0;
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}
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74
drivers/net/bnxt/bnxt_filter.h
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74
drivers/net/bnxt/bnxt_filter.h
Normal file
@ -0,0 +1,74 @@
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/*-
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* BSD LICENSE
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*
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* Copyright(c) Broadcom Limited.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Broadcom Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _BNXT_FILTER_H_
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#define _BNXT_FILTER_H_
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#include <rte_ether.h>
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struct bnxt;
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struct bnxt_filter_info {
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STAILQ_ENTRY(bnxt_filter_info) next;
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uint64_t fw_l2_filter_id;
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#define INVALID_MAC_INDEX ((uint16_t)-1)
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uint16_t mac_index;
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/* Filter Characteristics */
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uint32_t flags;
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uint32_t enables;
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uint8_t l2_addr[ETHER_ADDR_LEN];
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uint8_t l2_addr_mask[ETHER_ADDR_LEN];
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uint16_t l2_ovlan;
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uint16_t l2_ovlan_mask;
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uint16_t l2_ivlan;
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uint16_t l2_ivlan_mask;
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uint8_t t_l2_addr[ETHER_ADDR_LEN];
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uint8_t t_l2_addr_mask[ETHER_ADDR_LEN];
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uint16_t t_l2_ovlan;
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uint16_t t_l2_ovlan_mask;
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uint16_t t_l2_ivlan;
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uint16_t t_l2_ivlan_mask;
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uint8_t tunnel_type;
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uint16_t mirror_vnic_id;
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uint32_t vni;
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uint8_t pri_hint;
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uint64_t l2_filter_id_hint;
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};
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struct bnxt_filter_info *bnxt_alloc_filter(struct bnxt *bp);
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void bnxt_init_filters(struct bnxt *bp);
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void bnxt_free_all_filters(struct bnxt *bp);
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void bnxt_free_filter_mem(struct bnxt *bp);
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int bnxt_alloc_filter_mem(struct bnxt *bp);
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#endif
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@ -39,7 +39,9 @@
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#include <rte_version.h>
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#include "bnxt.h"
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#include "bnxt_filter.h"
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#include "bnxt_hwrm.h"
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#include "bnxt_vnic.h"
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#include "hsi_struct_def_dpdk.h"
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#define HWRM_CMD_TIMEOUT 2000
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@ -135,6 +137,69 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg, uint32_t msg_len)
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} \
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}
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int bnxt_hwrm_clear_filter(struct bnxt *bp,
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struct bnxt_filter_info *filter)
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{
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int rc = 0;
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struct hwrm_cfa_l2_filter_free_input req = {.req_type = 0 };
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struct hwrm_cfa_l2_filter_free_output *resp = bp->hwrm_cmd_resp_addr;
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HWRM_PREP(req, CFA_L2_FILTER_FREE, -1, resp);
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req.l2_filter_id = rte_cpu_to_le_64(filter->fw_l2_filter_id);
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rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
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HWRM_CHECK_RESULT;
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filter->fw_l2_filter_id = -1;
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return 0;
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}
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int bnxt_hwrm_set_filter(struct bnxt *bp,
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struct bnxt_vnic_info *vnic,
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struct bnxt_filter_info *filter)
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{
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int rc = 0;
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struct hwrm_cfa_l2_filter_alloc_input req = {.req_type = 0 };
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struct hwrm_cfa_l2_filter_alloc_output *resp = bp->hwrm_cmd_resp_addr;
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uint32_t enables = 0;
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HWRM_PREP(req, CFA_L2_FILTER_ALLOC, -1, resp);
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req.flags = rte_cpu_to_le_32(filter->flags);
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enables = filter->enables |
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HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID;
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req.dst_id = rte_cpu_to_le_16(vnic->fw_vnic_id);
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if (enables &
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HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR)
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memcpy(req.l2_addr, filter->l2_addr,
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ETHER_ADDR_LEN);
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if (enables &
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HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK)
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memcpy(req.l2_addr_mask, filter->l2_addr_mask,
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ETHER_ADDR_LEN);
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if (enables &
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HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN)
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req.l2_ovlan = filter->l2_ovlan;
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if (enables &
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HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK)
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req.l2_ovlan_mask = filter->l2_ovlan_mask;
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req.enables = rte_cpu_to_le_32(enables);
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rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
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HWRM_CHECK_RESULT;
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filter->fw_l2_filter_id = rte_le_to_cpu_64(resp->l2_filter_id);
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return rc;
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}
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int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, void *fwd_cmd)
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{
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int rc;
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@ -41,6 +41,12 @@
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#define HWRM_SEQ_ID_INVALID -1U
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int bnxt_hwrm_clear_filter(struct bnxt *bp,
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struct bnxt_filter_info *filter);
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int bnxt_hwrm_set_filter(struct bnxt *bp,
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struct bnxt_vnic_info *vnic,
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struct bnxt_filter_info *filter);
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int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, void *fwd_cmd);
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int bnxt_hwrm_func_driver_register(struct bnxt *bp, uint32_t flags,
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@ -253,6 +253,462 @@ struct output {
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uint16_t resp_len;
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} __attribute__((packed));
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/* hwrm_cfa_l2_filter_alloc */
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/*
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* A filter is used to identify traffic that contains a matching set of
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* parameters like unicast or broadcast MAC address or a VLAN tag amongst
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* other things which then allows the ASIC to direct the incoming traffic
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* to an appropriate VNIC or Rx ring.
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*/
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/* Input (96 bytes) */
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struct hwrm_cfa_l2_filter_alloc_input {
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/*
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* This value indicates what type of request this is. The format for the
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* rest of the command is determined by this field.
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*/
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uint16_t req_type;
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/*
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* This value indicates the what completion ring the request will be
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* optionally completed on. If the value is -1, then no CR completion
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* will be generated. Any other value must be a valid CR ring_id value
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* for this function.
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*/
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uint16_t cmpl_ring;
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/* This value indicates the command sequence number. */
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uint16_t seq_id;
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/*
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* Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
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* 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
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*/
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uint16_t target_id;
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/*
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* This is the host address where the response will be written when the
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* request is complete. This area must be 16B aligned and must be
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* cleared to zero before the request is made.
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*/
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uint64_t resp_addr;
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/*
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* Enumeration denoting the RX, TX type of the resource. This
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* enumeration is used for resources that are similar for both TX and RX
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* paths of the chip.
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*/
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#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
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UINT32_C(0x1)
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/* tx path */
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#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
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(UINT32_C(0x0) << 0)
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/* rx path */
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#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
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(UINT32_C(0x1) << 0)
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#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
|
||||
HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
|
||||
/*
|
||||
* Setting of this flag indicates the applicability to the loopback
|
||||
* path.
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
|
||||
UINT32_C(0x2)
|
||||
/*
|
||||
* Setting of this flag indicates drop action. If this flag is not set,
|
||||
* then it should be considered accept action.
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
|
||||
UINT32_C(0x4)
|
||||
/*
|
||||
* If this flag is set, all t_l2_* fields are invalid and they should
|
||||
* not be specified. If this flag is set, then l2_* fields refer to
|
||||
* fields of outermost L2 header.
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
|
||||
UINT32_C(0x8)
|
||||
uint32_t flags;
|
||||
|
||||
/* This bit must be '1' for the l2_addr field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
|
||||
UINT32_C(0x1)
|
||||
/* This bit must be '1' for the l2_addr_mask field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
|
||||
UINT32_C(0x2)
|
||||
/* This bit must be '1' for the l2_ovlan field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
|
||||
UINT32_C(0x4)
|
||||
/* This bit must be '1' for the l2_ovlan_mask field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
|
||||
UINT32_C(0x8)
|
||||
/* This bit must be '1' for the l2_ivlan field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
|
||||
UINT32_C(0x10)
|
||||
/* This bit must be '1' for the l2_ivlan_mask field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
|
||||
UINT32_C(0x20)
|
||||
/* This bit must be '1' for the t_l2_addr field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
|
||||
UINT32_C(0x40)
|
||||
/*
|
||||
* This bit must be '1' for the t_l2_addr_mask field to be configured.
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
|
||||
UINT32_C(0x80)
|
||||
/* This bit must be '1' for the t_l2_ovlan field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
|
||||
UINT32_C(0x100)
|
||||
/*
|
||||
* This bit must be '1' for the t_l2_ovlan_mask field to be configured.
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
|
||||
UINT32_C(0x200)
|
||||
/* This bit must be '1' for the t_l2_ivlan field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
|
||||
UINT32_C(0x400)
|
||||
/*
|
||||
* This bit must be '1' for the t_l2_ivlan_mask field to be configured.
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
|
||||
UINT32_C(0x800)
|
||||
/* This bit must be '1' for the src_type field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
|
||||
UINT32_C(0x1000)
|
||||
/* This bit must be '1' for the src_id field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
|
||||
UINT32_C(0x2000)
|
||||
/* This bit must be '1' for the tunnel_type field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
|
||||
UINT32_C(0x4000)
|
||||
/* This bit must be '1' for the dst_id field to be configured. */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
|
||||
UINT32_C(0x8000)
|
||||
/*
|
||||
* This bit must be '1' for the mirror_vnic_id field to be configured.
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
|
||||
UINT32_C(0x10000)
|
||||
uint32_t enables;
|
||||
|
||||
/*
|
||||
* This value sets the match value for the L2 MAC address. Destination
|
||||
* MAC address for RX path. Source MAC address for TX path.
|
||||
*/
|
||||
uint8_t l2_addr[6];
|
||||
|
||||
uint8_t unused_0;
|
||||
uint8_t unused_1;
|
||||
|
||||
/*
|
||||
* This value sets the mask value for the L2 address. A value of 0 will
|
||||
* mask the corresponding bit from compare.
|
||||
*/
|
||||
uint8_t l2_addr_mask[6];
|
||||
|
||||
/* This value sets VLAN ID value for outer VLAN. */
|
||||
uint16_t l2_ovlan;
|
||||
|
||||
/*
|
||||
* This value sets the mask value for the ovlan id. A value of 0 will
|
||||
* mask the corresponding bit from compare.
|
||||
*/
|
||||
uint16_t l2_ovlan_mask;
|
||||
|
||||
/* This value sets VLAN ID value for inner VLAN. */
|
||||
uint16_t l2_ivlan;
|
||||
|
||||
/*
|
||||
* This value sets the mask value for the ivlan id. A value of 0 will
|
||||
* mask the corresponding bit from compare.
|
||||
*/
|
||||
uint16_t l2_ivlan_mask;
|
||||
|
||||
uint8_t unused_2;
|
||||
uint8_t unused_3;
|
||||
|
||||
/*
|
||||
* This value sets the match value for the tunnel L2 MAC address.
|
||||
* Destination MAC address for RX path. Source MAC address for TX path.
|
||||
*/
|
||||
uint8_t t_l2_addr[6];
|
||||
|
||||
uint8_t unused_4;
|
||||
uint8_t unused_5;
|
||||
|
||||
/*
|
||||
* This value sets the mask value for the tunnel L2 address. A value of
|
||||
* 0 will mask the corresponding bit from compare.
|
||||
*/
|
||||
uint8_t t_l2_addr_mask[6];
|
||||
|
||||
/* This value sets VLAN ID value for tunnel outer VLAN. */
|
||||
uint16_t t_l2_ovlan;
|
||||
|
||||
/*
|
||||
* This value sets the mask value for the tunnel ovlan id. A value of 0
|
||||
* will mask the corresponding bit from compare.
|
||||
*/
|
||||
uint16_t t_l2_ovlan_mask;
|
||||
|
||||
/* This value sets VLAN ID value for tunnel inner VLAN. */
|
||||
uint16_t t_l2_ivlan;
|
||||
|
||||
/*
|
||||
* This value sets the mask value for the tunnel ivlan id. A value of 0
|
||||
* will mask the corresponding bit from compare.
|
||||
*/
|
||||
uint16_t t_l2_ivlan_mask;
|
||||
|
||||
/* This value identifies the type of source of the packet. */
|
||||
/* Network port */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
|
||||
(UINT32_C(0x0) << 0)
|
||||
/* Physical function */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
|
||||
(UINT32_C(0x1) << 0)
|
||||
/* Virtual function */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
|
||||
(UINT32_C(0x2) << 0)
|
||||
/* Virtual NIC of a function */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
|
||||
(UINT32_C(0x3) << 0)
|
||||
/* Embedded processor for CFA management */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
|
||||
(UINT32_C(0x4) << 0)
|
||||
/* Embedded processor for OOB management */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
|
||||
(UINT32_C(0x5) << 0)
|
||||
/* Embedded processor for RoCE */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
|
||||
(UINT32_C(0x6) << 0)
|
||||
/* Embedded processor for network proxy functions */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
|
||||
(UINT32_C(0x7) << 0)
|
||||
uint8_t src_type;
|
||||
|
||||
uint8_t unused_6;
|
||||
/*
|
||||
* This value is the id of the source. For a network port, it represents
|
||||
* port_id. For a physical function, it represents fid. For a virtual
|
||||
* function, it represents vf_id. For a vnic, it represents vnic_id. For
|
||||
* embedded processors, this id is not valid. Notes: 1. The function ID
|
||||
* is implied if it src_id is not provided for a src_type that is either
|
||||
*/
|
||||
uint32_t src_id;
|
||||
|
||||
/* Tunnel Type. */
|
||||
/* Non-tunnel */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
|
||||
(UINT32_C(0x0) << 0)
|
||||
/* Virtual eXtensible Local Area Network (VXLAN) */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
|
||||
(UINT32_C(0x1) << 0)
|
||||
/*
|
||||
* Network Virtualization Generic Routing Encapsulation (NVGRE)
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
|
||||
(UINT32_C(0x2) << 0)
|
||||
/*
|
||||
* Generic Routing Encapsulation (GRE) inside Ethernet payload
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
|
||||
(UINT32_C(0x3) << 0)
|
||||
/* IP in IP */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
|
||||
(UINT32_C(0x4) << 0)
|
||||
/* Generic Network Virtualization Encapsulation (Geneve) */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
|
||||
(UINT32_C(0x5) << 0)
|
||||
/* Multi-Protocol Lable Switching (MPLS) */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
|
||||
(UINT32_C(0x6) << 0)
|
||||
/* Stateless Transport Tunnel (STT) */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
|
||||
(UINT32_C(0x7) << 0)
|
||||
/*
|
||||
* Generic Routing Encapsulation (GRE) inside IP datagram
|
||||
* payload
|
||||
*/
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
|
||||
(UINT32_C(0x8) << 0)
|
||||
/* Any tunneled traffic */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
|
||||
(UINT32_C(0xff) << 0)
|
||||
uint8_t tunnel_type;
|
||||
|
||||
uint8_t unused_7;
|
||||
|
||||
/*
|
||||
* If set, this value shall represent the Logical VNIC ID of the
|
||||
* destination VNIC for the RX path and network port id of the
|
||||
* destination port for the TX path.
|
||||
*/
|
||||
uint16_t dst_id;
|
||||
|
||||
/* Logical VNIC ID of the VNIC where traffic is mirrored. */
|
||||
uint16_t mirror_vnic_id;
|
||||
|
||||
/*
|
||||
* This hint is provided to help in placing the filter in the filter
|
||||
* table.
|
||||
*/
|
||||
/* No preference */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
|
||||
(UINT32_C(0x0) << 0)
|
||||
/* Above the given filter */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
|
||||
(UINT32_C(0x1) << 0)
|
||||
/* Below the given filter */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
|
||||
(UINT32_C(0x2) << 0)
|
||||
/* As high as possible */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
|
||||
(UINT32_C(0x3) << 0)
|
||||
/* As low as possible */
|
||||
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
|
||||
(UINT32_C(0x4) << 0)
|
||||
uint8_t pri_hint;
|
||||
|
||||
uint8_t unused_8;
|
||||
uint32_t unused_9;
|
||||
|
||||
/*
|
||||
* This is the ID of the filter that goes along with the pri_hint. This
|
||||
* field is valid only for the following values. 1 - Above the given
|
||||
* filter 2 - Below the given filter
|
||||
*/
|
||||
uint64_t l2_filter_id_hint;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Output (24 bytes) */
|
||||
struct hwrm_cfa_l2_filter_alloc_output {
|
||||
/*
|
||||
* Pass/Fail or error type Note: receiver to verify the in parameters,
|
||||
* and fail the call with an error when appropriate
|
||||
*/
|
||||
uint16_t error_code;
|
||||
|
||||
/* This field returns the type of original request. */
|
||||
uint16_t req_type;
|
||||
|
||||
/* This field provides original sequence number of the command. */
|
||||
uint16_t seq_id;
|
||||
|
||||
/*
|
||||
* This field is the length of the response in bytes. The last byte of
|
||||
* the response is a valid flag that will read as '1' when the command
|
||||
* has been completely written to memory.
|
||||
*/
|
||||
uint16_t resp_len;
|
||||
|
||||
/*
|
||||
* This value identifies a set of CFA data structures used for an L2
|
||||
* context.
|
||||
*/
|
||||
uint64_t l2_filter_id;
|
||||
|
||||
/*
|
||||
* This is the ID of the flow associated with this filter. This value
|
||||
* shall be used to match and associate the flow identifier returned in
|
||||
* completion records. A value of 0xFFFFFFFF shall indicate no flow id.
|
||||
*/
|
||||
uint32_t flow_id;
|
||||
|
||||
uint8_t unused_0;
|
||||
uint8_t unused_1;
|
||||
uint8_t unused_2;
|
||||
|
||||
/*
|
||||
* This field is used in Output records to indicate that the output is
|
||||
* completely written to RAM. This field should be read as '1' to
|
||||
* indicate that the output has been completely written. When writing a
|
||||
* command completion or response to an internal processor, the order of
|
||||
* writes has to be such that this field is written last.
|
||||
*/
|
||||
uint8_t valid;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* hwrm_cfa_l2_filter_free */
|
||||
/*
|
||||
* Description: Free a L2 filter. The HWRM shall free all associated filter
|
||||
* resources with the L2 filter.
|
||||
*/
|
||||
|
||||
/* Input (24 bytes) */
|
||||
struct hwrm_cfa_l2_filter_free_input {
|
||||
/*
|
||||
* This value indicates what type of request this is. The format for the
|
||||
* rest of the command is determined by this field.
|
||||
*/
|
||||
uint16_t req_type;
|
||||
|
||||
/*
|
||||
* This value indicates the what completion ring the request will be
|
||||
* optionally completed on. If the value is -1, then no CR completion
|
||||
* will be generated. Any other value must be a valid CR ring_id value
|
||||
* for this function.
|
||||
*/
|
||||
uint16_t cmpl_ring;
|
||||
|
||||
/* This value indicates the command sequence number. */
|
||||
uint16_t seq_id;
|
||||
|
||||
/*
|
||||
* Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
|
||||
* 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
|
||||
*/
|
||||
uint16_t target_id;
|
||||
|
||||
/*
|
||||
* This is the host address where the response will be written when the
|
||||
* request is complete. This area must be 16B aligned and must be
|
||||
* cleared to zero before the request is made.
|
||||
*/
|
||||
uint64_t resp_addr;
|
||||
|
||||
/*
|
||||
* This value identifies a set of CFA data structures used for an L2
|
||||
* context.
|
||||
*/
|
||||
uint64_t l2_filter_id;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Output (16 bytes) */
|
||||
struct hwrm_cfa_l2_filter_free_output {
|
||||
/*
|
||||
* Pass/Fail or error type Note: receiver to verify the in parameters,
|
||||
* and fail the call with an error when appropriate
|
||||
*/
|
||||
uint16_t error_code;
|
||||
|
||||
/* This field returns the type of original request. */
|
||||
uint16_t req_type;
|
||||
|
||||
/* This field provides original sequence number of the command. */
|
||||
uint16_t seq_id;
|
||||
|
||||
/*
|
||||
* This field is the length of the response in bytes. The last byte of
|
||||
* the response is a valid flag that will read as '1' when the command
|
||||
* has been completely written to memory.
|
||||
*/
|
||||
uint16_t resp_len;
|
||||
|
||||
uint32_t unused_0;
|
||||
uint8_t unused_1;
|
||||
uint8_t unused_2;
|
||||
uint8_t unused_3;
|
||||
|
||||
/*
|
||||
* This field is used in Output records to indicate that the output is
|
||||
* completely written to RAM. This field should be read as '1' to
|
||||
* indicate that the output has been completely written. When writing a
|
||||
* command completion or response to an internal processor, the order of
|
||||
* writes has to be such that this field is written last.
|
||||
*/
|
||||
uint8_t valid;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* hwrm_exec_fwd_resp */
|
||||
/*
|
||||
* Description: This command is used to send an encapsulated request to the
|
||||
|
Loading…
Reference in New Issue
Block a user