examples/eventdev: add thread safe Tx worker pipeline
Add worker pipeline when Tx is multi thread safe. Probe Ethernet dev capabilities and select it it is supported. Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
This commit is contained in:
Pavan Nikhilesh
Jerin Jacob
parent
849b2adc57
commit
fa8054c8c8
@ -16,6 +16,7 @@ APP = eventdev_pipeline_sw_pmd
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# all source are stored in SRCS-y
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SRCS-y := main.c
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SRCS-y += pipeline_worker_generic.c
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SRCS-y += pipeline_worker_tx.c
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CFLAGS += -O3
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CFLAGS += $(WERROR_FLAGS)
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@ -364,9 +364,20 @@ init_ports(unsigned int num_ports)
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static void
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do_capability_setup(uint16_t nb_ethdev, uint8_t eventdev_id)
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{
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RTE_SET_USED(nb_ethdev);
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int i;
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uint8_t mt_unsafe = 0;
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uint8_t burst = 0;
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for (i = 0; i < nb_ethdev; i++) {
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struct rte_eth_dev_info dev_info;
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memset(&dev_info, 0, sizeof(struct rte_eth_dev_info));
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rte_eth_dev_info_get(i, &dev_info);
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/* Check if it is safe ask worker to tx. */
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mt_unsafe |= !(dev_info.tx_offload_capa &
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DEV_TX_OFFLOAD_MT_LOCKFREE);
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}
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struct rte_event_dev_info eventdev_info;
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memset(&eventdev_info, 0, sizeof(struct rte_event_dev_info));
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@ -374,7 +385,10 @@ do_capability_setup(uint16_t nb_ethdev, uint8_t eventdev_id)
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burst = eventdev_info.event_dev_cap & RTE_EVENT_DEV_CAP_BURST_MODE ? 1 :
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0;
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set_worker_generic_setup_data(&fdata->cap, burst);
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if (mt_unsafe)
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set_worker_generic_setup_data(&fdata->cap, burst);
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else
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set_worker_tx_setup_data(&fdata->cap, burst);
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}
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static void
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@ -79,6 +79,10 @@ struct config_data {
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int dump_dev_signal;
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unsigned int num_stages;
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unsigned int worker_cq_depth;
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unsigned int rx_stride;
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/* Use rx stride value to reduce congestion in entry queue when using
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* multiple eth ports by forming multiple event queue pipelines.
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*/
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int16_t next_qid[MAX_NUM_STAGES+2];
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int16_t qid[MAX_NUM_STAGES];
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uint8_t rx_adapter_id;
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@ -144,3 +148,4 @@ schedule_devices(unsigned int lcore_id)
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}
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void set_worker_generic_setup_data(struct setup_data *caps, bool burst);
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void set_worker_tx_setup_data(struct setup_data *caps, bool burst);
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425
examples/eventdev_pipeline_sw_pmd/pipeline_worker_tx.c
Normal file
425
examples/eventdev_pipeline_sw_pmd/pipeline_worker_tx.c
Normal file
@ -0,0 +1,425 @@
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/*
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* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2014 Intel Corporation
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* Copyright 2017 Cavium, Inc.
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*/
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#include "pipeline_common.h"
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static __rte_always_inline void
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worker_fwd_event(struct rte_event *ev, uint8_t sched)
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{
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ev->event_type = RTE_EVENT_TYPE_CPU;
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ev->op = RTE_EVENT_OP_FORWARD;
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ev->sched_type = sched;
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}
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static __rte_always_inline void
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worker_event_enqueue(const uint8_t dev, const uint8_t port,
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struct rte_event *ev)
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{
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while (rte_event_enqueue_burst(dev, port, ev, 1) != 1)
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rte_pause();
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}
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static __rte_always_inline void
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worker_tx_pkt(struct rte_mbuf *mbuf)
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{
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exchange_mac(mbuf);
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while (rte_eth_tx_burst(mbuf->port, 0, &mbuf, 1) != 1)
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rte_pause();
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}
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/* Multi stage Pipeline Workers */
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static int
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worker_do_tx(void *arg)
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{
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struct rte_event ev;
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struct worker_data *data = (struct worker_data *)arg;
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const uint8_t dev = data->dev_id;
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const uint8_t port = data->port_id;
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const uint8_t lst_qid = cdata.num_stages - 1;
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size_t fwd = 0, received = 0, tx = 0;
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while (!fdata->done) {
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if (!rte_event_dequeue_burst(dev, port, &ev, 1, 0)) {
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rte_pause();
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continue;
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}
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received++;
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const uint8_t cq_id = ev.queue_id % cdata.num_stages;
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if (cq_id >= lst_qid) {
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if (ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
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worker_tx_pkt(ev.mbuf);
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tx++;
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continue;
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}
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worker_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC);
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ev.queue_id = (cq_id == lst_qid) ?
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cdata.next_qid[ev.queue_id] : ev.queue_id;
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} else {
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ev.queue_id = cdata.next_qid[ev.queue_id];
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worker_fwd_event(&ev, cdata.queue_type);
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}
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work();
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worker_event_enqueue(dev, port, &ev);
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fwd++;
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}
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if (!cdata.quiet)
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printf(" worker %u thread done. RX=%zu FWD=%zu TX=%zu\n",
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rte_lcore_id(), received, fwd, tx);
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return 0;
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}
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static int
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setup_eventdev_worker_tx(struct cons_data *cons_data,
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struct worker_data *worker_data)
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{
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RTE_SET_USED(cons_data);
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uint8_t i;
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const uint8_t dev_id = 0;
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const uint8_t nb_ports = cdata.num_workers;
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uint8_t nb_slots = 0;
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uint8_t nb_queues = rte_eth_dev_count() * cdata.num_stages;
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nb_queues += rte_eth_dev_count();
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struct rte_event_dev_config config = {
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.nb_event_queues = nb_queues,
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.nb_event_ports = nb_ports,
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.nb_events_limit = 4096,
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.nb_event_queue_flows = 1024,
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.nb_event_port_dequeue_depth = 128,
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.nb_event_port_enqueue_depth = 128,
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};
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struct rte_event_port_conf wkr_p_conf = {
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.dequeue_depth = cdata.worker_cq_depth,
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.enqueue_depth = 64,
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.new_event_threshold = 4096,
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};
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struct rte_event_queue_conf wkr_q_conf = {
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.schedule_type = cdata.queue_type,
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
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.nb_atomic_flows = 1024,
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.nb_atomic_order_sequences = 1024,
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};
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int ret, ndev = rte_event_dev_count();
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if (ndev < 1) {
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printf("%d: No Eventdev Devices Found\n", __LINE__);
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return -1;
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}
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struct rte_event_dev_info dev_info;
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ret = rte_event_dev_info_get(dev_id, &dev_info);
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printf("\tEventdev %d: %s\n", dev_id, dev_info.driver_name);
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if (dev_info.max_event_port_dequeue_depth <
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config.nb_event_port_dequeue_depth)
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config.nb_event_port_dequeue_depth =
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dev_info.max_event_port_dequeue_depth;
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if (dev_info.max_event_port_enqueue_depth <
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config.nb_event_port_enqueue_depth)
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config.nb_event_port_enqueue_depth =
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dev_info.max_event_port_enqueue_depth;
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ret = rte_event_dev_configure(dev_id, &config);
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if (ret < 0) {
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printf("%d: Error configuring device\n", __LINE__);
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return -1;
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}
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printf(" Stages:\n");
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for (i = 0; i < nb_queues; i++) {
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uint8_t slot;
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nb_slots = cdata.num_stages + 1;
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slot = i % nb_slots;
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wkr_q_conf.schedule_type = slot == cdata.num_stages ?
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RTE_SCHED_TYPE_ATOMIC : cdata.queue_type;
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if (rte_event_queue_setup(dev_id, i, &wkr_q_conf) < 0) {
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printf("%d: error creating qid %d\n", __LINE__, i);
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return -1;
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}
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cdata.qid[i] = i;
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cdata.next_qid[i] = i+1;
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if (cdata.enable_queue_priorities) {
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const uint32_t prio_delta =
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(RTE_EVENT_DEV_PRIORITY_LOWEST) /
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nb_slots;
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/* higher priority for queues closer to tx */
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wkr_q_conf.priority =
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RTE_EVENT_DEV_PRIORITY_LOWEST - prio_delta *
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(i % nb_slots);
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}
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const char *type_str = "Atomic";
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switch (wkr_q_conf.schedule_type) {
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case RTE_SCHED_TYPE_ORDERED:
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type_str = "Ordered";
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break;
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case RTE_SCHED_TYPE_PARALLEL:
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type_str = "Parallel";
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break;
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}
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printf("\tStage %d, Type %s\tPriority = %d\n", i, type_str,
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wkr_q_conf.priority);
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}
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printf("\n");
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if (wkr_p_conf.dequeue_depth > config.nb_event_port_dequeue_depth)
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wkr_p_conf.dequeue_depth = config.nb_event_port_dequeue_depth;
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if (wkr_p_conf.enqueue_depth > config.nb_event_port_enqueue_depth)
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wkr_p_conf.enqueue_depth = config.nb_event_port_enqueue_depth;
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/* set up one port per worker, linking to all stage queues */
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for (i = 0; i < cdata.num_workers; i++) {
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struct worker_data *w = &worker_data[i];
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w->dev_id = dev_id;
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if (rte_event_port_setup(dev_id, i, &wkr_p_conf) < 0) {
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printf("Error setting up port %d\n", i);
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return -1;
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}
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if (rte_event_port_link(dev_id, i, NULL, NULL, 0)
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!= nb_queues) {
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printf("%d: error creating link for port %d\n",
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__LINE__, i);
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return -1;
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}
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w->port_id = i;
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}
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/*
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* Reduce the load on ingress event queue by splitting the traffic
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* across multiple event queues.
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* for example, nb_stages = 2 and nb_ethdev = 2 then
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*
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* nb_queues = (2 * 2) + 2 = 6 (non atq)
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* rx_stride = 3
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*
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* So, traffic is split across queue 0 and queue 3 since queue id for
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* rx adapter is chosen <ethport_id> * <rx_stride> i.e in the above
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* case eth port 0, 1 will inject packets into event queue 0, 3
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* respectively.
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*
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* This forms two set of queue pipelines 0->1->2->tx and 3->4->5->tx.
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*/
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cdata.rx_stride = nb_slots;
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ret = rte_event_dev_service_id_get(dev_id,
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&fdata->evdev_service_id);
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if (ret != -ESRCH && ret != 0) {
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printf("Error getting the service ID\n");
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return -1;
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}
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rte_service_runstate_set(fdata->evdev_service_id, 1);
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rte_service_set_runstate_mapped_check(fdata->evdev_service_id, 0);
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if (rte_event_dev_start(dev_id) < 0) {
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printf("Error starting eventdev\n");
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return -1;
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}
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return dev_id;
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}
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struct rx_adptr_services {
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uint16_t nb_rx_adptrs;
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uint32_t *rx_adpt_arr;
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};
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static int32_t
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service_rx_adapter(void *arg)
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{
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int i;
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struct rx_adptr_services *adptr_services = arg;
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for (i = 0; i < adptr_services->nb_rx_adptrs; i++)
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rte_service_run_iter_on_app_lcore(
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adptr_services->rx_adpt_arr[i], 1);
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return 0;
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}
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static void
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init_rx_adapter(uint16_t nb_ports)
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{
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int i;
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int ret;
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uint8_t evdev_id = 0;
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struct rx_adptr_services *adptr_services = NULL;
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struct rte_event_dev_info dev_info;
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ret = rte_event_dev_info_get(evdev_id, &dev_info);
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adptr_services = rte_zmalloc(NULL, sizeof(struct rx_adptr_services), 0);
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struct rte_event_port_conf rx_p_conf = {
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.dequeue_depth = 8,
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.enqueue_depth = 8,
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.new_event_threshold = 1200,
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};
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if (rx_p_conf.dequeue_depth > dev_info.max_event_port_dequeue_depth)
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rx_p_conf.dequeue_depth = dev_info.max_event_port_dequeue_depth;
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if (rx_p_conf.enqueue_depth > dev_info.max_event_port_enqueue_depth)
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rx_p_conf.enqueue_depth = dev_info.max_event_port_enqueue_depth;
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struct rte_event_eth_rx_adapter_queue_conf queue_conf = {
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.ev.sched_type = cdata.queue_type,
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};
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for (i = 0; i < nb_ports; i++) {
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uint32_t cap;
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uint32_t service_id;
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ret = rte_event_eth_rx_adapter_create(i, evdev_id, &rx_p_conf);
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if (ret)
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rte_exit(EXIT_FAILURE,
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"failed to create rx adapter[%d]",
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cdata.rx_adapter_id);
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ret = rte_event_eth_rx_adapter_caps_get(evdev_id, i, &cap);
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if (ret)
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rte_exit(EXIT_FAILURE,
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"failed to get event rx adapter "
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"capabilities");
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queue_conf.ev.queue_id = cdata.rx_stride ?
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(i * cdata.rx_stride)
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: (uint8_t)cdata.qid[0];
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ret = rte_event_eth_rx_adapter_queue_add(i, i, -1, &queue_conf);
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if (ret)
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rte_exit(EXIT_FAILURE,
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"Failed to add queues to Rx adapter");
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/* Producer needs to be scheduled. */
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if (!(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT)) {
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ret = rte_event_eth_rx_adapter_service_id_get(i,
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&service_id);
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if (ret != -ESRCH && ret != 0) {
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rte_exit(EXIT_FAILURE,
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"Error getting the service ID for rx adptr\n");
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}
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rte_service_runstate_set(service_id, 1);
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rte_service_set_runstate_mapped_check(service_id, 0);
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adptr_services->nb_rx_adptrs++;
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adptr_services->rx_adpt_arr = rte_realloc(
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adptr_services->rx_adpt_arr,
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adptr_services->nb_rx_adptrs *
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sizeof(uint32_t), 0);
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adptr_services->rx_adpt_arr[
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adptr_services->nb_rx_adptrs - 1] =
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service_id;
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}
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ret = rte_event_eth_rx_adapter_start(i);
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if (ret)
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rte_exit(EXIT_FAILURE, "Rx adapter[%d] start failed",
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cdata.rx_adapter_id);
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}
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if (adptr_services->nb_rx_adptrs) {
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struct rte_service_spec service;
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memset(&service, 0, sizeof(struct rte_service_spec));
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snprintf(service.name, sizeof(service.name), "rx_service");
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service.callback = service_rx_adapter;
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service.callback_userdata = (void *)adptr_services;
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int32_t ret = rte_service_component_register(&service,
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&fdata->rxadptr_service_id);
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if (ret)
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rte_exit(EXIT_FAILURE,
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"Rx adapter[%d] service register failed",
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cdata.rx_adapter_id);
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rte_service_runstate_set(fdata->rxadptr_service_id, 1);
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rte_service_component_runstate_set(fdata->rxadptr_service_id,
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1);
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rte_service_set_runstate_mapped_check(fdata->rxadptr_service_id,
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0);
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} else {
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memset(fdata->rx_core, 0, sizeof(unsigned int) * MAX_NUM_CORE);
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rte_free(adptr_services);
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}
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if (!adptr_services->nb_rx_adptrs && fdata->cap.consumer == NULL &&
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(dev_info.event_dev_cap &
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RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED))
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fdata->cap.scheduler = NULL;
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if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED)
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memset(fdata->sched_core, 0,
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sizeof(unsigned int) * MAX_NUM_CORE);
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}
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static void
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worker_tx_opt_check(void)
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{
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int i;
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int ret;
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||||
uint32_t cap = 0;
|
||||
uint8_t rx_needed = 0;
|
||||
struct rte_event_dev_info eventdev_info;
|
||||
|
||||
memset(&eventdev_info, 0, sizeof(struct rte_event_dev_info));
|
||||
rte_event_dev_info_get(0, &eventdev_info);
|
||||
|
||||
for (i = 0; i < rte_eth_dev_count(); i++) {
|
||||
ret = rte_event_eth_rx_adapter_caps_get(0, i, &cap);
|
||||
if (ret)
|
||||
rte_exit(EXIT_FAILURE,
|
||||
"failed to get event rx adapter "
|
||||
"capabilities");
|
||||
rx_needed |=
|
||||
!(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT);
|
||||
}
|
||||
|
||||
if (cdata.worker_lcore_mask == 0 ||
|
||||
(rx_needed && cdata.rx_lcore_mask == 0) ||
|
||||
(cdata.sched_lcore_mask == 0 &&
|
||||
!(eventdev_info.event_dev_cap &
|
||||
RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED))) {
|
||||
printf("Core part of pipeline was not assigned any cores. "
|
||||
"This will stall the pipeline, please check core masks "
|
||||
"(use -h for details on setting core masks):\n"
|
||||
"\trx: %"PRIu64"\n\ttx: %"PRIu64"\n\tsched: %"PRIu64
|
||||
"\n\tworkers: %"PRIu64"\n",
|
||||
cdata.rx_lcore_mask, cdata.tx_lcore_mask,
|
||||
cdata.sched_lcore_mask,
|
||||
cdata.worker_lcore_mask);
|
||||
rte_exit(-1, "Fix core masks\n");
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
set_worker_tx_setup_data(struct setup_data *caps, bool burst)
|
||||
{
|
||||
RTE_SET_USED(burst);
|
||||
caps->worker = worker_do_tx;
|
||||
|
||||
memset(fdata->tx_core, 0, sizeof(unsigned int) * MAX_NUM_CORE);
|
||||
|
||||
caps->check_opt = worker_tx_opt_check;
|
||||
caps->consumer = NULL;
|
||||
caps->scheduler = schedule_devices;
|
||||
caps->evdev_setup = setup_eventdev_worker_tx;
|
||||
caps->adptr_setup = init_rx_adapter;
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user