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net/mlx5: make FDB default rule optional

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There are RDMA-CORE versions which are not supported multi-table for
some Mellanox mlx5 devices.

Hence, the optimization added in commit [1] which forwards all the FDB
traffic to table 1 cannot be configured.

Make the above optimization optional:
Do not fail when either table 1 cannot be created or the jump rule
(all =>jump to table 1) is not configured successfully.
In this case, all the flows will be configured to table 0.

[1] commit b67b4ecbde ("net/mlx5: skip table zero to improve
insertion rate")

Cc: stable@dpdk.org

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
This commit is contained in:
Matan Azrad 2020-01-28 17:06:43 +00:00 committed by Ferruh Yigit
parent fa69eaef5f
commit fbde43310f
5 changed files with 21 additions and 12 deletions
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1
drivers/net/mlx5/mlx5.h
View File

@ -554,6 +554,7 @@ struct mlx5_priv {
/* UAR same-page access control required in 32bit implementations. */
#endif
uint8_t skip_default_rss_reta; /* Skip configuration of default reta. */
uint8_t fdb_def_rule; /* Whether fdb jump to table 1 is configured. */
};
#define PORT_ID(priv) ((priv)->dev_data->port_id)

6
drivers/net/mlx5/mlx5_flow.c
View File

@ -5577,6 +5577,8 @@ mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
* Value is part of flow rule created by request external to PMD.
* @param[in] group
* rte_flow group index value.
* @param[out] fdb_def_rule
* Whether fdb jump to table 1 is configured.
* @param[out] table
* HW table value.
* @param[out] error
@ -5587,10 +5589,10 @@ mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
*/
int
mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
uint32_t group, uint32_t *table,
uint32_t group, bool fdb_def_rule, uint32_t *table,
struct rte_flow_error *error)
{
if (attributes->transfer && external) {
if (attributes->transfer && external && fdb_def_rule) {
if (group == UINT32_MAX)
return rte_flow_error_set
(error, EINVAL,

4
drivers/net/mlx5/mlx5_flow.h
View File

@ -754,8 +754,8 @@ uint32_t mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id);
uint32_t mlx5_flow_id_release(struct mlx5_flow_id_pool *pool,
uint32_t id);
int mlx5_flow_group_to_table(const struct rte_flow_attr *attributes,
bool external, uint32_t group, uint32_t *table,
struct rte_flow_error *error);
bool external, uint32_t group, bool fdb_def_rule,
uint32_t *table, struct rte_flow_error *error);
uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, int tunnel,
uint64_t layer_types,
uint64_t hash_fields);

11
drivers/net/mlx5/mlx5_flow_dv.c
View File

@ -3359,7 +3359,7 @@ flow_dv_validate_action_jump(const struct rte_flow_action *action,
target_group =
((const struct rte_flow_action_jump *)action->conf)->group;
ret = mlx5_flow_group_to_table(attributes, external, target_group,
&table, error);
true, &table, error);
if (ret)
return ret;
if (attributes->group == target_group)
@ -4340,7 +4340,7 @@ flow_dv_validate_attributes(struct rte_eth_dev *dev,
int ret;
ret = mlx5_flow_group_to_table(attributes, external,
attributes->group,
attributes->group, !!priv->fdb_def_rule,
&table, error);
if (ret)
return ret;
@ -7017,7 +7017,7 @@ __flow_dv_translate(struct rte_eth_dev *dev,
mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
&table, error);
!!priv->fdb_def_rule, &table, error);
if (ret)
return ret;
dev_flow->group = table;
@ -7285,8 +7285,9 @@ __flow_dv_translate(struct rte_eth_dev *dev,
case RTE_FLOW_ACTION_TYPE_JUMP:
jump_data = action->conf;
ret = mlx5_flow_group_to_table(attr, dev_flow->external,
jump_data->group, &table,
error);
jump_data->group,
!!priv->fdb_def_rule,
&table, error);
if (ret)
return ret;
tbl = flow_dv_tbl_resource_get(dev, table,

11
drivers/net/mlx5/mlx5_trigger.c
View File

@ -423,9 +423,14 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
}
mlx5_txq_release(dev, i);
}
if (priv->config.dv_esw_en && !priv->config.vf)
if (!mlx5_flow_create_esw_table_zero_flow(dev))
goto error;
if (priv->config.dv_esw_en && !priv->config.vf) {
if (mlx5_flow_create_esw_table_zero_flow(dev))
priv->fdb_def_rule = 1;
else
DRV_LOG(INFO, "port %u FDB default rule cannot be"
" configured - only Eswitch group 0 flows are"
" supported.", dev->data->port_id);
}
if (priv->isolated)
return 0;
if (dev->data->promiscuous) {