net/i40e: fix out of order Rx read
In vPMD, when we load Rx desc with _mm_loadu_si128, the volatile
modifier will be cast away, allowing the compiler to reorder the
load instructions.
The Rx recv function's correctness is relying on these load
instructions following a strict sequence, reading the descriptors
in reverse order, so we add compiler barrier to prevent compiler
reorder.
Fixes: 9ed94e5bb0
("i40e: add vector Rx")
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
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@ -306,6 +306,7 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
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/* Read desc statuses backwards to avoid race condition */
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/* A.1 load 4 pkts desc */
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descs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));
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rte_compiler_barrier();
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/* B.2 copy 2 mbuf point into rx_pkts */
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_mm_storeu_si128((__m128i *)&rx_pkts[pos], mbp1);
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@ -314,8 +315,10 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
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mbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos+2]);
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descs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));
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rte_compiler_barrier();
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/* B.1 load 2 mbuf point */
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descs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));
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rte_compiler_barrier();
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descs[0] = _mm_loadu_si128((__m128i *)(rxdp));
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/* B.2 copy 2 mbuf point into rx_pkts */
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