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compress/isal: support Arm platform

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Isal compress PMD has build failures on Arm platform.

As dependent library ISA-L is supported on Arm platform,
support of the PMD is expanded to Arm architecture.
Fixed build failure caused by architecture specific code,
and made the PMD multi architecture compatible.

Bugzilla ID: 755
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
This commit is contained in:
Ruifeng Wang 2021-07-15 16:05:02 +08:00 committed by Akhil Goyal
parent 8c09010614
commit ffb81dce5a
3 changed files with 15 additions and 1 deletions
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4
doc/guides/rel_notes/release_21_08.rst
View File

@ -123,6 +123,10 @@ New Features
Added support for crypto adapter OP_FORWARD mode.
* **Updated ISAL compress device PMD.**
The ISAL compress device PMD now supports Arm platforms.
* **Added Baseband PHY CNXK PMD.**
Added Baseband PHY PMD which allows to configure BPHY hardware block

6
drivers/compress/isal/isal_compress_pmd.c
View File

@ -5,6 +5,7 @@
#include <rte_bus_vdev.h>
#include <rte_common.h>
#include <rte_cpuflags.h>
#include <rte_malloc.h>
#include <rte_mbuf.h>
#include <rte_compressdev_pmd.h>
@ -146,6 +147,7 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform,
break;
/* Level 3 or higher requested */
default:
#ifdef RTE_ARCH_X86
/* Check for AVX512, to use ISA-L level 3 */
if (rte_cpu_get_flag_enabled(
RTE_CPUFLAG_AVX512F)) {
@ -161,7 +163,9 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform,
RTE_COMP_ISAL_LEVEL_THREE;
priv_xform->level_buffer_size =
ISAL_DEF_LVL3_DEFAULT;
} else {
} else
#endif
{
ISAL_PMD_LOG(DEBUG, "Requested ISA-L level"
" 3 or above; Level 3 optimized"
" for AVX512 & AVX2 only."

6
drivers/compress/isal/isal_compress_pmd_ops.c
View File

@ -4,6 +4,7 @@
#include <isa-l.h>
#include <rte_common.h>
#include <rte_cpuflags.h>
#include <rte_compressdev_pmd.h>
#include <rte_malloc.h>
@ -139,6 +140,7 @@ isal_comp_pmd_info_get(struct rte_compressdev *dev __rte_unused,
/* Check CPU for supported vector instruction and set
* feature_flags
*/
#if defined(RTE_ARCH_X86)
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))
dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX512;
else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
@ -147,6 +149,10 @@ isal_comp_pmd_info_get(struct rte_compressdev *dev __rte_unused,
dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX;
else
dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_SSE;
#elif defined(RTE_ARCH_ARM)
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_NEON;
#endif
}
}