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event/cnxk: support reassembly functions

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Add the support of reassembly functions callback
assignment to eventdev dequeue and dequeue_burst.

Fixes: c062f5726f ("net/cnxk: support IP reassembly")
Cc: stable@dpdk.org

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
This commit is contained in:
Rahul Bhansali 2022-08-29 20:28:21 +05:30 committed by Jerin Jacob
parent 1c47a13510
commit ffe6a6a109
2 changed files with 195 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

240
drivers/event/cnxk/cn10k_eventdev.c
View File

@ -389,69 +389,209 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
#undef R
};
/* Tx modes */
const event_tx_adapter_enqueue_t
sso_hws_tx_adptr_enq[NIX_TX_OFFLOAD_MAX] = {
#define T(name, sz, flags)[flags] = cn10k_sso_hws_tx_adptr_enq_##name,
NIX_TX_FASTPATH_MODES
#undef T
};
const event_dequeue_t sso_hws_reas_deq[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_tx_adapter_enqueue_t
sso_hws_tx_adptr_enq_seg[NIX_TX_OFFLOAD_MAX] = {
#define T(name, sz, flags)[flags] = cn10k_sso_hws_tx_adptr_enq_seg_##name,
NIX_TX_FASTPATH_MODES
const event_dequeue_burst_t sso_hws_reas_deq_burst[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_burst_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_t sso_hws_reas_deq_tmo[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_burst_t sso_hws_reas_deq_tmo_burst[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_burst_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_t sso_hws_reas_deq_ca[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_burst_t sso_hws_reas_deq_ca_burst[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_burst_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_t sso_hws_reas_deq_tmo_ca[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_burst_t sso_hws_reas_deq_tmo_ca_burst[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_burst_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_t sso_hws_reas_deq_seg[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_seg_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_burst_t sso_hws_reas_deq_seg_burst[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_seg_burst_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_t sso_hws_reas_deq_tmo_seg[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_seg_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_burst_t sso_hws_reas_deq_tmo_seg_burst[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_seg_burst_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_t sso_hws_reas_deq_ca_seg[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_seg_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_burst_t sso_hws_reas_deq_ca_seg_burst[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_seg_burst_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_t sso_hws_reas_deq_tmo_ca_seg[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_seg_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
const event_dequeue_burst_t sso_hws_reas_deq_tmo_ca_seg_burst[NIX_RX_OFFLOAD_MAX] = {
#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_seg_burst_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
/* Tx modes */
const event_tx_adapter_enqueue_t sso_hws_tx_adptr_enq[NIX_TX_OFFLOAD_MAX] = {
#define T(name, sz, flags)[flags] = cn10k_sso_hws_tx_adptr_enq_##name,
NIX_TX_FASTPATH_MODES
#undef T
};
};
const event_tx_adapter_enqueue_t sso_hws_tx_adptr_enq_seg[NIX_TX_OFFLOAD_MAX] = {
#define T(name, sz, flags)[flags] = cn10k_sso_hws_tx_adptr_enq_seg_##name,
NIX_TX_FASTPATH_MODES
#undef T
};
event_dev->enqueue = cn10k_sso_hws_enq;
event_dev->enqueue_burst = cn10k_sso_hws_enq_burst;
event_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst;
event_dev->enqueue_forward_burst = cn10k_sso_hws_enq_fwd_burst;
if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_seg_burst);
if (dev->is_timeout_deq) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_tmo_seg);
if (dev->rx_offloads & NIX_RX_REAS_F) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_reas_deq_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_tmo_seg_burst);
}
if (dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_ca_seg);
sso_hws_reas_deq_seg_burst);
if (dev->is_timeout_deq) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_reas_deq_tmo_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_reas_deq_tmo_seg_burst);
}
if (dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_reas_deq_ca_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_reas_deq_ca_seg_burst);
}
if (dev->is_timeout_deq && dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_reas_deq_tmo_ca_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_reas_deq_tmo_ca_seg_burst);
}
} else {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_ca_seg_burst);
}
if (dev->is_timeout_deq && dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_tmo_ca_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_tmo_ca_seg_burst);
sso_hws_deq_seg_burst);
if (dev->is_timeout_deq) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_tmo_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_tmo_seg_burst);
}
if (dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_ca_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_ca_seg_burst);
}
if (dev->is_timeout_deq && dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_tmo_ca_seg);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_tmo_ca_seg_burst);
}
}
} else {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_burst);
if (dev->is_timeout_deq) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_tmo);
if (dev->rx_offloads & NIX_RX_REAS_F) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_reas_deq);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_tmo_burst);
}
if (dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_ca);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_ca_burst);
}
if (dev->is_timeout_deq && dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_deq_tmo_ca);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_tmo_ca_burst);
sso_hws_reas_deq_burst);
if (dev->is_timeout_deq) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_reas_deq_tmo);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_reas_deq_tmo_burst);
}
if (dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_reas_deq_ca);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_reas_deq_ca_burst);
}
if (dev->is_timeout_deq && dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
sso_hws_reas_deq_tmo_ca);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_reas_deq_tmo_ca_burst);
}
} else {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, sso_hws_deq_burst);
if (dev->is_timeout_deq) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_tmo);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_tmo_burst);
}
if (dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_ca);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_ca_burst);
}
if (dev->is_timeout_deq && dev->is_ca_internal_port) {
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_tmo_ca);
CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
sso_hws_deq_tmo_ca_burst);
}
}
}
event_dev->ca_enqueue = cn10k_sso_hws_ca_enq;

8
drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c
View File

@ -6,9 +6,11 @@
#include "cnxk_eventdev.h"
#include "cnxk_worker.h"
#define R(name, flags) \
SSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \
cn10k_sso_hws_reas_deq_tmo_seg_##name, flags)
#define R(name, flags) \
SSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \
cn10k_sso_hws_deq_tmo_seg_##name, flags) \
SSO_CMN_DEQ_BURST(cn10k_sso_hws_reas_deq_tmo_seg_burst_##name, \
cn10k_sso_hws_reas_deq_tmo_seg_##name, flags | NIX_RX_REAS_F)
NIX_RX_FASTPATH_MODES_0_15
#undef R