Commit Graph

1231 Commits

Author SHA1 Message Date
Qi Zhang
0012bc2d87 net/ice/base: move functions
Move function ice_ptp_set_vernier_wl and ice_ptp_src_cmd to align with
kernel driver.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
40ff47dd4b net/ice/base: fix double VLAN in promiscuous mode
Avoid enabling or disabling vlan 0 when trying to set promiscuous
vlan mode if double vlan mode is enabled. This fix is needed
because the driver tries to add the vlan 0 filter twice (once for
inner and once for outer) when double VLAN mode is enabled. The
filter program is rejected by the firmware when double vlan is
enabled, because the promiscuous filter only needs to be set once.

This issue was missed in the initial implementation of double vlan
mode.

Fixes: 60ff6f5ce2 ("net/ice/base: consolidate VF promiscuous mode")
Cc: stable@dpdk.org

Signed-off-by: Grzegorz Siwik <grzegorz.siwik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
dcdbb1e405 net/ice/base: add low latency Tx timestamp read
E810 products can support low latency Tx timestamp register read.
Add a check for the device capability and use the new method if
supported.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
de281096d1 net/ice/base: add helper to check device is E823
Add a simple function checking if the device is E823-L or E823-C
based.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
97061639bc net/ice/base: cast types to match data sizes
Adding typecast to variables to avoid compiler warnings generated if
variables of a particular data type are assigned to ones of a
smaller data type. For example assigning an unsigned 16 bit integer
to an 8 bit integer could trigger data loss warnings or errors.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
c82b04c2d2 net/ice/base: adjust VSI/aggregator layers
Adjust the VSI/Aggregator layers based on the number of logical
layers supported by the FW. Currently the VSI and aggregator layers are
fixed based on the 9 layer scheduler tree layout. Due to performance
reasons the number of layers of the scheduler tree is changing from
9 to 5. It requires a readjument of these VSI/Aggregator layer
values.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
2be2fabdee net/ice/base: support Tx topology config
Complete the Tx topo config implementation.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5dbc19cf43 net/ice/base: fix add MAC rule
Fix ice_add_mac_rule function by not overriding action value
with vsi id. It's possible to add MAC based switch filters
with action other than FWD_TO_VSI.
In current implementation fwd_id member of filter config
structure was always overwritten with hw vsi index, regardless
of action type.
Fix it, by setting hw vsi index only for FWD_TO_VSI action
filter and leave it as it is in case of other actions.

Fixes: 3ee1b0159e ("net/ice/base: support adding MAC rules on specific port")
Cc: stable@dpdk.org

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
71dce67ab1 net/ice/base: refine default VSI config
Refine API ice_cfg_dflt_vsi and add new API
ice_check_if_dflt_vsi.

Signed-off-by: Michal Wilczynski <michal.wilczynski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
38ef9e1b99 net/ice/base: fix null pointer dereference
Sometimes, during the shutdown process, a PCIe unrecoverable error
occurs. This leads to the following NULL pointer dereference error
while clearing hardware tables:

The patch fixes this bug by checking every table pointer against
NULL before reference it, as some of them probably have been cleared
in advance.

Fixes: 969890d505 ("net/ice/base: enable clearing of HW tables")
Cc: stable@dpdk.org

Signed-off-by: Roman Storozhenko <roman.storozhenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
9ad9e34820 net/ice/base: add AQ command to config node attribute
Added AQ command to config nod attribute.

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
7bbc85ce2c net/ice/base: rename PHY/QUAD/ports definitions
Rename PHY/QUAD/ports definitions to reflect the correct HW
specification.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
c0ad102b47 net/ice/base: move function to internal
The function ice_disable_fd_swap should be defined as static.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
ac549a3249 net/ice/base: fix bit finding range over ptype bitmap
The 2nd argument to function ice_find_first_bit is the bitmap size,
(in bits) not a mask. Thus, use of UINT16_MAX or 0xFFFF will allow a
potential run off the end of the ptype array.
Also, the ptype bitmap (i.e., prof->ptypes) is declared with size
ICE_FLOW_PTYPE_MAX, thus finding the bits within this bitmap should
not exceed this bound.

Fixes: 8ebb93942b ("net/ice/base: add function to set HW profile for raw flow")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
289b2846c1 net/ice/base: fix array overflow in add switch recipe
The array indexes in this function are used with a zero index in the
fv_idx table, and with a +1 index in the lkup_idx arrays. The code
was using the lookup index for the field vector in only one place in
this function, but the code was never used after this point so just
remove the bad line.

This was caught by the undefined behavior sanitizer.

Fixes: fed0c5ca5f ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
e48a4589b0 net/ice/base: convert array of u8 to bitmap
Previously the ice_add_prof function took an array of u8 and looped
over it with for_each_set_bit, examining each 8 bit value as a bitmap.

This was just hard to understand and unnecessary, and was triggering
undefined behavior sanitizers with unaligned accesses within bitmap
fields. Since the ptype being passed in was already declared as a
bitmap, refactor this to use native types with the advantage of
simplifying the code to use a single loop.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
d374022f21 net/ice/base: convert IO expander handle to u16
The io_expander_handle cached value is marked as an __le16, but
several places track the node handle with u16 values. Unify all
the interfaces so that it is stored and reported as a u16, and
keep the low level conversion to LE16 only at the direct firmware
interface.

This fixes warnings from sparse about mixing __le16 and u16, and
will fix related issues on platforms which use Big Endian format.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
843a099aa2 net/ice/base: fix endian format
A few functions failed to properly convert some values into Little
Endian format before sending them to the firmware. This will produce
incorrect results when running on a Big Endian platform.

Fix this by adding the necessary CPU_TO_LE* macros around the input
to firmware.

These issues were detected by sparse.

Fixes: 0f61c2af88 ("net/ice/base: add set/get GPIO helper functions")
Cc: stable@dpdk.org

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
0486c968f6 net/ice/base: fix function descriptions for parser
Some function descriptions for parser are mismatched, thus fixed
with this patch.

Fixes: 7fe2d98070 ("net/ice/base: add parser create and destroy skeleton")
Fixes: 1792942b2d ("net/ice/base: init boost TCAM table for parser")
Fixes: f787952d13 ("net/ice/base: init flag redirect table for parser")
Fixes: b3e73a812f ("net/ice/base: init IMEM table for parser")
Fixes: 2f7a1864cc ("net/ice/base: init metainit table for parser")
Fixes: 90bbd7d954 ("net/ice/base: init marker group table for parser")
Fixes: c55b1ba93f ("net/ice/base: init parse graph CAM table for parser")
Fixes: 7b61be517f ("net/ice/base: init protocol group table for parser")
Fixes: 111871087c ("net/ice/base: init ptype marker TCAM table for parser")
Fixes: 0cbacf60dc ("net/ice/base: init XLT key builder for parser")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
8f43c8205c net/ice/base: detect duplicate ACL rules
Currently there is no check for adding duplicate ACL rules,
this creates subtle bugs, for example unability to remove
filters. Adding check + refactoring a redundant function.

Signed-off-by: Michal Wilczynski <michal.wilczynski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
234f985695 net/ice/base: report NVM version numbers on mismatch
Report NVM version numbers (both detected and expected) when a
mismatch b/w driver and firmware is detected.
This would provide more useful information about which NVM
version the driver expects instead of looking up the code

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
419aede32c net/ice/base: support double VLAN rules
Add support for double vlan rules with c-tag and s-tag in it.
Enable the caller to configure double vlan rules, and use extended
package capabilities to allow adding flow with double vlans.

The patch also re-order the code in ice_switch.c to align with
kernel driver.

Signed-off-by: Wiktor Pilarczyk <wiktor.pilarczyk@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
1b04de20a2 net/ice/base: add E822 generic PCI device ID
The E822 has a generic PCI device ID that can be used in the PLDM
header when updating the device so add it.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
ed3066a3b1 net/ice/base: refactor DDP code
Move DDP related into ice_ddp.c.
Refactor status flow for DDP load.
Also added support for DDP signature segments.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
ef12579699 net/ice/base: fix media type of PHY 10G SFI C2C
PHY type ICE_PHY_TYPE_LOW_10G_SFI_C2C is incorrectly mapped to media
type Fiber which results in ethtool reporting the wrong Supported
ports.

PHY type ICE_PHY_TYPE_LOW_10G_SFI_C2C should map to media type
Backplane.

Fixes: 453d087cca ("net/ice/base: add common functions")
Cc: stable@dpdk.org

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
cb02072170 net/ice/base: enable calling ETH56G functions
Enable calling of ETH56G functions in the base code when the
appropriate PHY has been detected

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
fb800fde66 net/ice/base: work around missing PTP capabilities
Provide a WA for missing PTP caps on Simics, this code shall be
removed after cap reporting is fixed

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
e05720c063 net/ice/base: implement 56G PHY setup functions
Implement setup functions for the 56G PHY Simics model

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
680793c782 net/ice/base: implement 56G PHY access functions
Implement 56G PHY register and memory read/write functions
to facilitate PTP support

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
88b32fd7cc net/ice/base: add 56G PHY register definitions
Add 56G PHY register address definitions to facilitate 56G PHY
support.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
f4ce264ffe net/ice/base: add 56G PHY destination address
Add PHY 56G destination address. PHY56G is a single device
incorporating all SerDes lanes

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
85508ab0c7 net/ice/base: move code block
Move some code block to the beginning of ice_ptp_hw.c to align
with kernel driver.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
0fb8370005 net/ice/base: add suffix to E822-specific functions
Add the suffix to E822 HW-dependent function names

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5a71038ffa net/ice/base: complete health status codes
add definitions for async health status codes.

Signed-off-by: Leszek Zygo <leszek.zygo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
bc696378a9 net/ice/base: fix DSCP PFC TLV creation
When creating the TLV to send to the FW for configuring DSCP
mode PFC, the PFCENABLE field was being masked with a 4 bit
mask (0xF), but this is an 8 bit bitmask for enabled classes
for PFC.  This means that traffic classes 4-7 could not be
enabled for PFC.

Remove the mask completely, as it is not necessary, as we are
assigning 8bits to an 8 bit field.

Fixes: 8ea78b1696 ("net/ice/base: support L3 DSCP QoS")
Cc: stable@dpdk.org

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
9066f200cb net/ice/base: support VXLAN and GRE for RSS
Add RSS of inner headers for VXLAN tunnel packet.

Add packet types for packets with outer IPv4/IPv6 header
support GRE and VXLAN tunnel packet.

Following rules can use new packet types:
    - eth / ipv4(6) / udp / vxlan / ipv4(6)
    - eth / ipv4(6) / udp / vxlan / ipv4(6) / tcp
    - eth / ipv4(6) / udp / vxlan / ipv4(6) / udp
    - eth / ipv4(6) / gre / ipv4(6)
    - eth / ipv4(6) / gre / ipv4(6) / tcp
    - eth / ipv4(6) / gre / ipv4(6) / udp

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
8f81056e5a net/ice/base: fix 100M speed capability
Couple of 10GBase-T devices don't support advertising 100M
speed. For these devices, ice_is_100m_speed_supported should
return false. Meanwhile add device that supports 100M speed.

Fixes: 486d29fda5 ("net/ice/base: add dedicate MAC type for E810")
Cc: stable@dpdk.org

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
0054012bd8 net/ice/base: add auto drop blocking packets
Extended ice_aq_set_mac_cfg()function to add support for
auto drop blocking packets.

Signed-off-by: Mateusz Rusinski <mateusz.rusinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
4e1d404e03 net/ice/base: fix division during E822 PTP init
When initializing the device hardware for PTP, the E822 devices
requirea number of values to be calculated and programmed to
hardware.These values are calculated using unsigned 64-bit
division.

The DIV_64BIT macro currently translates into a specific Linux
functionthat triggers a *signed* division. This produces incorrect
results when operating on a dividend larger than an s64. The
division calculation effectively overflows and results in totally
unexpected behavior.

In this case, the UIX value for 10Gb/40Gb link speeds are calculated
incorrectly. This ultimately cascades into a failure of the Tx
timestamps. Specifically, the reported Tx timestamps become wildly
inaccurate and not representing nominal time.

The root cause of this bug is the assumption that DIV_64BIT can
correctly handle both signed and unsigned division. In fact the
entire reason we need this is because the Linux kernel compilation
target does not provide native 64 bit division ops, and requires
explicit use of kernel functions which explicitly do either signed
or unsigned division.

To correctly solve this, introduce new functions, DIV_U64 and
DIV_S64 which are specifically intended for signed or unsigned
division. To help catch issues, use static inline functions so
that we get strict type checking.

Fixes: 97f4f78bbd ("net/ice/base: add functions for device clock control")
Cc: stable@dpdk.org

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
683b6ab56e net/ice/base: make function names more generic
Previously "e810t" was part of few function names.
In the future it will require to add similar functions
for different NIC types.
Make "NIC type" a suffix of the function name.

Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
f450334f47 net/ice/base: combine functions for VSI promiscuous
Remove ice_get_vsi_vlan_promisc,
cause of similar implementation as ice_get_vsi_promisc,
which will now handle the use case of ice_get_vsi_vlan_promisc.

Signed-off-by: Wiktor Pilarczyk <wiktor.pilarczyk@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
2146d23a18 net/ice/base: get NVM CSS header length from CSS header
The CSS Header length is defined as ICE_CSS_HEADER_LENGTH. To
support changes in CSS Header length, calculate the CSS Header
length from the NVM CSS Header length field plus the Authentication
Header length.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
10eddf13bd net/ice/base: add netlist helper functions
Add new functions to check in netlist if HW has:
- Recovered Clock device,
- Clock Generation Unit,
- Clock Multiplexer,
- GPS generic device.

Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Zhichao Zeng
6de9af2491 net/ice: support traffic to original DCF port
Add support for sending traffic to the original DCF port
with 'port_representor' action by using DCF port id as 'port_id'.

For example:
testpmd> flow create 0 ingress pattern any
         / end actions port_representor port_id 0 / end

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-18 16:12:27 +02:00
Kevin Liu
df539aaf35 net/ice: refactor flex descriptor protocol field extraction
The ice has the feature to extract protocol fields into flex descriptor
by programming per queue. However, the dynamic field for proto_ext are
allocated by PMD, it is the responsibility of application to reserved
the field, before start DPDK.

Application with parse the offset and proto_ext name to PMD with devargs.
Remove related private API in 'rte_pmd_ice.h' and 'rte_pmd_ice.h' file.

Signed-off-by: Kevin Liu <kevinx.liu@intel.com>
Tested-by: Jin Ling <jin.ling@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Zhichao Zeng
9e984bc53b net/ice: add option to disable ACL engine in DCF
Support disabling DCF ACL engine via devarg "acl=off" in cmdline, aiming to
shorten the DCF startup time.

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Zhichao Zeng
776c119736 net/ice: remove deprecated VF flow action
According to the ABI and API Deprecation, remove deprecated VF action
as hard-to-use / ambiguous.

Action REPRESENTED_PORT should be used instead.

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Zhichao Zeng
c0444f6273 net/ice: support represented port flow action
Add support for action REPRESENTED_PORT in DCF. Supposed to send matching
traffic to the entity (VF) represented by the given ethdev, at embedded
switch level.

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:40 +02:00
Ting Xu
53e7c7fcf3 net/ice/base: fix inner symmetric RSS hash in raw flow
Inner IPv4 and IPv6 symmetric RSS hash is not valid for raw pattern.
This patch fixes the issue by adding the corresponding protocol ID
for inner IPv4/6.

Fixes: 0837da2e27 ("net/ice/base: support add HW profile for RSS raw flow")
Cc: stable@dpdk.org

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-08-08 10:51:02 +02:00
Zhichao Zeng
04887b812a net/ice: fix RSS hash update
This patch fixes the issue that the RSS does not update correctly
when the user sets it to none.

Fixes: 4717a12cfa ("net/ice: initialize and update RSS based on user config")
Cc: stable@dpdk.org

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-08-08 10:45:53 +02:00