Commit Graph

33713 Commits

Author SHA1 Message Date
Viacheslav Ovsiienko
37d6fc30c1 net/mlx5: fix check for orphan wait descriptor
The mlx5 PMD supports send scheduling feature, it allows
to send packets at specified moment of time, to do that
PMD pushes special wait descriptor (WQE) to the hardware
queue and then pushes descriptor for packet data as usual.
If queue is close to be full or there is no enough elts
buffers to store mbufs being sent the data descriptors might
be not pushed and the orphan wait WQE (not followed by the
data) might reside in queue on tx_burst routine exit.

To avoid orphan wait WQEs there was the check for enough
free space in the queue WQE buffer and enough amount of the
free elts in queue mbuf storage. This check was incomplete
and did not cover all the cases for Enhanced Multi-Packet
Write descriptors.

Fixes: 2f827f5ea6 ("net/mlx5: support scheduling on send routine template")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-10-02 09:13:52 +02:00
Bassam Zaid AlKilani
6fa815722e net/mlx5: fix flow matching priority for ESP item
ESP is one of IPSec protocols over both IPv4 and IPv6 and is considered
a tunnel layer that cannot be followed by any other layer. Taking that
into consideration, ESP is considered as a 4 layer.

Not defining ESP's priority will make it match with the same priority as
its prior IP layer, which has a layer 3 priority. This will lead to
issues in matching and will match the packet with the first matching
rule even if it doesn't have an esp layer in its pattern, disregarding
any following rules that could have an esp item and can be actually
a more accurate match since it will have a longer matching criterion.

This is fixed by defining the priority for the ESP item to have a
layer 4 priority, making the match be for the rule with the more
accurate and longer matching criteria.

Fixes: 18ca4a4ec7 ("net/mlx5: support ESP SPI match and RSS hash")
Cc: stable@dpdk.org

Signed-off-by: Bassam Zaid AlKilani <bzalkilani@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Raslan Darawsheh <rasland@nvidia.com>
2022-10-02 09:13:51 +02:00
Michael Baum
593f913a8e net/mlx5: fix LRO requirements check
One of the conditions to allow LRO offload is the DV configuration.

The function incorrectly checks the DV configuration before initializing
it by the user devarg; hence, LRO cannot be allowed.

This patch moves this check to mlx5_shared_dev_ctx_args_config, where DV
configuration is initialized.

Fixes: c4b8620135 ("net/mlx5: refactor to detect operation by DevX")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reported-by: Gal Shalom <galshalom@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-10-02 09:13:51 +02:00
Gregory Etelson
2d8dde8d63 common/mlx5: lower some DevX log level
Current PMD logs all DevX errors at error level.

DevX interface can fail queue counters allocation on some hardware
types. That is a known issue.
PMD fallbacks to Verbs API to allocate queue counters
when it detects the fault.
That DevX failure should not be logged as PMD error.

The patch provides DevX with flexible API that selects log level.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-10-02 09:13:50 +02:00
Long Li
bc5d8fdb70 net/mlx5: fix Verbs FD leak in secondary process
FDs passed from rte_mp_msg are duplicated to the secondary process and
need to be closed.

Fixes: 9a8ab29b84 ("net/mlx5: replace IPC socket with EAL API")
Cc: stable@dpdk.org

Signed-off-by: Long Li <longli@microsoft.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-10-02 09:13:50 +02:00
Long Li
ff9c3548c0 net/mlx4: fix Verbs FD leak in secondary process
FDs passed from rte_mp_msg are duplicated to the secondary process and
need to be closed.

Fixes: 0203d33a10 ("net/mlx4: support secondary process")
Cc: stable@dpdk.org

Signed-off-by: Long Li <longli@microsoft.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-10-02 09:13:48 +02:00
Abdullah Ömer Yamaç
8ae946970e eal: fix thread name for high order lcores
In case of higher order (greater than 99) logical cores, name was
truncated (length is restricted to 16 characters, including the
terminating null byte ('\0')) and it makes hard to follow threads.

Before this fix, this issue can be reproduced using following arguments:
  --lcores=0,10@1,100@2
Then we had:
lcore-worker-10
lcore-worker-10

Signed-off-by: Abdullah Ömer Yamaç <omer.yamac@ceng.metu.edu.tr>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2022-09-30 11:23:12 +02:00
Morten Brørup
f398ebd7c7 eal: support const pointer in alignment check
Checking a const pointer for alignment would emit a warning about the
const qualifier being discarded.

No need to calculate the aligned pointer; just check the last bits of the
pointer.

Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2022-09-30 11:22:52 +02:00
Morten Brørup
a9cfccbb03 eal/x86: add 256 bytes copy for AVX2
The rte_mov256 function was missing for AVX2.

Fixes: 9144d6bcde ("eal/x86: optimize memcpy for SSE and AVX")

Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2022-09-30 11:09:25 +02:00
Wenwu Ma
40abb903fe examples/vhost: fix use after free
In async_enqueue_pkts(), the failed pkts will
be freed before return, but, the failed pkts may be
retried later, it will cause use after free. So,
we free the failed pkts after retry.

Fixes: 1907ce4bae ("examples/vhost: fix retry logic on Rx path")
Cc: stable@dpdk.org

Signed-off-by: Wenwu Ma <wenwux.ma@intel.com>
Tested-by: Wei Ling <weix.ling@intel.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2022-09-29 10:13:22 +02:00
David Marchand
1a44f67a03 vhost: reduce memory footprint when IOMMU is disabled
If an application does not request IOMMU support, we can avoid
allocating a IOMMU pool.

This saves 112kB (IOTLB_CACHE_SIZE * sizeof(struct vhost_iotlb_entry))
per vq.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2022-09-29 10:13:22 +02:00
Andy Pei
64e155f01a vhost: use dedicated variable for message result
Currently in function vhost_user_msg_handler, variable ret is used to
store both vhost msg result code and function call return value.
After this patch, variable ret is used only to store function call
return value, a new dedicated variable msg_result is used to
store vhost msg result. This can improve readability.

Signed-off-by: Andy Pei <andy.pei@intel.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2022-09-29 10:13:22 +02:00
Alexander Chernavin
52bd03e969 net/virtio: fix crash when configured twice
When first attempt to configure a device with RX interrupt enabled fails
for some reason (e.g. because "Multiple intr vector not supported"),
second attempt to configure the device with RX interrupt disabled and
feature set unchanged will succeed but will leave virtio queues not
allocated. Accessing the queues will cause a segfault.

First attempt:
  - virtio_dev_configure()
    - virtio_init_device() is called to reinit the device because
      "dev->data->dev_conf.intr_conf.rxq" is "1"
      - virtio_configure_intr() fails and returns an error
      - virtio_free_queues() frees previously allocated virtio queues
    - virtio_init_device() fails and returns an error
  - virtio_dev_configure() fails and returns an error

Second attempt:
  - virtio_dev_configure()
    - This time virtio_init_device() is not called, virtio queues
      are not allocated

With this fix, reinit the device during configuration if virtio queues
are not allocated.

Fixes: 2b38151f74 ("net/virtio: fix queue memory leak on error")
Cc: stable@dpdk.org

Signed-off-by: Alexander Chernavin <achernavin@netgate.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2022-09-29 10:13:22 +02:00
David Marchand
5b546fa718 vhost: remove deprecated helpers
Those helpers have been marked as deprecated for a long time and have
documented equivalent helpers.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2022-09-29 10:13:22 +02:00
Zhichao Zeng
f7c8c36fde net/iavf: enable inner and outer Tx checksum offload
This patch is to enable scalar path inner and outer Tx checksum offload
for tunnel packet by configure ol_flags.

Signed-off-by: Peng Zhang <peng1x.zhang@intel.com>
Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Tested-by: Ke Xu <ke1.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-25 16:07:02 +02:00
Zhichao Zeng
3b8c645afa net/iavf: fix outer checksum flags
When receiving tunneled packets, the testpmd output log shows 'ol_flags'
value always as 'RTE_MBUF_F_RX_OUTER_L4_CKSUM_UNKNOWN', but expected value
should be 'RX_OUTER_L4_CKSUM_GOOD' or 'RX_OUTER_L4_CKSUM_BAD'.

Adding 'RX_OUTER_L4_CKSUM_GOOD' and 'RX_OUTER_L4_CKSUM_BAD' to 'flags' for
normal path, 'l3_l4_flags_shuf' for AVX2 and AVX512 vector path and
'cksum_flags' for SSE vector path to ensure that the 'ol_flags'
can match correct flags.

Fixes: b8b4c54ef9 ("net/iavf: support flexible Rx descriptor in normal path")
Fixes: 1162f5a0ef ("net/iavf: support flexible Rx descriptor in SSE path")
Fixes: 5b6e885908 ("net/iavf: support flexible Rx descriptor in AVX path")
Fixes: 9c9aa00403 ("net/iavf: add offload path for Rx AVX512 flex descriptor")
Cc: stable@dpdk.org

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Tested-by: Ke Xu <ke1.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-25 16:00:43 +02:00
Steve Yang
7ca06f83e3 doc: add Intel VF known issue
Add a known issue: configuring VLAN filters from VF is unsupported
for i40e driver 2.17.15.

Signed-off-by: Steve Yang <stevex.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-25 15:52:28 +02:00
Zhichao Zeng
1aaacea174 net/iavf: fix processing VLAN TCI in SSE path
The SSE RX path does not process the vlan tci correctly when it's stored
in L2TAG2, so the vlan tci could not be extracted from descriptor,
then would not be put into mbuf either.

Add processing when vlan tci is stored in L2TAG2.

Fixes: 1162f5a0ef ("net/iavf: support flexible Rx descriptor in SSE path")
Cc: stable@dpdk.org

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-23 10:47:08 +02:00
Simei Su
e35f6b1cd1 net/ice: fix PTP init
Because of base code update, "ice_ptp_init_phc" API for E810/E822 depends
on PHY configuration, not whether the device is E810 based. So before this
API is called, assign specific value to phy cfg.

Fixes: 646dcbe6c7 ("net/ice: support IEEE 1588 PTP")
Cc: stable@dpdk.org

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-20 10:57:35 +02:00
Markus Theil
f082b51958 net/ice: support LED control
Added LED control support.

Signed-off-by: Markus Theil <markus.theil@secunet.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-20 10:44:57 +02:00
Qi Zhang
cd5caad308 doc: refine iavf limitation or known issues
Move all VF related limitation or known issues from i40e.rst to
intel_vf.rst, as i40evf has been removed from i40e, i40e.rst should only
cover PF's information.

The patch also fix couple typos and refine the words to be more accurate.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2022-09-20 10:42:28 +02:00
Qi Zhang
61da836257 net/ice/base: update copyright
Updated copyright to 2022 and update base code version.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
47bf7453a6 net/ice/base: clean up
1. remove unused code
2. reduce variable scope
3. fix comment

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
d56833508e net/ice/base: expose sched element move function
Exposed ice_aq_move_sched_elems to support sched element moving
by AQ command.

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
41d843bd60 net/ice/base: check for PTP HW lock more frequently
PTP HW semaphore can be held for ~50 ms in worst case.
SW should wait longer and check more frequently if
the HW lock is held.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
dbbf83ce0e net/ice/base: add GTP tunnel
Added GTP tunnel type and also re-order the code to align with
kernel driver.

Signed-off-by: Marcin Szycik <marcin.szycik@intel.com>
Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
a7b867e989 net/ice/base: remove unnecessary fields
Remove unnecessary fields in data structure for 1588 and QoS
func capabilities.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
20c549a89d net/ice/base: convert 1588 structs to use bit fields
Use bitfields in 1588 structs so they don't waste too much space.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
7ab3a759d4 net/ice/base: handle default VSI lookup type
ICE_SW_LKUP_DFLT is handled in ice_update_vsi_list_rule and
ice_aq_alloc_free_vsi_list.

Signed-off-by: Lukasz Kupczak <lukasz.kupczak@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
ed86e63543 net/ice/base: add function to parse DCBX config
LLDP MIB Change Event (opcode 0x0A01) already contains MIB, which
has been changed. Add ice_dcb_process_lldp_set_mib_change() function,
which will set local/remote DCBX config from LLDP MIB Change Event's
buffer.

This function will be used in a base driver handler for LLDP MIB
Change Event.

Signed-off-by: Anatolii Gerasymenko <anatolii.gerasymenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
97e32e8d48 net/ice/base: complete pending LLDP MIB
Completed structure ice_aqc_lldp_get_mib.
Added 'Pending Event Enable' bit.

Signed-off-by: Tsotne Chakhvadze <tsotne.chakhvadze@intel.com>
Signed-off-by: Karen Sornek <karen.sornek@intel.com>
Signed-off-by: Anatolii Gerasymenko <anatolii.gerasymenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
04ab2b2f0b net/ice/base: fix comment of overloaded GCO bit
The bit that is overloaded is bit 11 in the flex descriptor,
updating the comment to have the right one reflected.

Signed-off-by: Alice Michael <alice.michael@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
3f34e62690 net/ice/base: add unload flag for control queue shutdown
Admin queue command for shutdown AQ contains flag to indicate
driver unload. However the flag is always set in driver, even
for the resets. It causes Firmware to consider driver as unloaded
once the PF reset is triggered on all ports of device. Firmware then
restores default configuration of some features like Tx Balancing,
which is not expected behavior.
This patch added an additional function parameter to indicate
driver unload.

Signed-off-by: Piotr Gardocki <piotrx.gardocki@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
b0472e210f net/ice/base: fix input set of GTPoGRE
For GTPoGRE, When setting the prot_id of prot, it should be
set to second inner.

Fixes: 34a0e7c44f ("net/ice/base: improve flow director masking")
Cc: stable@dpdk.org

Signed-off-by: Kevin Liu <kevinx.liu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
01aec828d9 net/ice/base: add GRE TAP tunnel type
Added new tunnel type to support NvGRE

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
bf66265397 net/ice/base: support L2TPv2 flow rule
Add L2TPv2 (include PPP over L2TPv2) support for FDIR.

And add support PPPoL2TPv2oUDP with inner IPV4/IPV6/UDP/TCP for
FDIR.

The supported L2TPv2 packets are defined as below:
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_CONTROL
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_UDP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_TCP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_UDP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_TCP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_CONTROL
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_UDP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_TCP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_UDP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_TCP

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
f203e2ba10 net/ice/base: support RSS with L2TPv2 session ID
Add L2TPv2 session ID field support for RSS.

Enable L2TPv2 non-tunneled packet types for UDP protocol header
bitmaps.

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5aa6d76051 net/ice/base: add generic MAC with 3K signature segment
Define new type id ICE_MAC_GENERIC_3k in ice_mac_type enum, to
distinguish devices which use RSA-3K/SHA-384 segment signature type.
Use 3k signing type for E824S device.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5a6a27c8fa net/ice/base: support custom WPC and LGB NICs
There are few custom Westport Channel (WPC) and Logan Beach (LGB)
network interface cards (NICs) - add their subdevice IDs to be
able to distinguish them.

Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
b7a6a9733c net/ice/base: clean main timer command register
Clean the main timer command register after use to avoid residual
command execution, such as re-initialization of the main timer.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5f5b5d3f86 net/ice/base: update PHY type high max index
ICE_PHY_TYPE_HIGH_MAX_INDEX should be the maximum index value and
not the length/number of ICE_PHY_TYPE_HIGH.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
4b6ede113f net/ice/base: support auto FEC with FEC disabled
The default Link Establishment State Machine (LESM) behavior does
not allow the use of FEC disable mode if the media does not support
FEC disabled. However users may want to override this behavior.

Add support for setting Auto FEC with FEC disabled.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
2421af6c56 net/ice/base: clean up rule add without lookup
The add rule functionality works fine with a NULL lookups parameter.
However when running the undefined behavior sanitizer it noticed that
the function could trigger a memcpy from a NULL target.

Fix the code to handle NULL lkups and a zero lkups_cnt variable more
explicitly, and clean up the test to just directly pass a NULL value
instead of allocating a stack variable assigned to NULL and passing
that as a pointer.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
68834871b2 net/ice/base: ignore promiscuous already exist
Ignore ERR_ALREADY_EXISTS error when setting promiscuous mode.
This fix is needed because the driver could set promiscuous mode
when it still has not cleared properly.
Promiscuous mode could be set only once, so setting it second
time will be rejected.

Fixes: 60ff6f5ce2 ("net/ice/base: consolidate VF promiscuous mode")
Cc: stable@dpdk.org

Signed-off-by: Grzegorz Siwik <grzegorz.siwik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
3cfa5591b2 net/ice/base: refine header file include
The ice_switch.h and ice_fdir.h headers include ice_common.h. They
are both themselves included in ice_common.h. This causes a circular
dependency ordering.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
23351e2ae7 net/ice/base: update L2TPv2 packet type values
Because the macros of L2TPv2 packet type value were changed in
ice_ppp-o-l2tpv2-o-udp-1.3.4.0.pkg. So update the macros of L2TPv2
packet type value and the bitmaps of packet types for relevant
protocol header to match the new DDP package.

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
d308398cda net/ice/base: update definitions for AQ debug dump
Add defines for Queue Mng and Full CSR Space in debug
dump internal data. This defines are used in Lanconf for
debug dump. Added QV_SUPPORT macro in ifdef for ACL.

Signed-off-by: Dawid Zielinski <dawid.zielinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
e980509c3f net/ice/base: complete support for Tx balancing
Add module ID and struct necessary to read and save Tx Scheduler
Topology Tree User Selection data from PFA TLV.

Signed-off-by: Lukasz Czapnik <lukasz.czapnik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
0012bc2d87 net/ice/base: move functions
Move function ice_ptp_set_vernier_wl and ice_ptp_src_cmd to align with
kernel driver.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
40ff47dd4b net/ice/base: fix double VLAN in promiscuous mode
Avoid enabling or disabling vlan 0 when trying to set promiscuous
vlan mode if double vlan mode is enabled. This fix is needed
because the driver tries to add the vlan 0 filter twice (once for
inner and once for outer) when double VLAN mode is enabled. The
filter program is rejected by the firmware when double vlan is
enabled, because the promiscuous filter only needs to be set once.

This issue was missed in the initial implementation of double vlan
mode.

Fixes: 60ff6f5ce2 ("net/ice/base: consolidate VF promiscuous mode")
Cc: stable@dpdk.org

Signed-off-by: Grzegorz Siwik <grzegorz.siwik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00