Commit Graph

20 Commits

Author SHA1 Message Date
Ferruh Yigit
295968d174 ethdev: add namespace
Add 'RTE_ETH' namespace to all enums & macros in a backward compatible
way. The macros for backward compatibility can be removed in next LTS.
Also updated some struct names to have 'rte_eth' prefix.

All internal components switched to using new names.

Syntax fixed on lines that this patch touches.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>
2021-10-22 18:15:38 +02:00
Pavan Nikhilesh
f092fb0540 event/octeontx2: configure aura backpressure
In poll mode driver of octeontx2 the RQ is connected to a CQ and it is
responsible for asserting backpressure to the CGX channel.
When event eth Rx adapter is configured, the RQ is connected to a event
queue, to enable backpressure we need to configure AURA assigned to a
given RQ to backpressure CGX channel.
Event device expects unique AURA to be configured per ethernet device.
If multiple RQ from different ethernet devices use the same AURA,
the backpressure will be disabled, application can override this
using devargs:

	-a 0002:0e:00.0,force_rx_bp=1

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-06-30 18:43:05 +02:00
Pavan Nikhilesh
c116a2aad9 event/octeontx2: remove selftest option
Since selftest now depends on dynamic mbuf fields it is not
feasible to run selftest on device probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-11-20 18:53:47 +01:00
Stephen Hemminger
db27370b57 eal: replace blacklist/whitelist options
Replace -w / --pci-whitelist with -a / --allow options
and --pci-blacklist with --block.
The -b short option remains unchanged.

Allow the old options for now, but print a nag
warning since old options are deprecated.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Luca Boccassi <bluca@debian.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-16 00:11:22 +01:00
Bruce Richardson
8809f78c7d doc: fix driver names
Since the built driver filenames have changed in DPDK 20.11, we need to
update the driver doc to match.

Most drivers start their section with the driver filename highlighted in
bold, while a number were missing the highlight. When updating the names,
add the markers for bold text to any missing it, so as to have things more
consistent.

Fixes: a20b2c01a7 ("build: standardize component names and defines")

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-11-03 16:23:03 +01:00
Ciara Power
08b1d50543 doc: remove references to make from eventdevs guide
Make is no longer supported for compiling DPDK, references are now
removed in the documentation.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
2020-10-22 22:54:05 +02:00
Pavan Nikhilesh
31246a328f mempool/octeontx2: add devargs to lock context in cache
Add device arguments to lock NPA aura and pool contexts in NDC cache.
The device args take hexadecimal bitmask where each bit represent the
corresponding aura/pool id.
Example:
	-w 0002:02:00.0,npa_lock_mask=0xf // Lock first 4 aura/pool ctx

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-05-19 18:28:58 +02:00
Pavan Nikhilesh
9e991f217f doc: fix devargs in OCTEON TX2 event device guide
Fix OCTEON TX2 event device devargs examples.

Fixes: 55e778ca46 ("event/octeontx2: add devargs for inflight buffer count")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2020-02-21 18:14:48 +01:00
Pavan Nikhilesh
37720fc1fb event/octeontx2: add Rx adapter
Add event eth Rx adapter capabilities, queue add and delete functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-07 15:06:30 +02:00
Pavan Nikhilesh
28e767e819 event/octeontx2: add devargs to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
	--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:28 +02:00
Pavan Nikhilesh
b2530cda86 event/octeontx2: add devargs to limit timer adapters
Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.

Example:
	--dev "0002:0e:00.0,tim_rings_lmt=2"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:22 +02:00
Pavan Nikhilesh
f513827934 event/octeontx2: add timer stats get and reset
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
	--dev "0002:0e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:10 +02:00
Pavan Nikhilesh
d457de0fe0 event/octeontx2: add devargs to modify chunk slots
Add devargs support to modify number of chunk slots. Chunks are used to
store event timers, a chunk can be visualised as an array where the last
element points to the next chunk and rest of them are used to store
events. TIM traverses the list of chunks and enqueues the event timers
to SSO.
If no argument is passed then a default value of 255 is taken.

Example:
	--dev "0002:0e:00.0,tim_chnk_slots=511"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:52 +02:00
Pavan Nikhilesh
464060c02f event/octeontx2: add devargs to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
	--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:43 +02:00
Pavan Nikhilesh
382f892267 event/octeontx2: support event timer
Add event timer adapter aka TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:35 +02:00
Pavan Nikhilesh
62561532ac event/octeontx2: add SSO selftest
Add selftest to verify sanity of SSO.
Can be run by passing devargs to SSO PF as follows:

Example:
	--dev "0002:0e:00.0,selftest=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:29 +02:00
Pavan Nikhilesh
9c96ff7696 event/octeontx2: add devargs to control SSO GGRP QoS
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
	--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:23 +02:00
Pavan Nikhilesh
09d5c0f356 event/octeontx2: add devargs to force legacy mode
Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:17 +02:00
Pavan Nikhilesh
55e778ca46 event/octeontx2: add devargs for inflight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, Octeontx2 SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.

Example:
	--dev "0002:0e:00.0,xae_cnt=8192"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:55:51 +02:00
Pavan Nikhilesh
3ef6bbfead event/octeontx2: add build infra and device probe
Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-03 06:55:44 +02:00