Commit Graph

13 Commits

Author SHA1 Message Date
Thomas Monjalon
725f5dd0bf net/mlx5: fix build on PPC64
The AltiVec header file breaks boolean type:

error: incompatible types when initializing type
'__vector _bool int' {aka '_vector(4) __bool int'} using type 'int'

If __APPLE_ALTIVEC__ is defined, then bool type is redefined
and conflicts with stdbool.h.

There is no good solution to fix it for the whole project without
breaking something else, so a workaround is inserted in mlx5 PMD.
This workaround is not compatible with C++ but there is no C++ in DPDK.

Suggested-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Suggested-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Tested-by: David Wilder <dwilder@us.ibm.com>
Acked-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
2018-11-14 00:35:53 +01:00
Xueming Li
80f2d0ed7f net/mlx5: add hardware flow debug dump
Dump verb flow detail including flow spec type and size for debugging
purpose.

Signed-off-by: Xueming Li <xuemingl@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2018-04-27 18:00:56 +01:00
Shahaf Shuler
5feecc57d9 align SPDX Mellanox copyrights
Aligning Mellanox SPDX copyrights to a single format.
In addition replace to SPDX licence files which were missed.

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-04-11 01:47:47 +02:00
Nélio Laranjeiro
a170a30d22 net/mlx5: use dynamic logging
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-03-30 14:08:44 +02:00
Olivier Matz
8fd92a66c6 net/mlx5: use SPDX tags in 6WIND copyrighted files
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2018-02-01 02:32:52 +01:00
Edward Makarov
b113cb5ee6 net/mlx5: fix link speed bitmasks
The constant ETHTOOL_LINK_MODE_1000baseT_Full_BIT and the others like
that in mlx5_link_update_unlocked_gs must be bit masks but unfortunately
they are bit numbers. This commit fixes the issue.

Fixes: 1884087198 ("net/mlx5: fix support for newer link speeds")
Cc: stable@dpdk.org

Signed-off-by: Edward Makarov <makarov@kraftway.ru>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2017-11-11 15:54:16 +01:00
Nélio Laranjeiro
4c7a0f5ff8 net/mlx5: make indirection tables shareable
Indirection table in verbs side resides in a list of final work queues
to spread the packets according to an higher level queue.  This
indirection table can be shared among the hash Rx queues which points
to them.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2017-10-12 01:36:58 +01:00
Huawei Xie
693f715da4 remove extra parentheses in return statement
fix the error reported by checkpatch:
  "ERROR: return is not a function, parentheses are not required"

remove parentheses in return like:
  "return (logical expressions)"

remove parentheses in return a function like:
  "return (rte_mempool_lookup(...))"

Fixes: 6307b909b8 ("lib: remove extra parenthesis after return")

Signed-off-by: Huawei Xie <huawei.xie@intel.com>
2016-02-10 15:47:50 +01:00
Nelio Laranjeiro
634efbc2c8 mlx5: support RETA query and update
ConnectX-4 adapters do not have a constant indirection table size, which is
set at runtime from the number of RX queues. The maximum size is retrieved
using a hardware query and is normally 512.

Since the current RETA API cannot handle a variable size, any query/update
command causes it to be silently updated to RSS_INDIRECTION_TABLE_SIZE
entries regardless of the original size.

Also due to the underlying type of the configuration structure, the maximum
size is limited to RSS_INDIRECTION_TABLE_SIZE (currently 128, at most 256
entries).

A port stop/start must be done to apply the new RETA configuration.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2015-11-03 11:23:15 +01:00
Adrien Mazarguil
aa7f63ab35 mlx5: get rid of the WR structure in Rx queue elements
Removing this structure reduces the size of SG and non-SG RX queue elements
significantly to improve performance.

An nice side effect is that the mbuf pointer is now fully stored in
struct rxq_elt instead of relying on the WR ID data offset hack.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Olga Shern <olgas@mellanox.com>
Signed-off-by: Or Ami <ora@mellanox.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2015-10-31 00:21:58 +01:00
Adrien Mazarguil
67fa62bc67 mlx5: support checksum offload
This is the same implementation as mlx4.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2015-10-30 22:41:01 +01:00
Adrien Mazarguil
2e22920b85 mlx5: support non-scattered Tx and Rx
RSS implementation with parent/child QPs comes from mlx4 and is temporary.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2015-10-30 22:21:07 +01:00
Adrien Mazarguil
771fa900b7 mlx5: introduce new driver for Mellanox ConnectX-4 adapters
In its current state, this driver implements the bare minimum to initialize
itself and Mellanox ConnectX-4 adapters without doing anything else
(no RX/TX for instance). It is disabled by default since it is based on the
mlx4 driver and also depends on libibverbs.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Or Ami <ora@mellanox.com>
2015-10-30 22:03:42 +01:00