25342 Commits

Author SHA1 Message Date
Timothy McDaniel
26aeabe079 event/dlb: add dequeue and its burst variants
Add support for dequeue, dequeue_burst, ...

DLB does not currently support interrupts, but instead uses
umonitor/umwait if supported by the processor. This allows
the software to monitor and wait on writes to a cache-line.

DLB supports normal and sparse cq mode. In normal mode the
hardware will pack 4 QEs into each cache line. In sparse cq
mode, the hardware will only populate one QE per cache line.
Software must be aware of the cq mode, and take the appropriate
actions, based on the mode.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
4784f1eaa3 event/dlb: add enqueue and its burst variants
Add support for enqueue and its variants.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
eb14a3421a event/dlb: add eventdev start
Add support for the eventdev start entry point.
DLB delays setting up single link resources until
eventdev start, because it is only then that it can
ascertain which ports have just one linked queue.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
8bb077f44e event/dlb: add port unlink and unlinks in progress
Add supports for the port unlink(s) eventdev entry points.
The unlink operation is an asynchronous operation executed by
a control thread, and the unlinks-in-progress function reads
a counter shared with the control thread. Port QE and memzone
memory is freed here.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
6a89b28f81 event/dlb: add port link
Add port link entry point. Directed queues are identified and created
at this stage. Their setup deferred until link-time, at which
point we know the directed port ID. Directed queue setup
will only fail if this queue is already setup or there are
no directed queues left to configure.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
ee57517013 event/dlb: add port setup
Configure the load balanced (ldb) or directed (dir) port.
The consumer queue (CQ) and producer port (PP) are also
set up here.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
f7a9172f36 event/dlb: add queue setup
Load balanced (ldb) queues are setup here.
Directed queues are not set up until link time, at which
point we know the directed port ID. Directed queue setup
will only fail if this queue is already setup or there are
no directed queues left to configure.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
e27d16ea4b event/dlb: add queue and port default conf
Add support for getting the queue and port default configuration.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
b94c709dec event/dlb: add infos get and configure
Add support for configuring the DLB hardware.
In particular, this patch configures the DLB
hardware's scheduling domain, such that it is provisioned with
the requested number of ports and queues, provided sufficient
resources are available. Individual queues and ports are
configured later in port setup and eventdev start.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
5993e5eb7d event/dlb: add xstats
Add support for DLB xstats.  Perform initialization and add
standard xstats entry points

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
813146cae3 event/dlb: add probe-time hardware init
This commit adds probe-time low level hardware
initialization.  It also adds probe-time init for both
primary and secondary DPDK processes.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
02ce8e8837 event/dlb: add flexible interface
This commit introduces the flexible interface. This
interface allows the core code to operate in PF mode (direct
hardware access) or bifurcated mode (hardware configured via
kernel driver). This driver currently only supports PF modei,
but bifurcated mode will be added in a future patch-set.
Note that the flexible interface is not used for data path
operations, and thus there are no performance concerns
related to the use of function pointers.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
19980083fd event/dlb: add eventdev probe
Add the eventdev portion of probe, and parse command line
options, but do not initialize hardware.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
ba927e5dc1 event/dlb: add inline functions
Add miscellaneous inline functions that may be called
from multiple files.  These functions include inline
assembly of new x86 instructions, such as movdir64b,
since they are not available as builtin functions in
the minimum supported GCC version.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
ed20fd5a86 event/dlb: add definitions shared with LKM or shared code
Add headers containing structs and constants shared between
the PMD and the shared code.  The term shared code refers to
the code that implements the hardware interface. The shared code
is introduced in the probe patch, and then is extended as
additional eventdev PMD entry points are added to the patchset.
In the case of the bifurcated PMD (to be introduced in the
future), the shared code is contained in the Linux kernel
module itself.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
8da624a9e4 event/dlb: add private data structures and constants
Add headers used internally by the PMD.  They include constants,
macros for device resources, structure definitions for hardware interfaces
and software state, and various forward-declarations.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
3789483934 event/dlb: add dynamic logging
This commit adds base support for dynamic logging.
The default log level is NOTICE. Dynamic logging
is used exclusively throughout this patchset.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
218be03459 event/dlb: add documentation and build infrastructure
Note that config/rte_config.h contains several configuration
switches, providing for fine control of the PMD's
runtime behaviour.

The meson infrastructure is expanded as additional files are
added to this patchset.

Adds announcement of availability of the new driver
for Intel Dynamic Load Balancer 1.0 hardware.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 14:46:01 +01:00
Timothy McDaniel
c105e9b3ac event/dlb2: add timeout ticks entry point
Adds the timeout ticks conversion function.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
27328fedb0 event/dlb2: add queue and port release
DLB does not support reconfiguring individual queues
or ports on the fly. The entire device must be reconfigured.
Previously allocated port QE and memzone memory
is freed in this patch.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
6f1b82886e event/dlb2: add self-tests
Add a variety of self-tests for both ldb and directed
ports/queues, as well as configure, start, stop, link, etc...

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
c667583d82 event/dlb2: add token pop API
The PMD uses a public interface to allow applications to
control the token pop mode. Supported token pop modes are
as follows, and they impact core scheduling affinity for
ldb ports.

AUTO_POP: Pop the CQ tokens immediately after dequeueing.
DELAYED_POP: Pop CQ tokens after (dequeue_depth - 1) events
             are released. Supported on load-balanced ports
             only.
DEFERRED_POP: Pop the CQ tokens during next dequeue operation.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
18991548e9 event/dlb2: add eventdev stop and close
Add support for eventdev stop and close entry points.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
a2e4f1f5e7 event/dlb2: add dequeue and its burst variants
Add support for dequeue, dequeue_burst, ...

DLB2 does not currently support interrupts, but instead use
umonitor/umwait if supported by the processor. This allows
the software to monitor and wait on writes to a cache-line.

DLB2 supports normal and sparse cq mode. In normal mode the
hardware will pack 4 QEs into each cache line. In sparse cq
mode, the hardware will only populate one QE per cache line.
Software must be aware of the cq mode, and take the appropriate
actions, based on the mode.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
f7cc194b0f event/dlb2: add enqueue and its burst variants
Add support for enqueue and its variants.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
59e1a966ea event/dlb2: add eventdev start
Add support for the eventdev start entry point.
We delay initializing some resources until
eventdev start, since the number of linked queues can be
used to determine if we are dealing with a ldb or dir resource.
If this is a device restart, then the previous configuration
will be reapplied.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
a29248b57b event/dlb2: add port unlink and unlinks in progress
Add supports for the port unlink(s) eventdev entry points.
The unlink operation is an asynchronous operation executed by
a control thread, and the unlinks-in-progress function reads
a counter shared with the control thread.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
1acd82c0a4 event/dlb2: add port link
Add port link entry point. Directed queues are identified and created
at this stage. Their setup deferred until link-time, at which
point we know the directed port ID. Directed queue setup
will only fail if this queue is already setup or there are
no directed queues left to configure.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
3a6d0c04e7 event/dlb2: add port setup
Configure the load balanced (ldb) or directed (dir) port.
The consumer queue (CQ) and producer port (PP) are also
set up here.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
7e668e575b event/dlb2: add queue setup
Load balanced (ldb) queues are setup here.
Directed queues are not set up until link time, at which
point we know the directed port ID. Directed queue setup
will only fail if this queue is already setup or there are
no directed queues left to configure.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
99f66f33c1 event/dlb2: add queue and port default conf
Add support for getting the queue and port default configuration.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
f3cad285bb event/dlb2: add infos get and configure
Add support for configuring the DLB2 hardware.
In particular, this patch configures the DLB2
hardware's scheduling domain, such that it is provisioned with
the requested number of ports and queues, provided sufficient
resources are available. Individual queues and ports are
configured later in port setup and eventdev start.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 09:40:22 +01:00
Timothy McDaniel
e88753dcc1 event/dlb2: add xstats
Add support for DLB2 xstats.  Perform initialization and add
standard xstats entry points.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Mike Ximing Chen <mike.ximing.chen@intel.com>
2020-11-02 09:40:12 +01:00
Timothy McDaniel
e7c9971a85 event/dlb2: add probe-time hardware init
This commit adds probe-time low level hardware
initialization.  It also adds probe-time init for both
primary and secondary DPDK processes.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 07:32:20 +01:00
Timothy McDaniel
17f56f6d56 event/dlb2: add flexible interface
This commit introduces the flexible interface. This
interface allows the core code to operate in PF mode (direct
hardware access) or bifurcated mode (hardware configured via
kernel driver). This driver currently only supports PF mode
but bifurcated mode will be added in a future DPDK patch-set.
Note that the flexible interface is not used for data path
operations, and thus there are no performance concerns
related to the use of function pointers.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 07:25:49 +01:00
Timothy McDaniel
5433956d51 event/dlb2: add eventdev probe
Add the eventdev portion of probe, and parse command line
options, but do not initialize hardware.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 07:19:15 +01:00
Timothy McDaniel
7161ea01b1 event/dlb2: add inline functions
Add miscellaneous inline functions that may be called
from multiple files.  These functions include inline
assembly of new x86 instructions, such as movdir64b,
since they are not available as builtin functions in
the minimum supported GCC version.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 07:12:40 +01:00
Timothy McDaniel
355e5ab072 event/dlb2: add definitions shared with LKM or shared code
Add headers containing structs and constants shared between
the PMD and the shared code.  The term shared code refers to
the code that implements the hardware interface. The shared code
is introduced in the probe patch, and then is extended as
additional eventdev PMD entry points are added to the patchset.
In the case of the bifurcated PMD (to be introduced in the
future), the shared code is contained in the Linux kernel
module itself.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 07:06:08 +01:00
Timothy McDaniel
bc62748bd7 event/dlb2: add private data structures and constants
The header file dlb2_priv.h is used internally by the PMD.
It include constants, macros for device resources,
structure definitions for hardware interfaces and
software state, and various forward-declarations.
The header file rte_pmd_dlb2.h will be exported in a
subsequent patch, but is included here due to a data
structure dependency.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 06:59:37 +01:00
Timothy McDaniel
ef3da1e767 event/dlb2: add dynamic logging
This commit adds base support for dynamic logging.
The default log level is NOTICE. Dynamic logging
is used exclusively throughout this patchset.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 06:53:04 +01:00
Timothy McDaniel
166378a794 event/dlb2: add documentation and build infrastructure
Adds the meson build infrastructure, which includes
compile-time constants in rte_config.h. DLB2 is
only supported on Linux 64 bit X86 platforms at this time.

Adds announcement of availability for the new driver
for Intel Dynamic Load Balancer 2.0 hardware.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
2020-11-02 06:46:12 +01:00
Timothy McDaniel
ecd8749541 eventdev: increase max queues configuration
DLB supports a total of 256 queues, 128 load balanced queues
and 128 directed queues. Increase RTE_EVENT_MAX_QUEUES_PER_DEV
to max possible uint_8_t max value.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-11-01 10:35:06 +01:00
David Marchand
98ee07c20d eventdev: check input parameter for dump op
Rather than have drivers check for this, let's ensure the passed FILE *
is not NULL.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2020-11-02 14:46:51 +01:00
Guy Kaneti
30cf171352 app/regex: add job context
Store mbuf pointer associated with that job.

Signed-off-by: Guy Kaneti <guyk@marvell.com>
Acked-by: Ori Kam <orika@nvidia.com>
2020-11-03 02:06:03 +01:00
Guy Kaneti
d96d0fa710 app/regex: configure queue according to capabilities
configure qp with OOS according to device capabilities
returned from rte_regexdev_info_get.

Signed-off-by: Guy Kaneti <guyk@marvell.com>
Acked-by: Ori Kam <orika@nvidia.com>
2020-11-03 02:03:52 +01:00
Ophir Munk
c84520053a regex/mlx5: add out-of-order scan capability
Add missing out of order scan capability
RTE_REGEXDEV_CAPA_QUEUE_PAIR_OOS_F to mlx5 regex PMD.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2020-11-03 02:03:30 +01:00
Guy Kaneti
666c4c62b7 regexdev: add out-of-order scan capability
Add out of order scan capability to check PMD
support for OOS.

Signed-off-by: Guy Kaneti <guyk@marvell.com>
Acked-by: Ori Kam <orika@nvidia.com>
2020-11-03 02:03:25 +01:00
Venkata Suresh Kumar P
2ceb0974ee pipeline: increase SWX immediate operand size
This patch increases the immediate operand size from 32 to 64 bits.

Signed-off-by: Venkata Suresh Kumar P <venkata.suresh.kumar.p@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2020-11-02 21:38:27 +01:00
Anatoly Burakov
317a1da8d6 examples/l3fwd-power: fix race on interrupt wakeup log
Currently, the interrupt status notification prevents log spam by
remembering whether previous interrupt wakeup was due to traffic or due
to timeout expiring. However, it is a single variable that can
potentially be accessed from multiple threads, so it is not thread-safe.

Fix it by having per-lcore interrupt status.

Fixes: f4d1e19c293d ("examples/l3fwd-power: add Rx interrupt timeout")
Cc: stable@dpdk.org

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
Tested-by: Xi Zhang <xix.zhang@intel.com>
2020-11-02 11:47:19 +01:00
David Marchand
79d69c6dcf mbuf: remove seqn field
As announced in the deprecation note, the field seqn is removed to give
more space to the dynamic fields.

This is how the mbuf layout looks like (pahole-style):

word  type                              name                byte  size
 0    void *                            buf_addr;         /*   0 +  8 */
 1    rte_iova_t                        buf_iova          /*   8 +  8 */
      /* --- RTE_MARKER64               rearm_data;                   */
 2    uint16_t                          data_off;         /*  16 +  2 */
      uint16_t                          refcnt;           /*  18 +  2 */
      uint16_t                          nb_segs;          /*  20 +  2 */
      uint16_t                          port;             /*  22 +  2 */
 3    uint64_t                          ol_flags;         /*  24 +  8 */
      /* --- RTE_MARKER                 rx_descriptor_fields1;        */
 4    uint32_t             union        packet_type;      /*  32 +  4 */
      uint32_t                          pkt_len;          /*  36 +  4 */
 5    uint16_t                          data_len;         /*  40 +  2 */
      uint16_t                          vlan_tci;         /*  42 +  2 */
 5.5  uint64_t             union        hash;             /*  44 +  8 */
 6.5  uint16_t                          vlan_tci_outer;   /*  52 +  2 */
      uint16_t                          buf_len;          /*  54 +  2 */
 7    uint64_t                          timestamp;        /*  56 +  8 */
      /* --- RTE_MARKER                 cacheline1;                   */
 8    struct rte_mempool *              pool;             /*  64 +  8 */
 9    struct rte_mbuf *                 next;             /*  72 +  8 */
10    uint64_t             union        tx_offload;       /*  80 +  8 */
11    struct rte_mbuf_ext_shared_info * shinfo;           /*  88 +  8 */
12    uint16_t                          priv_size;        /*  96 +  2 */
      uint16_t                          timesync;         /*  98 +  2 */
12.5  uint32_t                          dynfield1[7];     /* 100 + 28 */
16    /* --- END                                             128      */

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2020-10-31 22:14:44 +01:00