1329 Commits

Author SHA1 Message Date
Thomas Monjalon
04ed01f1f6 doc: simplify OS support in features matrix
The networking drivers features matrix had rows to show
OS and kernel modules support:
	- BSD nic_uio
	- Linux UIO
	- Linux VFIO
	- Other kdrv
	- Windows

The kernel modules details are removed to keep only OS support:
	- FreeBSD
	- Linux
	- Windows

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-21 14:53:16 +01:00
Beilei Xing
9baf3ecf52 doc: add known issue with RSS in ixgbe guide
Currently, IXGBE doesn't support RSS when double VLAN
is enabled due to FW limitation.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-01-19 18:30:00 +01:00
Jiawei Wang
bd49d1d343 net/mlx5: handle RSS action in sample
PMD validates the rss action in the sample sub-actions list,
then translates into rdma-core action and it will be used for sample
path destination.

If the RSS action is in both sample sub-actions list and original flow,
the rss level and rss type in the sample sub-actions list should be
consistent with the original flow list, since the expanding items
for RSS should be the same for both actions.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-19 13:49:41 +01:00
Hyong Youb Kim
8b428cb5a9 net/enic: use 64B completion queue entries if available
Latest VIC adapters support 64B CQ (completion queue) entries as well
as 16B entries available on all VIC models. 64B entries can greatly
reduce cache contention (CPU stall cycles) between DMA writes (Rx
packet descriptors) and polling CPU. The effect is very noticeable on
Intel platforms with DDIO. As most UCS servers are based on Intel
platforms, enable and use 64B CQ entries by default, if
available. Also, add devarg 'cq64' so the user can explicitly disable
64B CQ.

Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
2021-01-19 03:30:32 +01:00
Shiri Kuzin
e440d6cf58 net/mlx5: add GENEVE TLV option flow translation
The GENEVE TLV option matching flows must be created
using a translation function.

This function checks whether we already created a Devx
object for the matching and either creates the objects
or updates the reference counter.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-19 03:30:16 +01:00
Jiawen Wu
68436328b9 doc: update for txgbe
Add txgbe PMD new features in release notes,
update user guide in txgbe.rst for flow API and traffic manager.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-19 03:30:14 +01:00
Karra Satwik
439009e4ef net/cxgbe: remove legacy 16-bit link capabilities
Remove legacy 16-bit link capabilities and always request for the
32-bit link capabilities from firmware.

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2021-01-19 03:30:13 +01:00
Shiri Kuzin
06cd4cf63f net/mlx5: add GTP PSC item translation
This patch adds the translation function which
sets the qfi, PDU type.

The next extension header which indicates the following
extension header type is set to 0x85 - a PDU session
container.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-19 03:30:13 +01:00
Leyi Rong
6ada10deac net/i40e: remove devarg use-latest-supported-vec
As eal parameter --force-max-simd-bitwidth is already introduced,
to make it more clear when setting rx/tx function, remove
devarg use-latest-supported-vec support.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2021-01-19 03:29:53 +01:00
Tal Shnaiderman
5881b2d2d9 doc: add Windows support for mlx5
Windows is supported by mlx5 PMD.
The mlx5 guide is updated with the needed information.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
2021-01-14 10:12:37 +01:00
Michael Baum
4a7f979af2 net/mlx5: remove CQE padding device argument
The data-path code doesn't take care on 'rxq_cqe_pad_en' and use padded
CQE for any case when the system cache-line size is 128B.

This makes the argument redundant.

Remove it.

Fixes: bc91e8db12cd ("net/mlx5: add 128B padding of Rx completion entry")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Kiran Kumar K
fc4a83e6b8 net/octeontx2: support 24B custom L2 header parsing
Adding support to parse 24B custom L2 header. Added devargs support to
configure the PKIND, and removed the restriction to support custom
headers on non SDP interface.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-01-13 19:39:08 +01:00
Jiawen Wu
f437d97c3d net/txgbe: add IPsec context creation
Initialize securiry context, and add support to get
security capabilities.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-01-13 18:51:58 +01:00
Jiawen Wu
43bb1f8dd0 net/txgbe: add generic flow API
Introduce rte_flow with its validate, create, destroy and flush
operations into txgbe PMD.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-01-13 18:51:58 +01:00
Selwin Sebastian
ff70acdf42 net/axgbe: support reading FW version
Added support for fw_version_get API

Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
Acked-by: Somalapuram Amaranath <asomalap@amd.com>
2021-01-13 18:51:57 +01:00
Alvin Zhang
742d9f87f6 doc: fix RSS flow description in i40e guide
The command here does not create a queue region, but only sets the
lookup table, so the descriptions in the doc is not exact.

Fixes: feaae285b342 ("net/i40e: support hash configuration in RSS flow")
Cc: stable@dpdk.org

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:20:09 +01:00
Joyce Kong
9ef38ddba3 net/virtio: add election for packed vector NEON path
Add NEON vectorized path selection logic. Default setting comes from
vectorized devarg, then checks each criteria.

Packed ring vectorized neon path need:
    NEON is supported by compiler and host
    VERSION_1 and IN_ORDER features are negotiated
    mergeable feature is not negotiated
    LRO offloading is disabled

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-01-08 18:07:55 +01:00
Ajit Khaparde
dc241adc68 net/bnxt: remove support for some PCI IDs
As announced the deprecation notice during the 20.11 release,
remove support for NetXtreme devices belonging to BCM573xx and
BCM5740x families. Specifically the support for the following Broadcom
PCI device IDs: 0x16c8, 0x16c9, 0x16ca, 0x16ce, 0x16cf, 0x16df, 0x16d0,
0x16d1, 0x16d2, 0x16d4, 0x16d5, 0x16e7, 0x16e8, 0x16e9 has been removed.

Deprecation notice has been removed and release notes for 21.02 has
been updated accordingly.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
c2e129698d doc: fix some statements for ice vector PMD
1. Add descriptions for how to select avx512 datapath.
2. Add explanation for "P" in ice.ini.

Fixes: 7f85d5ebcfe1 ("net/ice: add AVX512 vector path")
Fixes: 271cc8c5028a ("doc: update ice features list")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Leyi Rong <leyi.rong@intel.com>
2021-01-08 16:03:06 +01:00
Liron Himi
7432c8cf8e build: update meson for Marvell Armada drivers
With pkg-config support available within musdk library
(from musdk-release-SDK-10.3.5.0-PR2 version),
meson option 'lib_musdk_dir' can be removed.
PKG_CONFIG_PATH environment variable should be set appropriately
to use the musdk library.

docs are updated with new musdk version and meson instructions.

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-08 16:03:05 +01:00
Andrew Boyer
175c4ecb9b net/ionic: update maintainer and documentation
The UNMAINTAINED flag will be removed in a future patch.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-08 16:03:04 +01:00
Girish Nandibasappa
8657851684 net/axgbe: support VLAN
Added VLAN support for AMD XGBE driver

Adding below APIs for axgbe
- axgbe_enable_rx_vlan_stripping: to enable vlan header stripping
- axgbe_disable_rx_vlan_stripping: to disable vlan header stripping
- axgbe_enable_rx_vlan_filtering: to enable vlan filter mode
- axgbe_disable_rx_vlan_filtering: to disable vlan filter mode
- axgbe_update_vlan_hash_table: crc calculation and hash table update
  based on vlan values post filter enable
- axgbe_vlan_filter_set: setting of active vlan out of max 4K values
  before doing hash update of same
- axgbe_vlan_tpid_set: setting of default tpid values
- axgbe_vlan_offload_set: a top layer function to call strip/filter etc
  based on mask values

Signed-off-by: Girish Nandibasappa <girish.nandibasappa@amd.com>
Acked-by: Somalapuram Amaranath <asomalap@amd.com>
2021-01-08 16:03:04 +01:00
Ajit Khaparde
f78c615377 doc: add vector mode limitation in bnxt guide
PMD can support vector mode when jumbo is enabled as long as MTU is not
large enough to require scattered RX (which also depends on the mbuf size).

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-11-27 18:39:04 +01:00
Raslan Darawsheh
6c21c88736 doc: add ConnectX-6 Lx and BlueField-2 in mlx5 guide
This adds ConnectX-6 Lx and BlueField-2 to the list of NICs
supported by mlx5 PMD.

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
2020-11-27 01:30:15 +01:00
Asaf Penso
cb7b0c24c8 doc: update hardware offloads support in mlx5 guide
In DPDK 20.11 the following offload features are added:
* Buffer Split
* Sampling
* Tunnel offload
* 2-port hairpin
* RSS shared action
* Age shared action

Update the relevant tables with OFED/rdma-core/NIC versions.

Signed-off-by: Asaf Penso <asafp@nvidia.com>
2020-11-27 01:30:15 +01:00
Asaf Penso
6457d0ecc1 doc: add Rx functions limitations in mlx5 guide
The mlx5 PMD supports various Rx burst functions.
Each function is enabled differently and supports different features.

Signed-off-by: Asaf Penso <asafp@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-27 00:55:34 +01:00
Qi Zhang
e89aebf3b5 doc: update ice user guide
Add link for firmware/OOT kernel driver/DDP download
Add matching List.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-26 18:19:37 +01:00
Lijun Ou
45bf45a894 doc: update hns3 features
Since the hns3 NIC hardware features are not counted
and it is supported in fact. Besides, the flow director
is not supported and need to delete it.

Fixes: fa29fe45a7b4 ("net/hns3: support queue start and stop")
Fixes: 521ab3e93361 ("net/hns3: add simple Rx path")
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
Fixes: 936eda25e8da ("net/hns3: support dump register")
Fixes: 53b9f2b9a560 ("doc: update feature list in hns3 guide")
Cc: stable@dpdk.org

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-26 18:01:19 +01:00
Ajit Khaparde
c6f039745f doc: update TRUFLOW support in bnxt guide
Currently TRUFLOW is supported only on Whitney+ and Stingray devices.
Update the PMD doc with this info.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-11-26 18:01:19 +01:00
Ajit Khaparde
3e294259f9 doc: remove list of supported OS from bnxt guide
Remove list of supported OS in PMD specific doc.
Documenting an unsupported version of OS makes more sense in
PMD specific docs.
Platforms tested with this device is documented in release notes anyway.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-26 18:01:19 +01:00
Ciara Loftus
2f394d869b net/af_xdp: document 32-bit OS kernel requirement
AF_XDP will not work on 32-bit kernels before version 5.4.
Document this restriction in the driver guide.

Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
2020-11-20 21:10:05 +01:00
Ivan Malov
e4f72c9e66 net/sfc: rely on native thread safety in flow mechanism
The changeset that introduced common flow API thread safety
in fact introduced double locking to this particular PMD as
RTE flow API implementation in the PMD has been thread-safe
since the day zero. State this by setting the corresponding
device flag to skip locking imposed by generic RTE flow API.

Fixes: 80d1a9aff7f6 ("ethdev: make flow API thread safe")

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2020-11-20 21:10:04 +01:00
Stephen Hemminger
1509e07f58 doc: replace usage of blacklist/whitelist
The words blacklist and whitelist are avoided in text
about MAC filtering or kernel module.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Luca Boccassi <bluca@debian.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-16 00:11:22 +01:00
Stephen Hemminger
db27370b57 eal: replace blacklist/whitelist options
Replace -w / --pci-whitelist with -a / --allow options
and --pci-blacklist with --block.
The -b short option remains unchanged.

Allow the old options for now, but print a nag
warning since old options are deprecated.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Luca Boccassi <bluca@debian.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-11-16 00:11:22 +01:00
Shougang Wang
55384497fe doc: update firmware/driver mapping table for i40e
Update i40e PMD firmware/driver mapping table.

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
2020-11-13 19:43:26 +01:00
Ciara Power
35ce677cfa doc: fix hyperlink in igc guide
The hyperlink in the IGC documentation showed the whole link in italics
and was not clickable. This is now fixed to have a clickable label.

Fixes: 66fde1b943eb ("net/igc: add skeleton")
Cc: stable@dpdk.org

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:35:07 +01:00
Alexander Kozyrev
54c2d46b16 net/mlx5: support flow tag and packet header miniCQEs
CQE compression allows us to save the PCI bandwidth and improve
the performance by compressing several CQEs together to a miniCQE.
But the miniCQE size is only 8 bytes and this limits the ability
to successfully keep the compression session in case of various
traffic patterns.

The current miniCQE format only keeps the compression session alive
in case of uniform traffic with the Hash RSS as the only difference.
There are requests to keep the compression session in case of tagged
traffic by RTE Flow Mark Id and mixed UDP/TCP and IPv4/IPv6 traffic.
Add 2 new miniCQE formats in order to achieve the best performance
for these traffic patterns: Flow Tag and Packet Header miniCQEs.

The existing rxq_cqe_comp_en devarg is modified to specify the
desired miniCQE format. Specifying 2 selects Flow Tag format
for better compression rate in case of RTE Flow Mark traffic.
Specifying 3 selects Checksum format (existing format for MPRQ).
Specifying 4 selects L3/L4 Header format for better compression
rate in case of mixed TCP/UDP and IPv4/IPv6 traffic.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2020-11-03 23:35:07 +01:00
Long Li
096b31fc0d net/netvsc: control use of external mbuf on Rx
When receiving packets, netvsp puts data in a buffer mapped through UIO.
Depending on packet size, netvsc may attach the buffer as an external
mbuf. This is not a problem if this mbuf is consumed in the application,
and the application can correctly read data out of an external mbuf.

However, there are two problems with data in an external mbuf.
1. Due to the limitation of the kernel UIO implementation, physical
   address of this external buffer is not exposed to the user-mode. If
   this mbuf is passed to another driver, the other driver is unable to
   map this buffer to iova.
2. Some DPDK applications are not aware of external mbuf, and may bug
   when they receive an mbuf with external buffer attached.

Introduce a driver parameter "rx_extmbuf_enable" to control if netvsc
should use external mbuf for receiving packets. The default value is 0.
(netvsc doesn't use external mbuf, it always allocates mbuf and copy
data to mbuf) A non-zero value tells netvsc to attach external buffers
to mbuf on receiving packets, thus avoid copying memory.

Signed-off-by: Long Li <longli@microsoft.com>
2020-11-03 23:35:07 +01:00
Stephen Hemminger
74a5a6663b net/netvsc: allow setting Rx and Tx copy break
The values for Rx and Tx copy break should be tunable rather
than hard coded constants.

The rx_copybreak sets the threshold where the driver uses an
external mbuf to avoid having to copy data. Setting 0 for copybreak
will cause driver to always create an external mbuf. Setting
a value greater than the MTU would prevent it from ever making
an external mbuf and always copy. The default value is 256 (bytes).

Likewise the tx_copybreak sets the threshold where the driver
aggregates multiple small packets into one request. If tx_copybreak
is 0 then each packet goes as a VMBus request (no copying).
If tx_copybreak is set larger than the MTU, then all packets smaller
than the chunk size of the VMBus send buffer will be copied; larger
packets always have to go as a single direct request. The default
value is 512 (bytes).

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Signed-off-by: Long Li <longli@microsoft.com>
2020-11-03 23:35:07 +01:00
Michal Krawczyk
1a70477206 doc: mark Armv8 as supported by ena PMD
The ARMv8 platform support was tested and works fine with the ENA PMD.

It can be used on the AWS a1.* and m6g.* instances.

The ARMv8 support in ENA is at least from v19.11, where the VFIO DPDK
driver was fixed to work with 32-bit applications compiled for arm.

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
2020-11-03 23:35:06 +01:00
Michal Krawczyk
f7138b91f8 net/ena: change name of supported PCI device IDs
The ID 0xEC21 is not associated with LLQ feature of the device, so it
would be misleading for the user. Because of that, the current
identifier is more precise.

Together with code update, the documentation was changed to reflect
current changes

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
2020-11-03 23:35:06 +01:00
Jeff Guo
12b435bf8f net/iavf: support flex desc metadata extraction
Enable metadata extraction for flexible descriptors in AVF, that would
allow network function directly get metadata without additional parsing
which would reduce the CPU cost for VFs. The enabling metadata
extractions involve the metadata of VLAN/IPv4/IPv6/IPv6-FLOW/TCP/MPLS
flexible descriptors, and the VF could negotiate the capability of
the flexible descriptor with PF and correspondingly configure the
specific offload at receiving queues.

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2020-11-03 23:35:06 +01:00
Andrew Rybchenko
141d287067 net/sfc: support aarch64 architecture
Enable the PMD build on aarch64.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-11-03 23:35:06 +01:00
Andrew Rybchenko
cf47acc0f9 ethdev: remove L2 tunnel offload control API
Remove rte_eth_dev_l2_tunnel_offload_set() and corresponding
ethdev driver operation.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:35:06 +01:00
Andrew Rybchenko
99a1b6895f ethdev: remove API to config L2 tunnel EtherType
Remove rte_eth_dev_l2_tunnel_eth_type_conf() and corresponding
ethdev driver operation.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:35:06 +01:00
Andrew Rybchenko
1be514fbce ethdev: remove legacy FDIR filter type support
Instead of FDIR filters RTE flow API should be used.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:35:05 +01:00
Andrew Rybchenko
35b1c68af2 ethdev: remove legacy EtherType filter type support
Instead of EtherType filter RTE flow API should be used.

Move corresponding definitions to ethdev internal driver API
since it is used by drivers internally.
Preserve RTE_ETH_FILTER_ETHERTYPE because of it as well.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:35:05 +01:00
Xueming Li
9fbe97f0ce net/mlx5: remove shared context lock
To support multi-thread flow insertion, this patch removes shared data
lock since all resources should support concurrent protection.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2020-11-03 23:35:05 +01:00
Matan Azrad
86b59a1af6 net/mlx5: support VLAN matching fields
The fields ``has_vlan`` and ``has_more_vlan`` were added in rte_flow by
patch [1].

Using these fields, the application can match all the VLAN options by
single flow: any, VLAN only and non-VLAN only.

Add the support for the fields.
By the way, add the support for QinQ packets matching.

VLAN\QinQ limitations are listed in the driver document.

[1] https://patches.dpdk.org/patch/80965/

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2020-11-03 23:35:04 +01:00
Bing Zhao
fea928802d doc: update hairpin support in mlx5 guide
Hairpin between two ports will be supported by mlx5 PMD.

The supported scenarios and limitations are listed in "mlx5.rst".

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2020-11-03 23:35:04 +01:00