4 Commits

Author SHA1 Message Date
Jerin Jacob
5868ccdbf1 common/octeontx2: introduce irq handling functions
All PCIe drivers(ethdev, mempool, cryptodev and eventdev) in octeontx2,
needs to handle interrupt for mailbox and error handling.
Create a helper function over rte interrupt API to register,
unregister, disable interrupts.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
e1d9a02ad8 common/octeontx2: introduce common device class
Introduce otx2_dev class to hold octeontx2 PCIe device specific
information and operations.

All PCIe drivers(ethdev, mempool, cryptodev and eventdev) in octeontx2,
inherits this base object to avail the common functionalities such
as mailbox creation, interrupt registration, etc of the PCIe device.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
dd543124cd common/octeontx2: add runtime log infra
Various consumers of this common code need runtime
logging infrastructure. This patch adds the same.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
371d3212cb common/octeontx2: add build infrastructure and HW definition
Add the make and meson based build infrastructure along with
HW definition header file.

This patch adds skeleton otx2_mbox.c file to make sure
all header files are intact, subsequent patches add content
to otx2_mbox.c

This patch also updates CONFIG_RTE_MAX_VFIO_GROUPS
value to 128 as the system can have up to 128 PFs/VFs.
For octeontx2 meson build target, CONFIG_RTE_MAX_VFIO_GROUPS
defined as 128 so no additional changes required.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-06-25 23:35:57 +02:00