550 Commits

Author SHA1 Message Date
Timothy McDaniel
ca12862218 event/dlb2: add v2.5 create LDB port
Update the low level HW functions responsible for
creating load balanced ports. These functions create the
producer port (PP), configure the consumer queue (CQ), and
validate the port creation arguments.

The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names.  Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
e0c08ad1db event/dlb2: add v2.5 create LDB queue
Updated low level hardware functions related to configuring
load balanced queues. These functions create the queues,
as well as attach related resources required by load
balanced queues, such as sequence numbers.

The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names.  Additionally,
new register access macros are used so that the code
can perform the correct action based on the hardware
version, v2.0 or v2.5.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
a1295544fe event/dlb2: add v2.5 domain reset
Reset hardware registers, consumer queues, ports,
interrupts and software. Queues must also be drained
as part of the reset process.

The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names.  Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
0dfab249d5 event/dlb2: add v2.5 create sched domain
Update domain creation logic to account for DLB v2.5
credit scheme, new register map, and new register access
macros.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
4ce7bf9ec1 event/dlb2: add v2.5 get resources
DLB v2.5 uses a new credit scheme, where directed and load balanced
credits are unified, instead of having separate directed and load
balanced credit pools.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
0d65f8f9e3 event/dlb2: add v2.5 HW init
Add support for DLB v2.5 probe-time hardware init,
and sets up a framework for incorporating the remaining
changes required to support DLB v2.5.

DLB v2.0 and DLB v2.5 are similar in many respects, but their
register offsets and definitions are different. As a result of these,
differences, the low level hardware functions must take the device
version into consideration. This requires that the hardware version be
passed to many of the low level functions, so that the PMD can
take the appropriate action based on the device version.

To ease the transition and keep the individual patches small, three
temporary files are added in this commit. These files have "new"
in their names.  The files with "new" contain changes specific to a
consolidated PMD that supports both DLB v2.0 and DLB 2.5. Their sister
files of the same name (minus "new") contain the old DLB v2.0 specific
code. The intent is to remove code from the original files as that code
is ported to the combined DLB 2.0/2.5 PMD model and added to the "new"
files in a series of commits. At end of the patch series, the old files
will be empty and the "new" files will have the logic needed
to implement a single PMD that supports both DLB v2.0 and DLB v2.5.
At that time, the original DLB v2.0 specific files will be deleted,
and the "new" files will be renamed and replace them.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
7da19335cf event/dlb2: add v2.5 HW register definitions
Add auto-generated register definitions, updated to
support both DLB v2.0 and v2.5 devices.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
b66a418d2a event/dlb2: add v2.5 probe
This commit adds dlb v2.5 probe support, and updates
parameter parsing.

The dlb v2.5 device differs from dlb v2, in that the
number of resources (ports, queues, ...) is different,
so macros have been added to take the device version
into account.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
a3c8a44634 event/dlb2: remove useless code
- Remove references of FPGA.
- Do not include dlb2_mbox.h as it is not needed.
- Remove duplicate macros/defines that were
present in both dlb2_priv.h and dlb2_hw_types.h.
Update dlb2_resource.c to include dlb2_priv.h
so that it picks up the macros/defines that
have now been consolidated.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Shijith Thotton
849111aec7 event/octeontx2: configure crypto adapter xaq pool
Configure xaq pool based on number of in-use crypto queues to avoid CPT
add work failure due to xaq buffer run out. This patch configures
OTX2_CPT_DEFAULT_CMD_QLEN number of xae entries per queue pair.

Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-29 10:48:22 +02:00
Shijith Thotton
3841fc3581 event/octeontx2: fix crypto adapter queue pair operations
Parameter queue_pair_id of crypto adapter queue pair add/del operation
can be -1 to select all pre configured crypto queue pairs. Added support
for the same in driver. Also added a member in cpt qp structure to
indicate binding state of a queue pair to an event queue.

Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Ankur Dwivedi <adwivedi@marvell.com>
2021-04-29 10:47:49 +02:00
Bruce Richardson
4ad4b20a79 drivers: change indentation in build files
Switch from using tabs to 4 spaces for meson.build indentation.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-21 14:04:09 +02:00
Bruce Richardson
cf995efc53 drivers: clean up build lists
Ensure all lists of drivers are standardized:
* one driver per line
* lists double-indented with spaces (as they are line continuations)
* elements in alphabetical order
* opening and closing list brackets "[" & "]" on own lines
* last element has trailing comma

Any code snippets in the list files is adjusted to single-indent using
whitespace to correspond to the new style also.

The lists of standard library dependencies per class, and other short
lists are not formatted one-per-line as these lists are not expected to
grow beyond 2 or 3 entries.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-21 12:37:55 +02:00
Shijith Thotton
4a67a0573e event/octeontx2: support crypto adapter forward mode
Advertise crypto adapter forward mode capability and set crypto adapter
enqueue function in driver.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2021-04-17 18:50:06 +02:00
Ferruh Yigit
bd063651d5 drivers: add missing includes
These headers are used but not included explicitly, including them.

"arpa/inet.h" is included for 'htons' and friends.
"netinet/in.h" is included for 'IPPROTO_IP'.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
2021-04-14 11:23:13 +02:00
Harman Kalra
340d22cdd1 event/octeontx2: fix device reconfigure for single slot
When device is re-configured, memory allocated for work slot is freed
and new memory is allocated. Due to this we may loose some important
configurations/mappings done with initial work slot memory.

For example, whenever rte_event_eth_tx_adapter_queue_add is called
some important meta i.e. txq handle is stored in work slot structure.
If device gets reconfigured after this tx adaptor add, txq to work
slot mapping will be lost resulting in seg fault during packet
processing, as txq handle could not be retrieved from work slot.

Fixes: 67b5f4686459 ("event/octeontx2: add port config functions")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
fc00b664e7 event/octeontx2: use always virtual counter for timer
Use virtual counter for estimating current bucket as PMU cannot be
reliably used to estimate time.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
94f0159ba7 event/octeontx2: reduce chunk pool memory usage
Reduce amount of memory used by chunk pool when the mempool used
is OCTEONTX2 NPA.
Previously, the number of chunks configured when NPA is used is
equal to the number of timers requested plus the number of buckets
and if the max timeout is long enough w.r.t. resolution requested
there will a large number of buckets which would cause high memory
usage.
Reduce the number of chunks when NPA is used to the number of timers
requested as buckets that are processed chunk lists are automatically
freed.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
703c02647b event/octeontx2: optimize timer Arm routine
Use relaxed load exclusive when polling for other threads or
hardware to complete.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
25b401c8b6 event/octeontx2: simplify timer bucket estimation
Simplify timer bucket estimation we need not align buckets to
power of 2 instead use reciprocal division to compute mod.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-12 09:23:34 +02:00
Shijith Thotton
64ea4ae178 event/octeontx2: support timer periodic mode
Add support for periodic mode in event timer adapter.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
052a5d3867 event/octeontx2: fix XAQ pool reconfigure
When XAQ pool is being re-configured, and if the same memzone
is used for fc_mem when freeing the old mempool the fc_mem
will be incorrectly updated with the free count.

Fixes: ffa4ec0b6063 ("event/octeontx2: allow adapters to resize inflight buffers")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-12 09:23:34 +02:00
Timothy McDaniel
698fa82941 event/dlb: remove driver
Remove event/dlb driver from DPDK code base.
Updated release note's removal section to reflect the same.

Also updated doc/guides/rel_notes/release_20_11.rst to fix the
the missing link issue due to removal of doc/guides/eventdevs/dlb.rst

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-04-12 09:21:30 +02:00
Harry van Haaren
324b37e637 event/sw: add xstats to expose progress details
Today it is difficult to know if the SW Eventdev PMD is making
forward progress when it runs an iteration of its service. This
commit adds two xstats to give better visibility to the application.

The new xstats provide an application with which Eventdev ports
received work in the last iteration of scheduling, as well if
forward progress was made by the scheduler.

This patch implements an xstat for the SW PMD that exposes a
bitmask of ports that were scheduled to. In the unlikely case
that the SW PMD instance has 64 or more ports, return UINT64_MAX.

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
2021-04-12 09:19:02 +02:00
Mattias Rönnblom
8b1af885f6 event/dsw: use C11 built-ins for atomics
Use C11-style GCC built-in functions for atomic operations.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2021-04-12 09:19:02 +02:00
Thomas Monjalon
29420808d0 event/dlb: fix header includes for musl
The header file fcntl.h should not be included from sys/ directory
as done in dlb drivers, it is an error with musl libc.

Fixes: 19980083fd57 ("event/dlb: add eventdev probe")
Fixes: 5433956d5185 ("event/dlb2: add eventdev probe")
Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-03-23 08:41:05 +01:00
Thomas Monjalon
924e6b7634 drivers: replace page size definitions with function
The page size is often retrieved from the macro PAGE_SIZE.
If PAGE_SIZE is not defined, it is either using hard coded default,
or getting the system value from the UNIX-only function sysconf().

Such definitions are replaced with the generic function
rte_mem_page_size() defined for each supported OS.

Removing PAGE_SIZE definitions will fix dlb drivers for musl libc,
because #ifdef checks were missing, causing redefinition errors.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Boyer <aboyer@pensando.io>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-03-23 08:41:05 +01:00
Lance Richardson
e8a419d6de mbuf: rename outer IP checksum macro
Rename PKT_RX_EIP_CKSUM_BAD to PKT_RX_OUTER_IP_CKSUM_BAD and
deprecate the original name. The new name is better aligned
with existing PKT_RX_OUTER_* flags, which should help reduce
confusion about its use.

Suggested-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-03-02 10:57:28 +01:00
Timothy McDaniel
d9e8329518 event/dlb: fix accessing uninitialized variables
This patch updates the PMD to initialize response fields
prior to calling into the PF layer.

Coverity issue: 366200, 366202, 366205
Fixes: eb14a3421afd ("event/dlb: add eventdev start")
Fixes: f0073621940c ("event/dlb: add eventdev stop and close")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-02-04 13:25:43 +01:00
Bruce Richardson
2518704288 eventdev: make driver-only headers private
The rte_eventdev_pmd*.h files are for drivers only and should be private
to DPDK, and not installed for app use.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:09 +01:00
Bruce Richardson
df96fd0d73 ethdev: make driver-only headers private
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are
for drivers only and should be a private to DPDK and not installed.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Steven Webster <steven.webster@windriver.com>
2021-01-29 20:59:09 +01:00
Pavan Nikhilesh
fd7a6adf8a event/octeontx2: enhance Tx path cache locality
Enhance Tx path cache locality, remove current tag type and group
stores from datapath to conserve store buffers.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-01-26 10:39:03 +01:00
Anatoly Burakov
f400ea0b4c eal: rename power monitor condition member
The `data_sz` name is fine, but it looks out of place because nothing
else has "data" prefix in that structure. Rename it to "size", as well
as add more clarity to the comments around each struct member.

Fixes: 6a17919b0e2a ("eal: change power intrinsics API")

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-01-29 15:29:48 +01:00
Bruce Richardson
762bfccc8a config: remove compatibility build defines
As announced in the deprecation note, remove all compatibility build
defines from previous make/meson versions and use only the standardized
ones - RTE_LIB_<name> for libraries, and RTE_<CLASS>_<NAME> for drivers.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-01-20 01:43:25 +01:00
Tejasree Kondoj
bab97a3ffb crypto/octeontx2: support CN98xx
CN98xx SoC comes up with two CPT blocks wrt
CN96xx, CN93xx, to achieve higher performance.

Adding support to allocate all LFs of VF with even BDF from CPT0
and all LFs of VF with odd BDF from CPT1.
If LFs are not available in one block then they will be allocated
from alternate block.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-01-19 18:05:17 +01:00
Anatoly Burakov
6a17919b0e eal: change power intrinsics API
Instead of passing around pointers and integers, collect everything
into struct. This makes API design around these intrinsics much easier.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2021-01-18 23:59:12 +01:00
Shijith Thotton
8e6663b8c1 event/octeontx2: unlink queues during port release
Unlinking queues from port should be done during port release. Doing it
during device re-configuration could result in segfault as ports array
is re-allocated based on new number of ports.

Fixes: f7ac8b66b23c ("event/octeontx2: support linking queues to ports")
Cc: stable@dpdk.org

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-11-20 18:53:47 +01:00
Pavan Nikhilesh
52f2fcb3e2 event/octeontx2: fix unconditional Tx flush
Fix unconditional Tx flush, in case of Tx only we need to check if
work slot is non-empty before issuing flush.
Also, in packet retransmit cases added check for the reference
count and flush the work slot only for the last packet.

Fixes: cb7ee83b6365 ("event/octeontx2: improve single flow performance")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-11-20 18:53:47 +01:00
Pavan Nikhilesh
a912cb5bdd event/octeontx: remove selftest option
Since selftest now depends on dynamic mbuf fields it is not
feasible to run selftest on device probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-11-20 18:53:47 +01:00
Pavan Nikhilesh
c116a2aad9 event/octeontx2: remove selftest option
Since selftest now depends on dynamic mbuf fields it is not
feasible to run selftest on device probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-11-20 18:53:47 +01:00
Timothy McDaniel
fd3607bb8a event/dlb: fix mempool query in self test
Add NULL check before using t->mbuf_pool.

Coverity issue: 363719
Fixes: d1112958f4f5 ("event/dlb: add self-tests")

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2020-11-20 18:53:47 +01:00
Thomas Monjalon
135155a836 build: align wording of non-support reasons
Reasons for building not supported generally start with lowercase
because printed as the second part of a line.

Other changes:
	- "linux" should be "Linux" with a capital letter.
	- ARCH_X86_64 may be simply x86_64.
	- aarch64 is preferred over arm64.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-11-20 16:05:35 +01:00
Timothy McDaniel
edbebd334a event/dlb: remove duplicate/unused PCI code
Use rte_pci_find_ext_capability instead of private version,
Remove unused PCI offsets and values
Use PCI definitions from rte_pci.h, where available.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2020-11-12 19:07:52 +01:00
Timothy McDaniel
bc3d6a34c0 event/dlb: skip memzone freeing if port created
Add missing returns so that the memzone free is not called if
port create is successful.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Mike Ximing Chen <mike.ximing.chen@intel.com>
2020-11-12 19:00:52 +01:00
Timothy McDaniel
a00c150fe2 event/dlb2: remove duplicate/unused PCI code
Use rte_pci_find_ext_capability instead of private version,
Remove unused PCI offsets and values
Use PCI definitions from rte_pci.h, where available.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2020-11-12 18:53:34 +01:00
Timothy McDaniel
07d55c418d event/dlb2: add delayed token pop logic
The code contained in this commit was inadvertently omitted
when dissecting the dlb2 code base into discrete patches for
upstream.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Mike Ximing Chen <mike.ximing.chen@intel.com>
2020-11-12 18:40:22 +01:00
Timothy McDaniel
47dc89fefa event/dlb2: fix mempool query in self test
Add NULL check before using t->mbuf_pool.

Coverity issue: 363719
Fixes: 6f1b828 ("event/dlb2: add self-tests")

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2020-11-12 18:40:18 +01:00
Timothy McDaniel
76a1e914d5 event/dlb: remove useless assignment
Remove nonproductive assignment of qmport->cq_depth.

Coverity issue: 363717
Fixes: ee57517 ("event/dlb: add port setup")

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2020-11-12 18:40:18 +01:00
Timothy McDaniel
d98400512a event/dlb: fix memory overrun in PF reset
Fix memory corruption bug caused by passing address of a 16b value,
instead of address of a 32b value.

Coverity issue: 363715
Fixes: 1998008 ("event/dlb: add eventdev probe")

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2020-11-12 18:40:18 +01:00
Thomas Monjalon
43314d97e2 drivers: disable OCTEON TX2 in 32-bit build
The drivers for OCTEON TX2 are not supported in 32-bit mode.

Suggested-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-11-12 16:39:10 +01:00