17251 Commits

Author SHA1 Message Date
Tomasz Cel
bbbc39b2c2 compress/isal: fix getting information about CPU
This patch adds query about CPU features

Fixes: 53a9baa98c36 ("compress/isal: add basic PMD ops")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Acked-by: Lee Daly <lee.daly@intel.com>
2019-04-02 16:50:24 +02:00
Tomasz Jozwiak
1e796b11fe drivers/qat: fix queue pair NUMA node
This patch assigns QAT queue pair resources to the correct NUMA nodes.
Any DMA'able memory should use NUMA node of QAT device
rather than socket_id of the initializing process.

Fixes: 98c4a35c736f ("crypto/qat: move common qat files to common dir")
Fixes: a795248d740b ("compress/qat: add configure and clear functions")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Lee Daly
1aeb9fdb2e compress/isal: add appropriate flag on overflow
This patch will change the operation status when ISA-L returns because
of a recoverable out of space error, rather than a just generic fail.

Signed-off-by: Lee Daly <lee.daly@intel.com>
Tested-by: Tomasz Cel <tomaszx.cel@intel.com>
2019-04-02 16:50:24 +02:00
Ayuj Verma
e010ea065a test/crypto: check key type feature flag for asym
crypto pmds are queried to check if Sign and Decrypt
with CRT keys or exponent is supported, thus call
operation with relevant key type.

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Ayuj Verma
378e08eba8 crypto/openssl: set RSA private op feature flag
openssl PMD support RSA private key operation
using both qt and exp key type.
Set rsa key type feature flag

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Ayuj Verma
398ba4c13f cryptodev: add RSA private key feature flag
Add feature flag to reflect RSA private key
operation support using quintuple (crt) or
exponent type key. if PMD support both,
then it should set both.

App should query cryptodev feature flag to check
if Sign and Decryt with CRT keys or exponent is
supported, thus call operation with relevant
key type.

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Akhil Goyal
3b4757fc74 crypto/dpaa2_sec: support multi-process
- fle pool allocations should be done for each process.
- cryptodev->data is shared across muliple processes but
cryptodev itself is allocated for each process. So any
information which needs to be shared between processes,
should be kept in cryptodev->data.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Akhil Goyal
e621d97000 crypto/dpaa_sec: fix session queue attach/detach
session inq and qp are assigned for each core from which the
packets arrive. This was not correctly handled while supporting
multiple sessions per queue pair.
This patch fixes the attach and detach of queues for each core.

Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Akhil Goyal
07a5efda06 crypto/dpaa2_sec: remove unnecessary flc configurations
The removed fields are required in case the SEC block
allocates the buffer from bman pool.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Akhil Goyal
7449390bb8 drivers/crypto: update inline desc for sharing mode
SEC HW descriptor sharing mode can now be controlled
during Session preparation by the respective drivers

shared descriptors in case of non-protocol offload does not need
any sync between the subsequent jobs. Thus, changing it to
SHR_NEVER from SHR_SERIAL for cipher_only, auth_only, and gcm.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Akhil Goyal
a5e05ab643 crypto/dpaa2_sec: fix offset calculation for GCM
In case of gcm, output buffer should have aad space
before the actual buffer which needs to be written.
CAAM will not write into the aad anything, it will skip
auth_only_len (aad) and write the buffer afterwards.

Fixes: 37f96eb01bce ("crypto/dpaa2_sec: support scatter gather")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Akhil Goyal
fd4f22fbd8 crypto/dpaa2_sec: fix session clearing
private data should be cleared instead of the complete session

Fixes: 8d1f3a5d751b ("crypto/dpaa2_sec: support crypto operation")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Tomasz Jozwiak
352332744c compress/qat: add dynamic SGL allocation
This patch adds dynamic SGL allocation instead of static one.
The number of element in SGL can be adjusted in each operation
depend of the request.

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Fan Zhang
7b2d4706c9 crypto/aesni_mb: support newer library version only
As stated in 19.02 deprecation notice, this patch updates the
aesni_mb PMD to remove the support of older Intel-ipsec-mb
library version earlier than 0.52.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2019-04-02 16:50:24 +02:00
Fan Zhang
5e73a1f815 test/crypto: check out of place for AESNI-MB
This patch updates the unit test to enable AESNI-MB PMD
out-of-place tests. A special test type that swap both
the source and destination buffer is added for a more
comprehensive test set to take place.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Fan Zhang
2d0c29a37a crypto/aesni_mb: enable out of place processing
Add out-of-place processing, i.e. different source and
destination m_bufs, plus related capability update, tests
and documentation.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Paul Luse <paul.e.luse@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2019-04-02 16:50:24 +02:00
Damian Nowak
488f5a23c2 test/crypto: check asymmetric crypto
This patch adds new test structure for modexp
and modinv for asymmetric cryptography.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
8245972c04 crypto/qat: add modular multiplicative inverse
This commit adds modular multiplicative inverse to Intel
QuickAssist Technology driver. For capabilities or limitations
please refer to qat.rst or qat_asym_capabilities.h.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
fb70b33b05 crypto/qat: add modular exponentiation
This commit adds modular exponentiation to Intel QuickAssist
Technology driver. For capabilities or limitations please refer to
qat.rst or qat_asym_capabilities.h.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
f81cbc208f crypto/qat: add asymmetric crypto PMD
This patch adds Poll Mode Driver for asymmetric crypto
functions of Intel QuickAssist Technology hardware.

It contains plain driver with no functions implemented, specific
algorithms will be introduced in separate patches.

This patch depends on a QAT PF driver for device initialization. See
the file docs/guides/cryptodevs/qat.rst for configuration details.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
0adc033f58 common/qat: add headers for asymmetric crypto
This commit adds headers to be used in conjunction with asymmetric
cryptography operations using Intel QuickAssist Technology driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Lukasz Krakowiak
24342ade2c test/crypto: check SNOW3G when digest is encrypted
Add test case for encryption, decryption for snow3g when digest
is encrypted

Signed-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Konstantin Ananyev
f60ea1d734 examples/ipsec-secgw: fix test script
Fixes: 929784452094 ("examples/ipsec-secgw: add scripts for functional test")
Cc: stable@dpdk.org

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Konstantin Ananyev
fd7c1172ed examples/ipsec_secgw: fix possible null dereference
Coverity issue: 336844
Fixes: 3e5f4625dc17 ("examples/ipsec-secgw: make data-path to use IPsec library")
Cc: stable@dpdk.org

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Konstantin Ananyev
7831bcf026 examples/ipsec-secgw: fix out-of-bound check
Coverity issue: 336791
Fixes: 7622291b641d ("examples/ipsec-secgw: allow to specify neighbour MAC address")
Cc: stable@dpdk.org

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Anoob Joseph
728762e37e doc: announce ABI change for cryptodev config
Add new field ff_disable in rte_cryptodev_config. This enables
applications to control the features enabled on the crypto device.

Proposed new layout:

/** Crypto device configuration structure */
struct rte_cryptodev_config {
    int socket_id;            /**< Socket to allocate resources on */
    uint16_t nb_queue_pairs;
    /**< Number of queue pairs to configure on device */
+   uint64_t ff_disable;
+   /**< Feature flags to be disabled. Only the following features are
+    * allowed to be disabled,
+    *  - RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO
+    *  - RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO
+    *  - RTE_CRYTPODEV_FF_SECURITY
+    */
};

For eth devices, rte_eth_conf.rx_mode.offloads and
rte_eth_conf.tx_mode.offloads fields are used by applications to
control the offloads enabled on the eth device. This proposal adds a
similar ability for the crypto device.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Tomasz Cel
ae1374e240 compress/isal: fix compression stream initialization
This patch fixes ISAL internal state fields initialization.

Fixes: dc49e6aa4879 ("compress/isal: add ISA-L compression functionality")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Pallantla Poornima
64fc990877 test/event: replace sprintf with snprintf
sprintf function is not secure as it doesn't check the length of string.
More secure function snprintf is used.

Fixes: 2a9c83ae3b ("test/eventdev: add multi-ports test")
Cc: stable@dpdk.org

Signed-off-by: Pallantla Poornima <pallantlax.poornima@intel.com>
2019-04-02 03:32:56 +02:00
Pavan Nikhilesh
f0959283ed app/eventdev: add option for global dequeue timeout
Add option to provide a global dequeue timeout that is used to create
the eventdev.
The dequeue timeout provided will be common across all the worker
ports. If the eventdev hardware supports power management through
dequeue timeout then this option can be used for verifying power
demands at various packet rates.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-04-02 03:11:08 +02:00
Harry van Haaren
1b03e29291 event/sw: fix enqueue checks in self-test
This patch fixes a number of instances of the same return
value mis-check, where previously we checked for a negative
return value as error, however the API returns an unsigned
integer, so these return value checks are invalid.

The rte_event_enqueue_burst() API returns the number of
events enqueued, so in order to identify the error case,
we must check for != the number of intended enqueues.

Fixes: cd1a9e3eab55 ("test/eventdev: add SW tests for load balancing")
Cc: stable@dpdk.org

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-04-02 03:10:47 +02:00
Pavan Nikhilesh
2385a7f5e6 test/event: improve compatibility for timer adapter
Check if eventdev is open system eventdevs i.e. max_num_events = -1
before asserting.
Allow event timer adapter to adjust the resolution using
RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES and re-calculate timeout ticks
based on the adjusted resolution.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
2019-04-02 03:10:40 +02:00
Pavan Nikhilesh
d69d085883 eventdev: check timer adapter status before start
Check if timer adapter is already started before starting it.
Update the unit test accordingly.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
2019-04-02 03:10:40 +02:00
Jerin Jacob
4b3997680a eal: allow to override init macros per OS
baremetal execution environments may have a different
method to enable RTE_INIT instead of using compiler
constructor and/or OS specific linker scheme.
Allow an option to override RTE_INIT* macros using
rte_os.h or appropriate header file.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-04-03 23:52:00 +02:00
Gage Eads
640c5f09ef eal/x86: add 128-bit atomic compare exchange
This operation can be used for non-blocking algorithms, such as a
non-blocking stack or ring.

It is available only for x86_64.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2019-04-03 21:59:46 +02:00
Dharmik Thakkar
3f9aab961e test/hash: check lock-free extendable bucket
Add unit test to check for hash lookup and bulk-lookup perf for
extendable bucket feature.
It is tested with both lock-free enabled and lock-free disabled case.

Test includes:

- hash lookup on keys in ext bkt
- hash delete causing key-shifts of keys from ext bkt to secondary bkt

Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
2019-04-03 20:55:02 +02:00
Dharmik Thakkar
f401363d98 hash: support lock-free extendable bucket
This patch enables lock-free read-write concurrency support for
extendable bucket feature.

Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
2019-04-03 20:52:35 +02:00
Shahaf Shuler
237060c4ad mem: limit use of address hint
The commit below added an address hint as starting address for 64-bit
systems in case an explicit base virtual address was not set by the user.

The justification for such hint was to help devices that work in VA
mode and has a address range limitation to work smoothly with the eal
memory subsystem.

While the base address value selected may work fine for the eal
initialization, it easily breaks when trying to register external memory
using rte_extmem_register API.

Trying to register anonymous memory on RH x86_64 machine took several
minutes, during them the function eal_get_virtual_area repeatedly
scanned for a good VA candidate.

The attempt to guess which VA address will be free for mapping will
always result in not portable, error prone code:
* different application may use different libraries along w/ DPDK. One
  can never guess which library was called first and how much virtual
  memory it consumed.
* external memory can be registered at any time in the application run
  time.

In order not to break the existing secondary process design, this patch
only limits the max number of tries that will be done with the
address hint.
When the number of tries exceeds the threshold the code
will use the suggested address from kernel.

Fixes: 1df21702873d ("mem: use address hint for mapping hugepages")
Cc: stable@dpdk.org

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Tested-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Alejandro Lucero <alejandro.lucero@netronome.com>
2019-04-03 19:10:47 +02:00
Stephen Hemminger
c0c055f5f7 ring: fix an error message
Log message should end with newline.

Fixes: 4e32101f9b01 ("ring: support freeing")

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Rami Rosen <ramirose@gmail.com>
2019-04-03 18:39:16 +02:00
Stephen Hemminger
d0885cb781 eal: align hexdump output
This fixes the issue where if the length of the output is not
a multiple of 16 the formatting was off.

Before:
00000000: 45 00 00 1C 12 34 2C E0 40 06 B8 2E C0 A8 01 12 | E....4,.@.......
00000010: C0 A8 01 37 |  |  |  |  |  |  |  |  |  |  |  |  | ...7

After:
00000000: 45 00 00 1C 12 34 2C E0 40 06 B8 2E C0 A8 01 12 | E....4,.@.......
00000010: C0 A8 01 37                                     | ...7

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2019-04-03 18:34:59 +02:00
Stephen Hemminger
779d9d0986 eal: clean formatting of hexdump functions
The hexdump code obviously came from somewhere else originally.
It is not formatted according to DPDK coding style.

Also, drop the comment which is not useful the docbock comment
is already in the rte_hexdump.h

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2019-04-03 18:32:42 +02:00
Stephen Hemminger
6d96b48af8 eal: make u64 reciprocal divisor const
The divisor is not modified here. Doesn't really matter for optimizaton
since the function is inline already; but helps with expressing
intent.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2019-04-03 18:32:41 +02:00
Anand Rawat
196c650b8b doc: add guide for Windows
Added documentation to build helloworld example
on Windows using meson and clang.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Tested-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
2019-04-03 01:21:31 +02:00
Anand Rawat
fa647c5722 build: add workarounds for Windows helloworld
Added meson workarounds to build helloworld on Windows.
Windows currently only supports kvargs and eal libraries.
This change restricts the build flow to supported libraries
only.

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
2019-04-03 01:21:31 +02:00
Anand Rawat
53ffd9f080 eal/windows: add minimum viable code
Add Windows specific logic for eal.c, eal_lcore.c,
eal_debug.c and eal_thread.c. Updated header files to
contain suitable function declarations.

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
2019-04-03 01:21:31 +02:00
Anand Rawat
4dc2b4d2a4 eal/windows: add headers for compatibility
Added headers to support Windows environment for common source.
These headers will have Windows specific implementions of the
system library APIs provided in Linux and FreeBSD.

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
2019-04-03 01:21:31 +02:00
Anand Rawat
846ff907ee eal/windows: add sys/queue.h implementation copy
Adding sys/queue.h on Windows for supporting common code.
This implementation has BSD-3-Clause licensing.

Signed-off-by: Ranjit Menon <ranjit.menon@intel.com>
Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
2019-04-03 01:21:31 +02:00
Anand Rawat
82ba4416dd build: add module definition files for Windows
Updated lib/meson.build to create shared libraries on Windows.
Added DEF files to list the exports for the eal and kvargs libraries.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
2019-04-03 01:21:31 +02:00
Anand Rawat
58836e93f5 eal/windows: add wrappers for string functions
Updated rte_common.h to include rte_os.h to contain
OS specific macros and functions. Updated rte_string_fns.h
to include rte_common.h for rte_os.h

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
2019-04-03 01:21:15 +02:00
Anand Rawat
428eb983f5 eal: add OS specific header file
Added rte_os.h files to support OS specific functionality.
Updated build system to contain OS headers in the include
path.

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-04-03 01:11:56 +02:00
Anand Rawat
98edcbb5ab eal/windows: introduce Windows support
Added initial stub source files and required meson changes
for Windows support.

kernel/windows/meson is a stub file added to support
Windows specific source in future releases.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
2019-04-03 01:06:01 +02:00