Commit Graph

444 Commits

Author SHA1 Message Date
Shreyansh Jain
d00fa50779 config: increase max lcore to 16 for DPAA
With this change, DPAA and DPAA2 configuration compiled applications
are interoperable without any impact on the functional behavior.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-05-14 12:47:30 +02:00
Bruce Richardson
9009d00746 build: fix check for libbsd in meson
When we check for libbsd we were just checking for the library itself.
However, on some distros, e.g. CentOS, libbsd will be found even though
it's not usable by DPDK as it's missing the string header. Therefore we
should check for both the library and the header file.

Fixes: 5364de644a ("eal: support strlcpy function")

Signed-off-by: Bruce Richarson <bruce.richardson@intel.com>
Reported-by: Vladimir Medvedkin <medvedkinv@gmail.com>
Acked-by: Vladimir Medvedkin <medvedkinv@gmail.com>
Acked-by: Luca Boccassi <bluca@debian.org>
2018-05-08 22:21:56 +02:00
Konstantin Ananyev
5dba93ae5f bpf: add ability to load eBPF program from ELF object file
Introduce rte_bpf_elf_load() function to provide ability to
load eBPF program from ELF object file.
It also adds dependency on libelf.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-05-12 00:35:20 +02:00
Konstantin Ananyev
94972f35a0 bpf: add BPF loading and execution framework
librte_bpf provides a framework to load and execute eBPF bytecode
inside user-space dpdk based applications.
It supports basic set of features from eBPF spec
(https://www.kernel.org/doc/Documentation/networking/filter.txt).

Not currently supported features:
 - JIT
 - cBPF
 - tail-pointer call
 - eBPF MAP
 - skb
 - function calls for 32-bit apps
 - mbuf pointer as input parameter for 32-bit apps

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-05-12 00:35:15 +02:00
Rosen Xu
ef1e8ede3d raw/ifpga: add Intel FPGA bus rawdev driver
Add Intel FPGA BUS Rawdev Driver which is based on
librte_rawdev library.

Signed-off-by: Rosen Xu <rosen.xu@intel.com>
Signed-off-by: Yanglong Wu <yanglong.wu@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
2018-05-11 17:09:26 +02:00
Rosen Xu
05fa3d4a65 bus/ifpga: add Intel FPGA bus library
Defined FPGA-BUS for Acceleration Drivers of AFUs

1. FPGA PCI Scan (1st Scan) follows DPDK UIO/VFIO PCI Scan Process,
probe Intel FPGA Rawdev Driver, it will be covered in following patches.

2. AFU Scan(2nd Scan) bind DPDK driver to FPGA Partial-Bitstream.
This scan is trigged by hotplug of IFPGA Rawdev probe, in this scan
the AFUs will be created and their drivers are also probed.

This patch will introduce rte_afu_device which describe the AFU device
listed in the FPGA-BUS.

Signed-off-by: Rosen Xu <rosen.xu@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
2018-05-11 17:08:32 +02:00
Ravi Kumar
e0d88a394e crypto/ccp: support run-time CPU based auth
CCP PMD supports authentication offload to either of CCP or CPU.
The earlier version of patch provides this option as compile time.
This patch changes this option from compile time to run time.
User can pass "ccp_auth_opt=1" as an additional arguments to vdev
parameter to enable authentication operations on CPU.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
2018-05-10 17:46:20 +01:00
Lee Daly
3c32e89f68 compress/isal: add skeleton ISA-L compression PMD
Adding basic skeleton of the ISA-L compression driver.
No compression functionality, but lays the foundation for
operations in the rest of the patchset.

The ISA-L compression driver utilizes Intel's ISA-L compression
library and compressdev API.

Signed-off-by: Lee Daly <lee.daly@intel.com>
Reviewed-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-05-10 17:46:20 +01:00
Kamil Chalupnik
864edd6935 bbdev: measure offload cost
New test created to measure offload cost.
Changes were introduced in API, turbo software driver
and test application

Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
2018-05-10 17:46:20 +01:00
Pablo de Lara
b06aa643ca test/compress: add initial unit tests
This commit introduces the initial tests for compressdev,
performing basic compression and decompression operations
of sample test buffers, using the Zlib library in one direction
and compressdev in another direction, to make sure that
the library is compatible with Zlib.

Due to the use of Zlib API, the test is disabled by default,
to avoid adding a new dependency on DPDK.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Lee Daly <lee.daly@intel.com>
2018-05-10 17:46:20 +01:00
Fiona Trahe
ed7dd94f7f compressdev: add basic device management
Add basic functions to manage compress devices,
including driver and device allocation, and the basic
interface with compressdev PMDs.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-05-10 17:46:19 +01:00
Tomasz Duszynski
e95faac151 crypto/mrvl: rename PMD to mvsam
Picking a company stock ticker for a PMD name might not be a best approach
in a long run since name is too generic.

This patch addresses that and renames mrvl to mvsam.

Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2018-05-10 17:46:19 +01:00
Abhinandan Gujjar
7901eac340 eventdev: add crypto adapter implementation
This patch adds common code for the crypto adapter to support
SW and HW based transfer mechanisms. The adapter uses an EAL
service core function for SW based packet transfer and uses
the eventdev PMD functions to configure HW based packet
transfer between the crypto device and the event device.
This patch also adds adapter to the meson build system &
updates the necessary makefile & map file.

Signed-off-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Signed-off-by: Gage Eads <gage.eads@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-05-10 14:08:46 +02:00
Nipun Gupta
3298fa4853 raw/dpaa2_cmdif: introduce DPAA2 command interface driver
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-05-08 14:20:39 +02:00
Nipun Gupta
b1ee472fed raw/dpaa2_qdma: introduce the DPAA2 QDMA driver
DPAA2 QDMA driver uses MC DPDMAI object. This driver enables
the user (app) to perform data DMA without involving CPU in
the DMA process

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-05-08 12:20:53 +02:00
Pablo de Lara
7bd0994f01 net/ixgbe: enable vector PMD for icc 32 bits
IXGBE vector PMD was re-enabled for 32 bits, but only for gcc.
This commit enables it for icc too.

Fixes: e6672d2f0f ("net/ixgbe: enable ixgbe vector PMD for i686")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-04-27 15:54:56 +01:00
Xiao Wang
a3f8150eac net/ifcvf: add ifcvf vDPA driver
The IFCVF vDPA (vhost data path acceleration) driver provides support for
the Intel FPGA 100G VF (IFCVF). IFCVF's datapath is virtio ring compatible,
it works as a HW vhost backend which can send/receive packets to/from
virtio directly by DMA.

Different VF devices serve different virtio frontends which are in
different VMs, so each VF needs to have its own DMA address translation
service. During the driver probe a new container is created, with this
container vDPA driver can program DMA remapping table with the VM's memory
region information.

Key vDPA driver ops implemented:

- ifcvf_dev_config:
  Enable VF data path with virtio information provided by vhost lib,
  including IOMMU programming to enable VF DMA to VM's memory, VFIO
  interrupt setup to route HW interrupt to virtio driver, create notify
  relay thread to translate virtio driver's kick to a MMIO write onto HW,
  HW queues configuration.

- ifcvf_dev_close:
  Revoke all the setup in ifcvf_dev_config.

Live migration feature is supported by IFCVF and this driver enables
it. For the dirty page logging, VF helps to log for packet buffer write,
driver helps to make the used ring as dirty when device stops.

Because vDPA driver needs to set up MSI-X vector to interrupt the
guest, only vfio-pci is supported currently.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Signed-off-by: Rosen Xu <rosen.xu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-04-27 15:54:55 +01:00
Xiao Wang
340b7bb8d5 vfio: extend data structure for multi container
Currently eal vfio framework binds vfio group fd to the default
container fd during rte_vfio_setup_device, while in some cases,
e.g. vDPA (vhost data path acceleration), we want to put vfio group
to a separate container and program IOMMU via this container.

This patch extends the vfio_config structure to contain per-container
user_mem_maps and defines an array of vfio_config. The next patch will
base on this to add container API.

Signed-off-by: Junjie Chen <junjie.j.chen@intel.com>
Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2018-04-27 15:54:55 +01:00
Artem V. Andreev
4ed00862c8 mempool/bucket: implement bucket mempool manager
The manager provides a way to allocate physically and virtually
contiguous set of objects.

Signed-off-by: Artem V. Andreev <artem.andreev@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2018-04-26 23:34:07 +02:00
Hemant Agrawal
f163231e7d crypto/dpaa_sec: support dynamic logging
This patch adds the support for dynamic logging in dpaa_sec.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-04-23 18:20:10 +01:00
Jay Zhou
8769079ae0 crypto/virtio: add virtio crypto PMD
The virtio crypto device is a virtual cryptography device
as well as a kind of virtual hardware accelerator for
virtual machines. The linux kernel virtio-crypto driver
has been merged, and this patch introduces virtio crypto
PMD to achieve better performance.

Signed-off-by: Jay Zhou <jianjay.zhou@huawei.com>
Reviewed-by: Fan Zhang <roy.fan.zhang@intel.com>
2018-04-23 18:20:10 +01:00
Ravi Kumar
6c561b03b5 crypto/ccp: support CPU based MD5 and SHA2 family
Auth operations can be performed on CPU without offloading
to CCP if CONFIG_RTE_LIBRTE_PMD_CCP_CPU_AUTH is enabled in
DPDK configuration. CCP PMD skip offloading auth operations
to hardware engines and perform them using openssl APIs.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
2018-04-23 18:20:09 +01:00
Ravi Kumar
0054d84f6e crypto/ccp: add AMD ccp skeleton PMD
Added DPDK crypto PMD for AMD Cryptographic Co-Processors.
This patch adds a basic skeleton for PMD.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
2018-04-23 18:19:43 +01:00
Jerin Jacob
e6084f3625 build: fix default arm64 instruction level
The make based build system has crc+crypto instruction
support for the default arm64 build.
http://dpdk.org/browse/dpdk/tree/mk/machine/armv8a/rte.vars.mk#n31

This patch fixes the disparity with meson build flags for armv8.
As a bonus, This patch fixes the following errors with
ip_pipeline example application.

Assembler messages:
Error: selected processor does not support `crc32cx w3,w3,x0'

Fixes: c6e536e384 ("build: add more implementers IDs and PNs for ARM")

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Tested-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-04-17 16:40:09 +02:00
Bruce Richardson
40db28c187 rawdev: add to meson build
Add librte_rawdev to the meson build of DPDK.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-04-17 16:40:09 +02:00
Pavan Nikhilesh
afd18fa21b build: set toolchain info during meson configure
Meson reports the toolchain using cc.get_id and we can set RTE_TOOLCHAIN,
RTE_TOOLCHAIN_X in dpdk_conf so that it can be used by both x86 and arm.

Suggested-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2018-04-17 16:09:43 +02:00
Erik Gabriel Carrillo
47d05b2928 eventdev: add timer adapter common code
This commit adds the logic that is shared by all event timer adapter
drivers; the common code handles instance allocation and some
initialization.

Signed-off-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
2018-04-16 11:04:46 +02:00
Scott Branden
df16bcc9d2 net/bnxt: introduce Broadcom Stingray
Add support for Stingray PF devices ids:
BCM58802 = 0xd802
BCM58804 = 0xd804
BCM58808 = 0x16f0

Add Broadcom Stingray machine support based on armv8.

For product brief see:
https://www.broadcom.com/products/ethernet-connectivity/controllers/bcm58800

Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2018-04-14 00:59:41 +02:00
Matej Vido
a5e1231f09 net/szedata2: do not affect Ethernet interfaces
NFB cards employ multiple Ethernet ports.
Until now, Ethernet port-related operations were performed on all of them
(since the whole card was represented as a single port).
With new NFB-200G2QL card, this is no longer viable.

Since there is no fixed mapping between the queues and Ethernet ports,
and since a single card can be represented as two ports in DPDK,
there is no way of telling which (if any) physical ports should be
associated with individual ports in DPDK.

This is also described in documentation in more detail.

Signed-off-by: Matej Vido <vido@cesnet.cz>
Signed-off-by: Jan Remes <remes@netcope.com>
2018-04-14 00:43:30 +02:00
Ravi Kumar
8691632f92 net/axgbe: add minimal init and uninit support
Add ethernet poll mode driver for AMD 10G devices embedded in
AMD EPYC™ EMBEDDED 3000 family processors.

Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
2018-04-14 00:41:44 +02:00
Anatoly Burakov
66cc45e293 mem: replace memseg with memseg lists
Before, we were aggregating multiple pages into one memseg, so the
number of memsegs was small. Now, each page gets its own memseg,
so the list of memsegs is huge. To accommodate the new memseg list
size and to keep the under-the-hood workings sane, the memseg list
is now not just a single list, but multiple lists. To be precise,
each hugepage size available on the system gets one or more memseg
lists, per socket.

In order to support dynamic memory allocation, we reserve all
memory in advance (unless we're in 32-bit legacy mode, in which
case we do not preallocate memory). As in, we do an anonymous
mmap() of the entire maximum size of memory per hugepage size, per
socket (which is limited to either RTE_MAX_MEMSEG_PER_TYPE pages or
RTE_MAX_MEM_MB_PER_TYPE megabytes worth of memory, whichever is the
smaller one), split over multiple lists (which are limited to
either RTE_MAX_MEMSEG_PER_LIST memsegs or RTE_MAX_MEM_MB_PER_LIST
megabytes per list, whichever is the smaller one). There is also
a global limit of CONFIG_RTE_MAX_MEM_MB megabytes, which is mainly
used for 32-bit targets to limit amounts of preallocated memory,
but can be used to place an upper limit on total amount of VA
memory that can be allocated by DPDK application.

So, for each hugepage size, we get (by default) up to 128G worth
of memory, per socket, split into chunks of up to 32G in size.
The address space is claimed at the start, in eal_common_memory.c.
The actual page allocation code is in eal_memalloc.c (Linux-only),
and largely consists of copied EAL memory init code.

Pages in the list are also indexed by address. That is, in order
to figure out where the page belongs, one can simply look at base
address for a memseg list. Similarly, figuring out IOVA address
of a memzone is a matter of finding the right memseg list, getting
offset and dividing by page size to get the appropriate memseg.

This commit also removes rte_eal_dump_physmem_layout() call,
according to deprecation notice [1], and removes that deprecation
notice as well.

On 32-bit targets due to limited VA space, DPDK will no longer
spread memory to different sockets like before. Instead, it will
(by default) allocate all of the memory on socket where master
lcore is. To override this behavior, --socket-mem must be used.

The rest of the changes are really ripple effects from the memseg
change - heap changes, compile fixes, and rewrites to support
fbarray-backed memseg lists. Due to earlier switch to _walk()
functions, most of the changes are simple fixes, however some
of the _walk() calls were switched to memseg list walk, where
it made sense to do so.

Additionally, we are also switching locks from flock() to fcntl().
Down the line, we will be introducing single-file segments option,
and we cannot use flock() locks to lock parts of the file. Therefore,
we will use fcntl() locks for legacy mem as well, in case someone is
unfortunate enough to accidentally start legacy mem primary process
alongside an already working non-legacy mem-based primary process.

[1] http://dpdk.org/dev/patchwork/patch/34002/

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Tested-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Tested-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
2018-04-11 19:55:39 +02:00
Jan Viktorin
27d8b82635 use SPDX tag for RehiveTech copyright files
Replace the BSD license header with the SPDX tag for files
with only an RehiveTech copyright on them.

Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-04-11 01:47:43 +02:00
Bruce Richardson
5364de644a eal: support strlcpy function
The strncpy function is error prone for doing "safe" string copies, so
we generally try to use "snprintf" instead in the code. The function
"strlcpy" is a better alternative, since it better conveys the
intention of the programmer, and doesn't suffer from the non-null
terminating behaviour of it's n'ed brethern.

The downside of this function is that it is not available by default
on linux, though standard in the BSD's. It is available on most
distros by installing "libbsd" package.

This patch therefore provides the following in rte_string_fns.h to ensure
that strlcpy is available there:
* for BSD, include string.h as normal
* if RTE_USE_LIBBSD is set, include <bsd/string.h>
* if not set, fallback to snprintf for strlcpy

Using make build system, the RTE_USE_LIBBSD is a hard-coded value to "n",
but when using meson, it's automatically set based on what is available
on the platform.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Stephen Hemminger <stephen@networkplumber.org>
2018-04-04 17:33:08 +02:00
Stephen Hemminger
aded107a74 config: remove old log level option
The old RTE_LOG_LEVEL has been replaced by RTE_DP_LOG_LEVEL and
is not used anywhere in the current source tree.

It is a merge leftover.

Fixes: 43e9f17ce7 ("log: remove log level config option")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2018-04-04 13:43:33 +02:00
Thomas Monjalon
5d3cd28b4d config: remove useless lines for DPAA2
Some comments are not relevant in a config which only overrides
the default config.

The option CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER is already disabled
by default so it can be removed from this file.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-04-04 00:03:25 +02:00
Shreyansh Jain
5644a1f692 crypto/dpaa2_sec: support dynamic logging
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-04-03 00:05:07 +02:00
Shreyansh Jain
a10a988a0b net/dpaa2: support dynamic logging
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-04-02 23:42:15 +02:00
Natalie Samsonov
fe93968722 net/mrvl: rename PMD as mvpp2
The name "mrvl" for Marvell PMD driver for PPv2 Marvell PPv2
(Packet Processor v2) 1/10 Gbps adapter is too generic and causes
problem for adding new PMD drivers for other Marvell devices.
Changed to "mvpp2" for specific Marvell PPv2 PMD.

This patch doesn't introduce any change except renaming.

Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-03-30 14:08:44 +02:00
Hemant Agrawal
0011df0af2 build: add meson cross-compilation config for dpaaX
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-03-15 18:01:01 +01:00
Hemant Agrawal
6ec78c2463 build: add meson support for dpaaX platforms
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-03-15 17:50:02 +01:00
Hemant Agrawal
3d7ca4e1b0 config: add dpaaX build for all Linux platforms
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-03-15 17:44:16 +01:00
Herbert Guan
c6e536e384 build: add more implementers IDs and PNs for ARM
1) Add native PN option '-march=native' to allow automatic detection.
   Set 'arm_force_native_march' to 'true' in config/arm/meson.build
   to use native PN option.
2) Add implementer_pn option for part num selection in cross compile
3) Add known Arm cortex PN support
4) Add known implementers' IDs (use generic flags/archs by default)
5) Sync build options with config/common_armv8a_linuxapp

Signed-off-by: Herbert Guan <herbert.guan@arm.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
2018-02-06 14:44:31 +01:00
Bruce Richardson
e67a1a5e35 config: replace Intel license headers with SPDX tags
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2018-02-01 02:39:40 +01:00
Adrien Mazarguil
59b91bec12 net/mlx5: spawn rdma-core dependency plug-in
When mlx5 is not compiled directly as an independent shared object (e.g.
CONFIG_RTE_BUILD_SHARED_LIB not enabled for performance reasons), DPDK
applications inherit its dependencies on libibverbs and libmlx5 through
rte.app.mk.

This is an issue both when DPDK is delivered as a binary package (Linux
distributions) and for end users because rdma-core then propagates as a
mandatory dependency for everything.

Application writers relying on binary DPDK packages are not necessarily
aware of this fact and may end up delivering packages with broken
dependencies.

This patch therefore introduces an intermediate internal plug-in
hard-linked with rdma-core (to preserve symbol versioning) loaded by the
PMD through dlopen(), so that a missing rdma-core does not cause unresolved
symbols, allowing applications to start normally.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-01-31 20:57:29 +01:00
Adrien Mazarguil
27cea11686 net/mlx4: spawn rdma-core dependency plug-in
When mlx4 is not compiled directly as an independent shared object (e.g.
CONFIG_RTE_BUILD_SHARED_LIB not enabled for performance reasons), DPDK
applications inherit its dependencies on libibverbs and libmlx4 through
rte.app.mk.

This is an issue both when DPDK is delivered as a binary package (Linux
distributions) and for end users because rdma-core then propagates as a
mandatory dependency for everything.

Application writers relying on binary DPDK packages are not necessarily
aware of this fact and may end up delivering packages with broken
dependencies.

This patch therefore introduces an intermediate internal plug-in
hard-linked with rdma-core (to preserve symbol versioning) loaded by the
PMD through dlopen(), so that a missing rdma-core does not cause unresolved
symbols, allowing applications to start normally.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-01-31 20:57:29 +01:00
Shreyansh Jain
61c592a8d0 raw/skeleton: introduce skeleton rawdev driver
Skeleton rawdevice driver, on the lines of eventdev skeleton, is for
showcasing the rawdev library. This driver implements some of the
operations of the library based on which a test module can be
developed.

Design of skeleton involves a virtual device which is plugged into
VDEV bus on initialization.

Also, enable compilation of rawdev skeleton driver.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-01-31 15:36:02 +01:00
Shreyansh Jain
c88b3f2558 rawdev: introduce raw device library
Each device in DPDK has a type associated with it - ethernet, crypto,
event etc. This patch introduces 'rawdevice' which is a generic
type of device, not currently handled out-of-the-box by DPDK.

A device which can be scanned on an installed bus (pci, fslmc, ...)
or instantiated through devargs, can be interfaced using
standardized APIs just like other standardized devices.

This library introduces an API set which can be plugged on the
northbound side to the application layer, and on the southbound side
to the driver layer.

The APIs of rawdev library exposes some generic operations which can
enable configuration and I/O with the raw devices. Using opaque
data (pointer) as API arguments, library allows a high flexibility
for application and driver implementation.

This patch introduces basic device operations like start, stop, reset,
queue and info support.
Subsequent patches would introduce other operations like buffer
enqueue/dequeue and firmware support.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-01-31 15:35:01 +01:00
Harry van Haaren
510ac6f4f0 event/sw: support dynamic logging
This commit enables dynamic logging with the SW pmd.
The string "pmd.event.sw" is used to change the verbosity
of the logging output, as per the newly defined log naming.

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
2018-01-31 10:11:48 +01:00
Hemant Agrawal
d90e365210 config: reduce DPAA2 mbuf headroom size to 128
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-01-31 01:36:43 +01:00
Pavan Nikhilesh
e53a5299d2 build: support vendor specific ARM cross builds
Add various vendor specific cross build targets.
This can be verified by using linaro toolchain and running

   meson build --cross-file config/arm/arm64_<cpu>_<platform>_<compiler>

In future more cross build targets can be added.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2018-01-30 21:59:00 +01:00