Commit Graph

19096 Commits

Author SHA1 Message Date
Ivan Ilchenko
3e09529f97 pdump: check status of getting ethdev info
rte_eth_dev_info_get() return value was changed from void to int,
so this patch modify rte_eth_dev_info_get() usage across
pdump component according to its new return type.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 14:45:35 +02:00
Ivan Ilchenko
d00a52acf9 latency: check status of getting ethdev info
rte_eth_dev_info_get() return value was changed from void to
int, so this patch modify rte_eth_dev_info_get() usage across
latency component according to its new return type.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 14:45:35 +02:00
Ivan Ilchenko
4f25d7d225 ethdev: add return code to device info get function
Change rte_eth_dev_info_get() return value from void to int and return
negative errno values in case of error conditions.
Modify rte_eth_dev_info_get() usage across the ethdev according
to new return type.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 14:43:50 +02:00
Andrew Rybchenko
78402e16ec ethdev: remove redundant device info cleanup before get
rte_eth_dev_info_get() always fills in device information memory
with zeros on entry.

Fixes: b671987985 ("ethdev: avoid getting uninitialized info for bad port")
Cc: stable@dpdk.org

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-09-20 10:19:42 +02:00
Shahed Shaikh
2c0784eb88 net/qede: implement flow drop action
Add support to configure drop action in rte_flow
infrastructure and add counter for dropped
packets due to this filter action "rx_gft_filter_drop".

Also, update supported flows and actions in qede guide.

Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
2019-09-20 10:19:41 +02:00
Shahed Shaikh
0aa3e7b925 net/qede: fix stats flow as per new allocation method
As per new method, need to consider hw stats of queues from
both engines. This patch fixes the stats collection flow accordingly.

Fixes: 2af14ca79c ("net/qede: support 100G")
Cc: stable@dpdk.org

Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
2019-09-20 10:19:41 +02:00
Shahed Shaikh
235cbe4c22 net/qede: fix RSS configuration as per new allocation method
With old design, RETA was configured in round-robin fashion since
queue allocation was distributed across both engines alternately.
Now, we need to configure RETA symmetrically on both engines since
both engines have same number of queues.

Fixes: 2af14ca79c ("net/qede: support 100G")
Cc: stable@dpdk.org

Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
2019-09-20 10:19:41 +02:00
Shahed Shaikh
8de0c42019 net/qede: fix odd number of queues usage in 100G mode
As per HW design of 100Gb mode, device internally uses 2 engines
(eng0 and eng1), and both engines need to be configured symmetrically.
Based on this requirement, driver design chose an approach
to allow user to allocate only even number of queues and split
those queues on both engines equally.

This approach puts a limitation on number of queues to be allocated -
i.e. user can't configure odd number of queues on 100Gb mode.
OVS configures DPDK port with 1 rxq and 1 txq, which causes initialization
of qede port to fail.

Issue is fixed by changing the implementation of queue allocation and
assignment to hw engines only for 100Gb devices and allowing user to
configure odd number queues.

New approach works as below -
- Create 'struct qede_fastpath_cmt' to hold hw queue pair of both engines
  and provide it to rte_ethdev's Rx/Tx queues structure.
- So ethdev will see only one queue for underlying queue pair created for
  hw engine pair.
- Install separate Rx/Tx data path handlers for 100Gb mode and regular mode
- Rx/Tx handlers for 100Gb mode will split packet processing across both
  engines by providing hw queue structures from 'struct qede_fastpath_cmt'
  passed by Rx/Tx callbacks to respective engines.

Fixes: 2af14ca79c ("net/qede: support 100G")
Cc: stable@dpdk.org

Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
2019-09-20 10:19:41 +02:00
Shahed Shaikh
642f25da9c net/qede: refactor Rx and Tx queue setup
This patch refactors Rx and Tx queue setup flow required to allow
odd number of queues to be configured in next patch.

This is the first patch of the series required to fix an issue
where qede port initialization in ovs-dpdk fails due to 1 Rx/Tx queue
configuration. Detailed explanation is given in next patch.

Fixes: 2af14ca79c ("net/qede: support 100G")
Cc: stable@dpdk.org

Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
2019-09-20 10:19:41 +02:00
Phil Yang
94a24aaf6c net/mlx5: fix Rx CQ doorbell synchronization on aarch64
The Rx completion queue doorbell field needs to be updated after
the last CQE decompressed. For the weaker memory model processors,
the compiler barrier is not sufficient to guarantee the order of
these operations, so use the coherent I/O memory barrier to make
sure these fields are updated in order.

Fixes: 570acdb1da ("net/mlx5: add vectorized Rx/Tx burst for ARM")
Cc: stable@dpdk.org

Suggested-by: Gavin Hu <gavin.hu@arm.com>
Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-09-20 10:19:41 +02:00
Dekel Peled
b67b4ecbde net/mlx5: skip table zero to improve insertion rate
E-switch tables one and above provide higher insertion rate
than table zero, as well as enhanced functionality.

This patch adds a mechanism to utilize these advantages, by creating
a default rule on port start, which directs all packets from e-switch
table zero to table one.
Other flow rules, requested for group n, will be created in
e-switch table n+1.
Jump action to e-switch group n will be created to group n+1.

Utility function mlx5_flow_group_to_table() is added to translate the
rte_flow group value to HW table value, and is called by PMD flow
engine on flow rule validation and creation.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Eelco Chaudron
9763595925 net/i40e: downgrade error log
When receiving the unsupported AQ messages, it's taken as an
error. It's not appropriate and triggers too much unnecessary print.

This commit is similar to
commit e130425300 ("net/i40e: downgrade unnecessary error log")
which made the same change for the PF instance.

Fixes: ae19955e7c ("i40evf: support reporting PF reset")
Cc: stable@dpdk.org

Signed-off-by: Eelco Chaudron <echaudro@redhat.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-09-20 10:19:41 +02:00
Xiao Zhang
d6956e9239 net/e1000: fix memory barrier usage in Tx
Use rte_cio_wmb instead of rte_wmb when writing TX descriptor since it's
CIO memory.
Replace rte_io_wmb and E1000_PCI_REG_WRITE_RELAXED with
E1000_PCI_REG_WRITE since it has rte_io_wmb inside, which will be more
clear.

Fixes: 1fc9701238 ("net/e1000: fix i219 hang on reset/close")
Cc: stable@dpdk.org

Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-09-20 10:19:41 +02:00
Xiao Zhang
675f65dc66 net/e1000: fix MAC type checking
The mac types of i219 are e1000_pch_spt and e1000_pch_cnp, correct the
checking code of mac type when flushing i219 descriptor rings.

Fixes: 1fc9701238 ("net/e1000: fix i219 hang on reset/close")
Cc: stable@dpdk.org

Reported-by: Kevin Traynor <ktraynor@redhat.com>
Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-09-20 10:19:41 +02:00
Viacheslav Ovsiienko
c9333f457e net/mlx5: fix netlink RDMA socket callback routine
The mlx5 PMD uses Netlink socket to communicate with Infiniband
devices kernel drivers to perform some control and setup operations.
The kernel drivers send the information back to the user mode
with Netlink messages which are processed in libnl callback routine.
This routine perform reply message (or set of messages) processing
and returned the processing result in ibindex field of provided
context structure (of mlx5_nl_ifindex_data type). The zero ibindex
value meant an error of reply message processing. It was found in
some configurations the zero is valid value for ibindex and error
was wrongly raised. To avoid this the new flags field is provided
in context structure, attribute processing flags are introduced
and these flags are used to decide whether no error occurred and
valid queried values are returned.

Fixes: e505508a38 ("net/mlx5: modify get ifindex routine for multiport IB")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Dekel Peled
8a6a09f853 net/mlx5: support reading module EEPROM data
This patch implements ethdev operations get_module_info and
get_module_eeprom, to support ethtool commands ETHTOOL_GMODULEINFO
and ETHTOOL_GMODULEEEPROM.

New functions mlx5_get_module_info() and mlx5_get_module_eeprom()
added in mlx5_ethdev.c.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Moti Haimovsky
5f163d520c net/mlx5: support modify VLAN ID on existing VLAN header
This commit adds support for modifying the VID of the outermost VLAN
header already present in the packet.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Moti Haimovsky
a5f2da0b81 net/mlx5: support modify VLAN ID on new VLAN header
This commit adds support for modifying the VLAN ID (VID) field
in an about-to-be-pushed VLAN header.
This feature can only modify the VID field of a new VLAN header yet
to be pushed. It does not support modifying an existing or already
pushed VLAN headers.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Moti Haimovsky
68fad36350 net/mlx5: support modifying VLAN priority on VLAN header
This commit adds support for modifying the VLAN priority (PCP) field
in about-to-be-pushed VLAN header.
This feature can only modify the PCP field of a new VLAN header yet
to be pushed. It does not support modifying an existing or already
pushed VLAN headers.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Moti Haimovsky
9aee7a8418 net/mlx5: support push flow action on VLAN header
This commit adds support for RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN using
direct verbs flow rules.
If present in the flow, The VLAN default values are taken from the
VLAN item configuration.
In this commit only the VLAN TPID value can be set since VLAN
modification actions are not supported yet.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Moti Haimovsky
b41e47da25 net/mlx5: support pop flow action on VLAN header
This commit adds support for RTE_FLOW_ACTION_TYPE_OF_POP_VLAN via
direct verbs flow rules.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Moti Haimovsky
400d985eb5 net/mlx5: add VLAN push/pop DR commands to glue
This commit adds the mlx5dv VLAN push and pop commands to mlx5_glue
interface.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Moti Haimovsky
e4fcdcd6f7 net/mlx5: support flow action search in a list
This commit adds a helper routine that supports searching for a
specific action in a list of actions.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-09-20 10:19:41 +02:00
Viacheslav Ovsiienko
7fd9ffe950 net/mlx5: fix Tx descriptor with VLAN insertions
If VLAN tag insertion transmit offload is engaged
(DEV_TX_OFFLOAD_VLAN_INSERT in tx queue configuration is set)
the transmit descriptor may be built with wrong format, due to
packet length is not adjusted. Also, the ring buffer wrap up
is not handled correctly.

Fixes: 18a1c20044 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-09-20 10:19:41 +02:00
Akhil Goyal
b0f66a68ca event/dpaa: support crypto adapter
event dpaa device support both ethernet as well as
crypto queues to be attached to it. eth_rx_adapter
provide infrastructure to attach ethernet queues and
crypto_adapter provide support for crypto queues.

This patch add support for dpaa_eventdev to attach
dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 13:14:19 +02:00
Akhil Goyal
fe3688ba79 crypto/dpaa_sec: support event crypto adapter
dpaa_sec hw queues can be attached to a hw dpaa event
device and the application can configure the event
crypto adapter to access the dpaa_sec packets using
hardware events.
This patch defines APIs which can be used by the
dpaa event device to attach/detach dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 13:14:18 +02:00
Anoob Joseph
98c7b9c97e crypto/octeontx: fix global log variable definition
'cpt_logtype' & 'otx_cryptodev_driver_id' global variables are defined
in a header file which was causing multiple definitions of the
variables. Fixed it by moving the required vars to the .c file and
introducing a new macro so the CPT_LOG macros in common/cpt would use
the associated PMD log var.

Issue has been detected by '-fno-common' gcc flag.

Fixes: bfe2ae495e ("crypto/octeontx: add PMD skeleton")
Cc: stable@dpdk.org

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Reported-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-09 11:50:12 +02:00
Xiao Wang
933f42eac9 crypto/virtio: allocate private data by NUMA affinity
It's better to allocate device private data on the same NUMA node with
device, rather than with the main thread. This helps avoid cross-NUMA
access for worker thread.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Reviewed-by: Jay Zhou <jianjay.zhou@huawei.com>
2019-10-09 11:50:12 +02:00
Bruce Richardson
407ca9a72d app/bbdev: enable fpga_lte_fec support in shared builds
Now that the necessary function is exported from the fpga_lte_fec driver,
we can enable the code paths using it in shared-library builds.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Nicolas Chautru <nicolas.chautru@intel.com>
2019-10-09 11:50:12 +02:00
Bruce Richardson
44f45300cb baseband/fpga_lte_fec: add public API to map file
To allow shared library builds of e.g. test-bbdev app, we need to export
the configure function. Since this needs to be exported as experimental by
default, we update the header file to add the experimental tag there too.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2019-10-09 11:50:12 +02:00
Bruce Richardson
fd05e96266 drivers/baseband: remove override of driver names
Now that all driver names follow a consistent pattern, remove the override
of the name in each driver which adds the prefix. Instead we can just add
the prefix at a higher level.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2019-10-09 11:50:12 +02:00
Bruce Richardson
6124ad4b86 baseband/fpga_lte_fec: align naming to other bbdevs
The fpga_lte_fec is the only bbdev driver that does not use bbdev in the
name, so modify it to keep consistency with the other bbdev drivers. This
will then allow later simplification due to all drivers using the same
basic naming format.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2019-10-09 11:50:12 +02:00
Bruce Richardson
a5fb66997f drivers/baseband: align meson defines with make
For baseband drivers, the macros used to indicate the presence of a
particular driver were subtly different from that used in make. The make
values hand "PMD" before the individual driver name, while in meson it came
afterwards. Update meson to put the "PMD" part first.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2019-10-09 11:50:12 +02:00
Adam Dybkowski
aa983f03ad crypto/qat: handle Single Pass Crypto Requests on GEN3
This patch improves the performance of AES GCM by using
the Single Pass Crypto Request functionality when running
on GEN3 QAT. Falls back to the classic 2-pass mode on older
hardware.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-09 11:50:12 +02:00
Adam Dybkowski
16b676019c common/qat: add GEN3 definitions
This patch adds few definitions specific to GEN3 QAT.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-09 11:50:12 +02:00
Adam Dybkowski
4d77dadd04 test/crypto: add more AES-GCM cases for QAT
This patch adds 256-bit AES GCM tests for QAT PMD
(which already existed for AESNI and OpenSSL) and also adds
a number of negative unit tests for AES GCM for QAT PMD, in order
to verify authenticated encryption and decryption with modified data.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-09 11:50:12 +02:00
Thierry Herbelot
310d2ea632 drivers/crypto: remove some invalid comments
A comment valid in AESNI PMD was copied and pasted in other code

Fixes: 8a61c83af2 ("crypto/mrvl: add mrvl crypto driver")
Fixes: 169ca3db55 ("crypto/armv8: add PMD optimized for ARMv8 processors")
Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")
Cc: stable@dpdk.org

Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Nagadheeraj Rottela
5adf37e676 test/crypto: add cases for Nitrox
Add aes chain test cases for Nitrox in-pace and
out-of-place operations.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Nagadheeraj Rottela
9282bdee5c crypto/nitrox: add cipher auth chain processing
Add cipher auth crypto chain processing functionality in symmetric
request manager. Update the release notes.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Nagadheeraj Rottela
1acffa3929 crypto/nitrox: add burst enqueue and dequeue ops
Add burst enqueue and dequeue operations along with interface for
symmetric request manager.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Nagadheeraj Rottela
cafd270356 crypto/nitrox: add session management
Add all the session management operations.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Nagadheeraj Rottela
32e4930d5a crypto/nitrox: add hardware queue management
Add hardware queue management code corresponding to
queue pair setup and release functions.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Nagadheeraj Rottela
3b1fa94a02 crypto/nitrox: add software queue management
Add software queue management code corresponding to
queue pair setup and release functions.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Nagadheeraj Rottela
9fdef0cc23 crypto/nitrox: create symmetric cryptodev
Add Nitrox symmetric cryptodev with following operations,
- dev_configure
- dev_start
- dev_stop
- dev_close
- dev_infos_get

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Nagadheeraj Rottela
0a8fc2423b crypto/nitrox: introduce Nitrox driver
Add bare minimum Nitrox PMD library which handles pci probe, remove and
hardware initialization. Add logs, documentation and update maintainers
file.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Hemant Agrawal
616853f9db app/crypto-perf: add check for out-of-place case
Segmented frames not supported for out-of-place case.
This patch returns err if such config is requested.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Ankur Dwivedi
131966f876 common/cpt: support new firmware
With the latest firmware, there are few changes for zuc and snow3g.

1. The iv_source is present in bitfield 7 of minor opcode. In the
old firmware this was present in bitfield 6.

2. Algorithm type is a 2 bit field in new firmware. In the old
firmware it was named as cipher type and it was a 1 bit field.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2019-10-09 11:50:12 +02:00
Julien Meunier
1a60db7f35 cryptodev: fix initialization on multi-process
Primary process is responsible to initialize the data struct of each
crypto devices.

Secondary process should not override this data during the
initialization.

Fixes: d11b0f30df ("cryptodev: introduce API and framework for crypto devices")
Cc: stable@dpdk.org

Signed-off-by: Julien Meunier <julien.meunier@nokia.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Hemant Agrawal
e2e60edbdb test/crypto: add negative cases for NXP drivers
Negative cases with wrong cipher/auth text added
to dpaa_sec and dpaa2_sec PMD test suites.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Hemant Agrawal
0f44e7b7aa test/crypto: change failure condition check
In some of the cases, the test is looking for a specific
failure returned from the CryptoDev. Not all cryptodev
support returning specific errors.
This patch changes such checks to NOT-SUCCESS

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00