Commit Graph

18081 Commits

Author SHA1 Message Date
Nicolas Chautru
432446b5f2 baseband/acc100: modify validation code for ACC101
The validation requirement is different for the two
devices.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Hernan Vargas <hernan.vargas@intel.com>
2022-06-21 20:04:49 +02:00
Nicolas Chautru
e466581254 baseband/acc100: introduce PMD for ACC101
Added support for ACC101 as a derivative of ACC100.
Integrated in unified driver and reusing existing code when possible.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 20:04:49 +02:00
Nicolas Chautru
7936b764ec baseband/acc100: remove RTE prefix for internal macros
Cosmetic update to remove RTE_ prefix for a define
kept internal.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 20:04:49 +02:00
Nicolas Chautru
8454d94825 baseband/acc100: add protection for some negative scenario
Catch exception in PMD in case of invalid input parameter.

Fixes: 5ad5060f8f ("baseband/acc100: add LDPC processing functions")
Cc: stable@dpdk.org

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 20:04:49 +02:00
Nicolas Chautru
60a623408b baseband/acc100: update companion PF configure function
Update of the device configuration function from PF used for bbdev-test
to latest sequence for ACC199 PRQ device and matching version in
pf_bb_config 22.03.

Fixes: b17d70922d ("baseband/acc100: add configure function")
Cc: stable@dpdk.org

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Hernan Vargas <hernan.vargas@intel.com>
2022-06-21 20:04:49 +02:00
Tomasz Duszynski
2e8bd307fa common/cnxk: support switching CPRI/ETH back and forth
Add support for toggling modes between ETH and CPRI on
newer MACs (RPM).

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 09:02:14 +02:00
Tomasz Duszynski
bd2fd34ab8 common/cnxk: sync eth mode change command with firmware
Layout of eth mode change command defined by firmware has been changed
recently. So in order to retain compatibility between ROC and firmware
update existing codebase.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:20:58 +02:00
Tomasz Duszynski
3572f5a563 common/cnxk: remove unused constants
Some constants are redundant hence remove them.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:20:35 +02:00
Tomasz Duszynski
888123a685 raw/cnxk_bphy: support changing CPRI misc settings
Add support for changing miscellaneous CPRI settings.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:20:24 +02:00
Tomasz Duszynski
283c917519 raw/cnxk_bphy: support enabling Tx for CPRI SERDES
Add support for enabling or disablig TX for SERDES
configured in CPRI mode.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:20:09 +02:00
Tomasz Duszynski
7af3e7aaf9 raw/cnxk_bphy: support switching from eCPRI to CPRI
Add support for switching from ethernet (eCPRI) to CPRI mode.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:19:42 +02:00
Tomasz Duszynski
e267eef7cc common/cnxk: do not switch affinity back and forth
Switching affinity back and forth was used as a mean to pass CPU number
to IRQ registration routine which is an overkill.

Simplify current logic by extending IRQ registration routine parameter
list with a CPU which should run IRQ handler.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:18:57 +02:00
Jakub Palider
d309d1e17c raw/cnxk_bphy: add doxygen comments
Documentation in doxygen format is important for API
headers used by end user. This patch fills BPHY and CGX
interface with missing bits.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:18:21 +02:00
Tomasz Duszynski
81388ad14b common/cnxk: use wider mask to extract RPM ID
Some platforms have more RPMs available than the others. Take than
into account when retrieving id of a particular RPM.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:18:02 +02:00
Tomasz Duszynski
8d3ba6bf0a common/cnxk: update register access for CNF10xxN
Due to HW changes some fields which were used to enable
xmit were moved elsewhere. This patch takes care of this.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
2022-06-22 08:17:41 +02:00
Bruce Richardson
aa802b1023 dma/idxd: fix AVX2 in non-datapath functions
While all systems which will use the idxd driver for hardware will
support AVX2, if the driver is present the initialization functions e.g.
to register logs, will be called on all systems - irrespective of HW
support. This can cause issues if the system running DPDK does not have
AVX2, and the compiler has included AVX instructions in the
initialization code.

To fix this, remove AVX2 instruction set from the whole build of the
driver. Instead, we add "target(avx2)" attribute to all datapath
functions, so those - and only those functions - will having AVX2
instructions in them.

Bugzilla ID: 1038
Fixes: 3d36a0a1c7 ("dma/idxd: add data path job submission")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Conor Walsh <conor.walsh@intel.com>
2022-06-21 18:19:41 +02:00
Bruce Richardson
4b918c1ad9 dma/idxd: fix default for workqueue options
When no --wq-option flag is passed to dpdk_idxd_cfg.py script, the
default value used by argparse is None. This leads to later errors which
are expecting an array value:

	TypeError: 'NoneType' object is not iterable

This is fixed by specifying that the empty array should be the default
if no flags are passed.

Fixes: 94b0f04dc0 ("dma/idxd: add generic option for queue config")

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Sunil Pai G <sunil.pai.g@intel.com>
Acked-by: Conor Walsh <conor.walsh@intel.com>
2022-06-21 17:33:30 +02:00
Wei Huang
8b59472875 raw/ifpga: add HE-HSSI AFU driver
HE-HSSI is one of the host exerciser modules in OFS FPGA,
which is used to test HSSI (High Speed Serial Interface).
This driver initialize the module and report test result.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-21 09:27:17 +02:00
Wei Huang
72dbdec4da raw/ifpga: add HE-MEM AFU driver
HE-MEM is one of the host exerciser modules in OFS FPGA,
which is used to test local memory with built-in traffic
generator.
This driver initialize the module and report test result.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-21 09:27:17 +02:00
Wei Huang
a84edb506f raw/ifpga: add HE-LPBK AFU driver
HE-LPBK and HE-MEM-LPBK are host exerciser modules in OFS FPGA,
HE-LPBK is used to test PCI bus and HE-MEM-LPBK is used to test
local memory.
This driver initialize the modules and report test result.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-21 09:27:17 +02:00
Wei Huang
7d63899a5c raw/ifpga: add N3000 AFU driver
N3000 AFU includes NLB0 and DMA modules, NLB0 is used to test PCI bus
and DMA is used to test local memory.
This driver initialize the modules and report test result.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-21 09:27:17 +02:00
Wei Huang
03260531ec raw/ifpga: introduce AFU driver framework
AFU (Acceleration Function Unit) is part of FPGA and enumerated
by ifpga driver.
This driver implements common AFU device interfaces and exposes
them to application as standard raw device APIs.
Normally application can operate specified AFU as below,
1. call rte_rawdev_pmd_get_named_dev() to find AFU device.
2. call rte_rawdev_configure() to initialize AFU device.
3. call rte_rawdev_selftest() to test AFU device.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-21 09:27:17 +02:00
Wei Huang
528a9fc233 raw/ifpga/base: add PMCI sensor driver
N6000 ADP platform support more sensors than N3000, they are
accessed with the help of PMCI sensor driver.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-20 17:33:55 +02:00
Wei Huang
b74ee6c808 raw/ifpga/base: update flash operation interface
In N6000 ADP platform, SPI protocol, master and QSPI flash are
transparent to host software. The SPI master implemented in PMCI
automatically converts the mailbox commands to the SPI protocol
required by SPI slave.
That means flash operation is different from old platform, new
interfaces are introduced to adapt these changes.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-20 17:33:21 +02:00
Wei Huang
7c4fe2ad3b raw/ifpga/base: update board information
N6000 ADP platform has different definition of board information,
they can be recognized after this patch.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-20 17:33:14 +02:00
Wei Huang
ca6eb0f7c8 raw/ifpga/base: add PMCI base driver
PMCI (Platform Management Control Interface) is a new module in FPGA,
which is designed to cooperate with BMC chip to fulfill board management
functions.
This base driver implements interfaces to access registers of BMC chip.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-20 17:31:47 +02:00
Wei Huang
e53ed84acb raw/ifpga: fix file handle leak
Coverity issue: 379064
Fixes: 673c897f4d ("raw/ifpga: support OFS card probing")

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2022-06-20 17:31:46 +02:00
Min Hu (Connor)
7342e61205 dma/hisilicon: fix includes in header file
Header files should be self contained. This patch fixed it.

Fixes: 9e16317a38 ("dma/hisilicon: add probing")
Cc: stable@dpdk.org

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2022-06-15 16:33:42 +02:00
Sivaprasad Tummala
674c4f2d6c dma/skeleton: support multiple instances
DPDK app can support multiple hardware DMA instances.
With DMA skeleton, only a single instance can be configured.

This patch supports multiple driver instances per device.

Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
Tested-by: Vipin Varghese <vipin.varghese@amd.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Tested-by: Chengwen Feng <fengchengwen@huawei.com>
2022-06-15 16:17:52 +02:00
Chengwen Feng
618a40a0c9 dma/skeleton: fix index returned when no memcpy completed
If no memcopy request is completed, the ring_idx of the last completed
operation need returned by last_idx parameter. This patch fixes it.

Fixes: 05d5fc66a2 ("dma/skeleton: introduce skeleton driver")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2022-06-15 16:15:07 +02:00
David Marchand
2a213b794f vdpa/ifc: fix build with GCC 12
GCC 12 raises the following warning:

../drivers/vdpa/ifc/ifcvf_vdpa.c: In function ‘vdpa_enable_vfio_intr’:
../drivers/vdpa/ifc/ifcvf_vdpa.c:383:62: error: writing 4 bytes into a
    region of size 0 [-Werror=stringop-overflow=]
  383 |                         fd_ptr[RTE_INTR_VEC_RXTX_OFFSET + i] = fd;
      |                         ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~
../drivers/vdpa/ifc/ifcvf_vdpa.c:348:14: note: at offset 32 into
    destination object ‘irq_set_buf’ of size 32
  348 |         char irq_set_buf[MSIX_IRQ_SET_BUF_LEN];
      |              ^~~~~~~~~~~

Validate number of vrings to avoid out of bound access.

Bugzilla ID: 855
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2022-06-15 10:20:54 +02:00
David Marchand
20d6a017e1 net/ice: fix build with GCC 12
GCC 12 raises the following warning:

In file included from ../lib/mempool/rte_mempool.h:46,
                 from ../lib/mbuf/rte_mbuf.h:38,
                 from ../lib/net/rte_ether.h:22,
                 from ../lib/ethdev/rte_ethdev.h:172,
                 from ../lib/ethdev/ethdev_driver.h:22,
                 from ../lib/ethdev/ethdev_pci.h:17,
                 from ../drivers/net/ice/ice_ethdev.c:6:
../drivers/net/ice/ice_ethdev.c: In function ‘ice_dev_configure’:
../lib/eal/x86/include/rte_memcpy.h:370:9: warning: array subscript 64 is
        outside array bounds of ‘struct ice_aqc_get_set_rss_keys[1]’
        [-Warray-bounds]
  370 | rte_mov32((uint8_t *)dst + 2 * 32, (const uint8_t *)src + 2 * 32);
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/net/ice/ice_ethdev.c:3202:41: note: while referencing ‘key’
 3202 |         struct ice_aqc_get_set_rss_keys key;
      |                                         ^~~

Restrict copy to minimum size.

Bugzilla ID: 850
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2022-06-15 10:20:36 +02:00
David Marchand
7c3c0d0f29 net/enetfec: fix build with GCC 12
GCC 12 raises the following warning:

../drivers/net/enetfec/enet_ethdev.c: In function
        ‘enetfec_rx_queue_setup’:
../drivers/net/enetfec/enet_ethdev.c:473:9: error: array
        subscript 1 is
    above array bounds of ‘uint32_t[1]’ {aka ‘unsigned int[1]’}
        [-Werror=array-bounds]
  473 | rte_write32(rte_cpu_to_le_32(fep->bd_addr_p_r[queue_idx]),
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  474 |     (uint8_t *)fep->hw_baseaddr_v + ENETFEC_RD_START(queue_idx));
      |     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/net/enetfec/enet_ethdev.c:9:
../drivers/net/enetfec/enet_ethdev.h:113:33: note: while referencing
        ‘bd_addr_p_r’
  113 | uint32_t                bd_addr_p_r[ENETFEC_MAX_Q];
      |                                 ^~~~~~~~~~~

This driver properly announces that it only supports 1 rxq.
Silence this warning by adding an explicit check on the queue id.

Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Sachin Saxena <sachin.saxena@nxp.com>
2022-06-15 10:19:34 +02:00
David Marchand
2449949584 net/ena: fix build with GCC 12
GCC 12 raises the following warning:

In file included from ../lib/mempool/rte_mempool.h:46,
                 from ../lib/mbuf/rte_mbuf.h:38,
                 from ../lib/net/rte_ether.h:22,
                 from ../drivers/net/ena/ena_ethdev.h:10,
                 from ../drivers/net/ena/ena_rss.c:6:
../drivers/net/ena/ena_rss.c: In function ‘ena_rss_key_fill’:
../lib/eal/x86/include/rte_memcpy.h:370:9: warning: array subscript 64 is
        outside array bounds of ‘uint8_t[40]’
        {aka ‘unsigned char[40]’} [-Warray-bounds]
  370 | rte_mov32((uint8_t *)dst + 2 * 32, (const uint8_t *)src + 2 * 32);
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/net/ena/ena_rss.c:51:24: note: while referencing ‘default_key’
   51 | static uint8_t default_key[ENA_HASH_KEY_SIZE];
      |                ^~~~~~~~~~~

This is a false positive because the copied size is checked against
ENA_HASH_KEY_SIZE in a (build) assert.
Silence this warning by calling memcpy with the minimal size.

Bugzilla ID: 849
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2022-06-15 10:19:18 +02:00
David Marchand
468f31eb71 crypto/ipsec_mb: fix build with GCC 12
GCC 12 raises the following warning:

In function ‘__rte_ring_enqueue_elems_64’,
    inlined from ‘__rte_ring_enqueue_elems’ at
        ../lib/ring/rte_ring_elem_pvt.h:130:3,
    inlined from ‘__rte_ring_do_hts_enqueue_elem’ at
        ../lib/ring/rte_ring_hts_elem_pvt.h:196:3,
    inlined from ‘rte_ring_mp_hts_enqueue_burst_elem’ at
        ../lib/ring/rte_ring_hts.h:110:9,
    inlined from ‘rte_ring_enqueue_burst_elem’ at
        ../lib/ring/rte_ring_elem.h:577:10,
    inlined from ‘rte_ring_enqueue_burst’ at
        ../lib/ring/rte_ring.h:738:9,
    inlined from ‘process_op_bit’ at
        ../drivers/crypto/ipsec_mb/pmd_snow3g.c:425:16,
    inlined from ‘snow3g_pmd_dequeue_burst’ at
        ../drivers/crypto/ipsec_mb/pmd_snow3g.c:484:20:
../lib/ring/rte_ring_elem_pvt.h:68:44: error: array subscript 1 is
        outside array bounds of ‘struct rte_crypto_op[0]’
        [-Werror=array-bounds]
   68 |                         ring[idx + 1] = obj[i + 1];
      |                                         ~~~^~~~~~~
../drivers/crypto/ipsec_mb/pmd_snow3g.c: In function
        ‘snow3g_pmd_dequeue_burst’:
../drivers/crypto/ipsec_mb/pmd_snow3g.c:434:1: note:
        at offset 8 into object ‘op’ of size 8
  434 | snow3g_pmd_dequeue_burst(void *queue_pair,
      | ^~~~~~~~~~~~~~~~~~~~~~~~

Validate that one (exactly) op has been processed or return early.

Fixes: b537abdbee ("crypto/snow3g: support bit-level operations")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2022-06-15 09:37:35 +02:00
Yunjian Wang
f2aebfc4e9 net/tap: fix device freeing
The error path was calling rte_eth_dev_release_port() function,
which frees eth_dev->data->dev_private, and then tries to free
pmd->intr_handle, which causes the use after free issue.

The free can be moved to before the release function is called.

Fixes: d61138d4f0 ("drivers: remove direct access to interrupt handle")
Cc: stable@dpdk.org

Signed-off-by: Xiangjun Meng <mengxiangjun4@huawei.com>
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2022-06-08 14:39:13 +02:00
Yunjian Wang
fd819cad0a net/failsafe: fix device freeing
The PMD destroy function was calling the release function, which frees
dev->data->dev_private, and then tries to free PRIV(dev)->intr_handle,
which causes the heap use after free issue.

The free can be moved to before the release function is called.

Fixes: d61138d4f0 ("drivers: remove direct access to interrupt handle")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2022-06-08 14:38:44 +02:00
Ed Czeck
6799275eee net/ark: support virtual functions
- Add capabilities field isvf to dev struct
- Disable configuration calls as required by VF

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2022-06-08 10:38:39 +02:00
Ed Czeck
b5c58298b2 net/ark: support new devices
Support new devices and update device list in doc

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2022-06-08 10:38:39 +02:00
Ed Czeck
f20669a564 net/ark: report additional errors from firmware
Detect and report completion errors from firmware

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2022-06-08 10:38:39 +02:00
Ed Czeck
f0d33f78f7 net/ark: update UDM functions for firmware update
- New firmware version for UDM (Upstream Data Mover)
- Remove device-level start, stop, and reset operations
- Add queue-based start, stop and reset as required by firmware
- Remove performance structs as they are not in the firmware module

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2022-06-08 10:38:39 +02:00
Ed Czeck
38a4657ea4 net/ark: update DDM functions for firmware update
- New firmware version for DDM (Downstream Data Mover)
- Remove device-level start, stop, and reset operations
- Add queue-based start, stop and reset as required by firmware

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2022-06-08 10:38:39 +02:00
Ed Czeck
c8eaa414c4 net/ark: update MPU functions for firmware update
- New firmware version for MPU (Mbuf Prefetch Unit)
- Remove device-level global operations
- Remove ark_mpu_reset_stats function

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2022-06-08 10:38:39 +02:00
Michal Krawczyk
a0b1207584 net/ena: update version to 2.7.0
This release contains changes listed below.

  - Fast mbuf free feature support.
  - Device argument to disable the LLQ.
  - Simplification of the MTU verification.

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
2022-06-07 21:01:09 +02:00
Michal Krawczyk
9944919e2b net/ena: add device argument to disable LLQ
The PMD attempts to enable the LLQ (Low Latency Queue) whenever it's
possible. The LLQ requires the user to enable the Write Combining for
the supported igb_uio/vfio-pci modules.

The vfio-pci module officially doesn't support the WC. Moreover, in some
Linux distributions, it can be built into the kernel, so any
modifications to the vfio-pci module require a full rebuild of the
kernel. This can make the configuration process much harder and for some
users, that are not interested in the great network performance for
their setups, it may be redundant. These users requested to be able to
turn off LLQ to avoid the hassle of such a setup.

It's generally not recommended to disable the LLQ, as it won't result in
the performance improvement and on the 6th generation AWS instances the
lack of LLQ can have a huge negative impact on hardware performance.

The device argument which controls the LLQ is called 'enable_llq` and by
default, it's set to 1 (which means that the LLQ is enabled). Setting
it to 0 disables the LLQ.

This commit also adds the explicit initialization of the devarg for the
'use_large_llq_hdr'. The PMD_REGISTER_PARAM_STRING() call for the ENA
was updated with all the available devargs (including
ENA_DEVARG_MISS_TXC_TO, which wasn't added previously).

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Dawid Gorecki <dgr@semihalf.com>
Reviewed-by: Shai Brandes <shaibran@amazon.com>
Reviewed-by: Amit Bernstein <amitbern@amazon.com>
2022-06-07 21:01:09 +02:00
Dawid Gorecki
c3d31352bf net/ena: remove redundant MTU verification
Remove MTU verification from ena_mtu_set() and ena_start(). It is done
by rte_ethdev already, so there is no reason to repeat it inside the ENA
driver.

Signed-off-by: Dawid Gorecki <dgr@semihalf.com>
Reviewed-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Shai Brandes <shaibran@amazon.com>
Reviewed-by: Amit Bernstein <amitbern@amazon.com>
2022-06-07 21:01:09 +02:00
Dawid Gorecki
c339f53823 net/ena: support fast mbuf free
Add support for RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE offload. It can be
enabled if all the mbufs for a given queue belong to the same mempool
and their reference count is equal to 1.

Signed-off-by: Dawid Gorecki <dgr@semihalf.com>
Reviewed-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Shai Brandes <shaibran@amazon.com>
Reviewed-by: Amit Bernstein <amitbern@amazon.com>
2022-06-07 21:01:09 +02:00
Stanislaw Kardach
a820df244f net/tap: set BPF syscall ID for RISC-V
Define the missing __NR_bpf syscall id to enable the tap PMD.

Sponsored-by: Frank Zhao <frank.zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
2022-06-08 11:26:34 +02:00
Stanislaw Kardach
a4f8f0faea net/memif: set memfd syscall ID for RISC-V
Define the missing __NR_memfd_create syscall id to enable the memif PMD.

Sponsored-by: Frank Zhao <frank.zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
2022-06-08 11:26:34 +02:00
Stanislaw Kardach
d2d9f93046 net/ixgbe: add vector stubs for RISC-V
Re-use vector processing stubs in ixgbe PMD defined for PPC for RISC-V.
This enables ixgbe PMD usage in scalar mode on this architecture.

The ixgbe PMD driver was validated with Intel X520-DA2 NIC and the
test-pmd application. Packet transfer checked using all UIO drivers
available for non-IOMMU platforms: uio_pci_generic, vfio-pci noiommu and
igb_uio.

Sponsored-by: Frank Zhao <frank.zhao@starfivetech.com>
Sponsored-by: Sam Grove <sam.grove@sifive.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
2022-06-08 11:26:34 +02:00