7 Commits

Author SHA1 Message Date
Qi Zhang
d84e220a8d net/ice/base: update copyright date
Updated the Copyright for 2021
Updated ice driver version.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:09 +01:00
Qi Zhang
5a141eac05 net/ice/base: rename ACL priority values
The naming convention used to shorten 'priority' is 'prio'.
Convert the ACL related entries that use 'prior' to 'prio'.

Also, as ICE_LOW, ICE_NORMAL,... are not very descriptive of what
they represent. Add 'ACL_PRIO' to help convey their use.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
3fbba579a2 net/ice/base: rename function
'xtrct' or 'xtract' is currently used in the code to shorten 'extract'.
Rename ice_prgm_acl_prof_extrt() to ice_prgm_acl_prof_xtrct() so we don't
have another variation of a 'extract'.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
0fceb10f6d net/ice/base: remove function ACL count query
Remove debug function ice_aq_query_acl_cntrs.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
54d86ca587 net/ice/base: move a function
The only caller of this function is within the file so mark it as static
and move it up in the file to avoid a forward declaration.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Xiaoyun Li
dc496974cd net/ice/base: update copyright
Clarify Intel copyright and update the date to 2020.

Fixes: f3202a097f12 ("net/ice/base: add ACL module")
Fixes: a90fae1d0755 ("net/ice/base: add admin queue structures and commands")
Fixes: 2d2bdc026737 ("net/ice/base: add various headers")
Fixes: c9e37832c95f ("net/ice/base: rework on bit ops")
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Fixes: 6c1f26be50a2 ("net/ice/base: add control queue information")
Fixes: 1082f786547e ("net/ice/base: support DCB")
Fixes: 6aa406714a65 ("net/ice/base: add device IDs for Intel E800 Series NICs")
Fixes: bd984f155f49 ("net/ice/base: support FDIR")
Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module")
Fixes: 2d2bdc026737 ("net/ice/base: add various headers")
Fixes: aa1cd410fa64 ("net/ice/base: add flow module")
Fixes: 51c7f09f3f81 ("net/ice/base: add registers for Intel E800 Series NIC")
Fixes: 64e9587d5629 ("net/ice/base: add structures for Rx/Tx queues")
Fixes: 557fa75bcf55 ("net/ice/base: add code to work with the NVM")
Fixes: b06499a43394 ("net/ice/base: update Boot Configuration Section read of NVM")
Fixes: 04b8ec1ea807 ("net/ice/base: add protocol structures and defines")
Fixes: 2a27e0a16d29 ("net/ice/base: add sideband queue info")
Fixes: 93e84b1bfc92 ("net/ice/base: add basic Tx scheduler")
Fixes: c7dd15931183 ("net/ice/base: add virtual switch code")
Fixes: a240ff50505b ("net/ice/base: add basic structures")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-05-18 20:35:57 +02:00
Qi Zhang
f3202a097f net/ice/base: add ACL module
Add all ACL related code.

Signed-off-by: Real Valiquette <real.valiquette@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00